Technology of Q 2500 colour TV set

Technology of Q 2500 colour TV set231-90415.917Loewe Opta GmbHPostfach 155496305 KronachIndustriestraße 1196317 KronachTel: (09261) 99-0Fax (09261) 9 54 11e-mail: loewe@loewe.dehttp://www.loewe.deDokument Q 2500 1 © Loewe ProCollege

Technology of Q 2500 colour TV setDocument Q 2500 2 © Loewe ProCollege

Technology of Q 2500 colour TV set1 Introduction..............................................51.1 Foundations of 100 hz technology ................ 71.1.1 Prerequisites for 100 Hz........................ 71.1.2 100 Hz display modes ........................... 71.1.3 Mode AABB ......................................... 71.1.4 Mode ABAB ......................................... 91.1.5 Mode AA’B’B....................................... 91.1.6 Mode AA*BB* ..................................... 92 Basic board............................................122.1 Standby power supply ................................. 122.1.1 Standby power supply circuit .............. 122.2 Blocking oscillator type power supply........ 132.2.1 Primary side......................................... 142.2.2 Start-up................................................ 162.2.3 Normal and control operation.............. 162.2.4 Protective operation............................. 172.2.5 Power Factor Control .......................... 172.2.6 Secondary side..................................... 182.2.7 Voltage stabilisation............................ 202.2.8 Voltage increase .................................. 202.2.9 Servicing information.......................... 212.3 Horizontal deflection and high voltageproduction ............................................................... 212.3.1 Horizontal driver ................................. 212.4 Horizontal output stage ............................... 222.4.1 High voltage production...................... 252.4.2 Horizontal- offset deflector ................. 252.5 East/west correction .................................... 262.5.1 Circuit.................................................. 272.6 Vertical output stage.................................... 282.6.1 Flyback generator................................ 292.6.2 Vertical protective circuits .................. 302.7 Beam current limitation............................... 322.7.1 Overbeam current fuse ........................ 332.7.2 HFLB protective circuit....................... 342.8 Speed modulator.......................................... 342.8.1 General ................................................ 342.8.2 Switching of the speed modulator ....... 362.9 Colour stages............................................... 372.9.1 Cut off control ..................................... 382.9.2 Switch off flash suppression................ 402.10 Rotation panel ............................................. 402.10.1 Raster correction ................................. 402.10.2 Circuit.................................................. 412.11 NF output stages.......................................... 423 Receiver components ............................443.1 HF/IF unit.................................................... 443.1.1 HF/IF components............................... 443.2 DVB Board.................................................. 463.2.1 Overview ............................................. 463.3 Features and parameters .............................. 483.3.1 DVB internal features.......................... 483.3.2 DVB/TV-Features ............................... 523.3.3 Architecture......................................... 523.4 Components................................................. 543.4.1 Satellite front end ................................ 543.4.2 Functional distribution ........................ 543.4.3 Tuner ................................................... 543.4.4 DVB demodulation and fault correction563.4.5 LNC supply..........................................594 Signal board .......................................... 604.1 Device control..............................................604.1.1 The infrared sensor...............................624.1.2 Infrared receiver...................................654.1.3 The SDA 6000 central control unit ......664.1.4 Reset.....................................................674.1.5 Creation of cycle frequency .................684.1.6 Operational commands.........................684.1.7 LED display .........................................684.1.8 ON/OFF function .................................684.1.9 Protective circuit ..................................684.1.10 AV operation........................................694.1.11 SAT standby.........................................704.1.12 SAT unit control...................................714.2 Bus systems in Q 2500 chassis.....................724.2.1 I²C bus systems ....................................734.2.2 IC 24C64 memory................................754.2.3 EPROM M 27 C 322............................754.2.4 SRAM ..................................................764.2.5 Search functions...................................764.2.6 Storage .................................................764.2.7 Programme recall .................................764.2.8 System clock ........................................774.2.9 Control of signal processing.................774.2.10 Service mode........................................784.2.11 Video text.............................................784.2.12 Picture signal processing......................784.2.13 Components for....................................794.2.14 Signal path ...........................................804.2.15 IC functions..........................................844.3 VPC 3230.....................................................844.3.1 Input interface ......................................854.3.2 20.25 MHz clock generator..................864.3.3 Comb filter ...........................................874.3.4 Multi-standard colour decoder .............894.3.5 Line compression and .........................894.3.6 Output format conversion ....................904.3.7 Synchronisation block..........................904.3.8 I²C bus interface...................................904.4 Half picture memory SAA4955HL..............904.4.1 Storage space........................................914.4.2 Conversion of signals in.......................924.4.3 Half picture memory 2 and 3 ...............924.4.4 Control pulses ......................................924.5 Falconic module SAA 4993.........................964.5.1 Noise reduction ....................................964.5.2 Line interpolation.................................984.5.3 Movement detector ..............................994.5.4 Memory control....................................994.6 SAA 4979 (BESIC)......................................994.6.1 Chroma branch...................................1004.6.2 Band width doubling..........................1014.6.3 Colour flank sharpening....................1014.6.4 Y signal path ......................................1014.6.5 Microprocessor interface....................1024.6.6 Control of the 100 Hz processing.......102Document Q 2500 3 © Loewe ProCollege

Technology of Q 2500 colour TV set4.7 Video/deflection processor TDA 9332/RangeVideo/RGB path.................................................... 1024.7.1 Matrix circuits and signal.................. 1034.7.2 Control stages.................................... 1054.7.3 I²C bus interface and ......................... 1054.8 Picture in picture ....................................... 1054.9 Video/deflection controller TDA9332(deflection area) .................................................... 1084.9.1 Clock generation/Phase 2 loop .......... 1084.9.2 DAC for OW/V control..................... 1084.9.3 Beam current dependent correction... 1085 Audio signal processing.......................1105.1 Audio-Signal path Block diagram Q 2500H/M and B............................................................. 1105.2 Demodulator/Decoder-Block .................... 1125.2.1 Audio baseband processing ............... 1135.2.2 Demodulator/decoder block .............. 1135.2.3 Nicam processing .............................. 1145.2.4 Audio signals from the interface ....... 1145.2.5 AM audio signals at L standard......... 1145.2.6 Audio base band processor................ 1155.2.7 Loudspeaker branch .......................... 1155.2.8 Loudness ........................................... 1155.2.9 Sound setting..................................... 1155.2.10 Loudspeaker control and AVC.......... 1165.2.11 DAC .................................................. 1165.2.12 Headphone branch............................. 1165.2.13 Interface branch................................. 1165.2.14 Deadline volume ............................... 1165.2.15 Mute circuit ....................................... 1175.2.16 Headphone amplifier ......................... 1195.3 AC3 module (Dolby Digital)..................... 1215.3.1 Block diagram, AC3 module............. 1215.3.2 AC 3 signal processing...................... 1215.3.3 AC 3 IC functions ............................. 1236 Interface switching ...............................123Document Q 2500 4 © Loewe ProCollege

Technology of Q 2500 colour TV set1 IntroductionThe Q 2500 chassis is a further developmentof the tried and tested 100 Hz Q 2400 chassis.The modular design, dimensions and layouthave been retained.In order to improve picture performance evenfurther, several circuit components have eitherbeen modified or newly added. For sound signals,IF processing in the main receiver unit isnow entirely digital.The Q 2500 chassis is available in three differentversions, Q 2500/H (High End), Q2500/M (Medium) and Q 2500/B (Basic). Thesignal board is different for all three versions.It has different equipment in certain areas owingto the different power spectrum of thethree versions. All H/M and B signal boardversions are electrically interchangeable. Dueto the incorporation of 2 or 3 AV sockets (theback of the TV set does not fit) they are notmechanically compatible. Except for the signalboard there is no differentiation with respect toall other components for the different versions– High End, Medium and Basic. The Q 2500chassis therefore supersedes the Q 2400 andQ 4140 chassis completely.Because of this concept it is now possible tofit a DVB upgrade kit to all 100 Hz TV sets –from the Contur to the Aconda. So far this hasonly been possible for sets with the Q 2400chassis and not for sets with the Q 4140chassis.The following features have been retainedfrom the previous chassis:- 8 bit digital signal processing- ACP (Automatic Channel Programming) forfully automatic programming of stationsand sorting of cable and SAT reception, includingan update function.- child protection security-plus with secretcode.- - Sharpness control, photo CD circuitand comb filter (S-PAL).- SCS (Sharpness Control System) for apicture-dependent velocity modulation ofthe horizontal (line) sweep.- DTI Plus (Digital Transient Improvement)for colour edge sharpening.- 576-line still picture- Adjustable noise suppression DNC (DigitalNoise Control)- Suppression of interline flicker DLC (DigitalLineflicker Control).- Digital Line Interpolation (DLI) for full framepicture display for PALplus and also in allzoom modes.- Digital Motion Interpolation (DMI) ensurescontinuous movement over all single framepictures.- Automatic Movie Detection (AMD) forswitching to wide screen format in PALstandard on 16:9 units.- Automatic PALplus recognition and formatswitching for 16:9 units.- Digital Scene Control (DSC) for improvedgrey scales.- Various switching modes (4:3, Cinema,Zoom, 16:9 and Panorama Mode for 16:9units).- Automatic Volume Control (AVC) for adjustingthe volume between different channelsand during commercial breaks- On the front: Headphone output and inputwith S terminals and three cinch sockets.Document Q 2500 5 © Loewe ProCollege

Technology of Q 2500 colour TV set- Copy function for re-recording betweendifferent inputs and outputs (also instandby mode), and during TV programmes.- Internal clock synchronized with Teletext.- EPG function (electronic programmeguide).- Recording timer for video recorder andSAT standby function.- Operation of Loewe video recorders via themenu.- Switch-off automation and timer.- In 81 cm sets a rotary panel is used in orderto compensate for the earth’s magneticfield. This prevents distortion of the pictureno matter where the set is placed.- Personal Control System (PCS): operationtailored to individual customer requirements.The most frequently used functionsmay be assigned to four buttons of the remotecontrol. Additionally, the operatingmanual may be viewed on the screen – OnScreen Display (OSD). This includes helpinstructions on functions currently used, informationon the remote control functionsand an index, which enables immediateimplementation of functions. It is also possibleto set limitations to the scope of operationaccording to customer requirements.The user may, for example, be preventedfrom making changes to particularsettings.- A Dolby Digital Module can be installed inmodel versions H and M.- The EAROM and the DVB software maybe directly written to via an external V 24service interface using a PC and serviceadapter.The following features are completely new:- Depending on version, either two or threeAV sockets.- Depending on version, a Teletext memorywith 3000 pages (with active EPG function2000 pages).- An own radio menu, accessible over the“speaker symbol“ on the remote control.- Improved Digital Movie Mode (DMM). Featurefilms are recognized safely. Therefore,accidental switching to camera mode isprevented. Switching effects do not occuranymore.The following circuit descriptions have beensubdivided according to the individual modules.Deviation from this scheme occurs occasionallyin order to emphasize relations betweencircuits more effectively. All componentpositions in the circuit diagrams are identifiedby four figures. For the signal board the fullyequipped version H is explained. For versionsM and B only the differences are noted.The upgrade kits are explained in a separatecircuit description.- Automatic Gain Control (AGC) for all videosignals shown in the main picture.- The RGB signals are no longer convertedto analogue Y/C signals but are directlydigitised instead.- An Audio-In socket to which, for example,an external digital radio receiver may beconnected.- Some models, e.g. Aconda, may be upgradedDocument Q 2500 6 © Loewe ProCollege

Technology of Q 2500 colour TV set1.1.2 100 Hz display modes1.1 Foundations of 100 Hz technology1.1.1 Prerequisites for 100 HzIn order to double the picture frequency at thereceiver, the signals have to be read into therelevant memory blocks and then read outtwice at double rate.The following prerequisites must be met:- The signals need to be digitised.- The memory modules require at least 3Mbits storage capacity.- The software must be able to run a controller,which in turn monitors the read-in andread-out functioning of the memory.- Suitable frequency-stabilized oscillators forgenerating the clock frequency must beprovided.- The drive signals for the output stages, lineand field deflection, and the E/W correctionmust also be at double frequency.- The power output stages for deflection, aswell as the deflector itself, need to be designedfor the higher frequency and the resultinghigher currents.- The RGB output stages need to be able toprocess the doubled bandwidth.When examining display modes the deflectionraster and the video raster need to be consideredtogether. In 50 hz operation, the two single-framepictures A and B are written to thescanning system ‘a’ and ‘b’, i.e. every secondline of frame A and the intermediate lines of B.This is achieved in that the flyback of ‘a’ beginsin the middle of a line. Trace ‘b’ startsalso in the middle of a line but is written to theend of a complete line. The next trace ‘a’starts again at the beginning of a line. Thetrace time, however, is always the same.1.1.3 Mode AABBThe simplest case of 100 hz operation involvesa simple doubling of single-frame picturedisplay, i.e. field A is displayed twice consecutivelyfollowed by field B (AABB).To achieve this the deflection raster must bemodified so that ‚a’ is written twice followed by‘b’ (aabb). Theoretically, this can be accomplishedin two ways. Firstly, by adjusting theflyback’s starting time for the 4 single frames.A half-line more is written for ‘a1’ and a halflineless in for the third field. In practice, sucha scheme would be quite difficult to implement.In comparison, the second possibility iseasier to achieve. This involves shifting the 2 ndand 3 rd fields (a2 and b1). This can be accomplishedby adjusting the current though thedeflector by modifying the base resistance.This produces the same time interval for alltraces over all fieldsDocument Q 2500 7 © Loewe ProCollege

Technology of Q 2500 colour TV setDeflection 100Hz319/73a 100HzScanning pattern a-a-b-bScanning pattern a320/8321/93.Halfpicture...1. 50Hz620/308732083219......620308Scanning pattern a319Scanning pattern b7320/8321/9...2.Half picture(300,5 Lines)1.Half picture(301 Lines)Scanning pattern b3191.Halfpicture620/3083.Half picture(300 Lines)4.Half picture(300,5 Lines)2.100HzScanning pattern a-b-a-b732083219......620308Scanning pattern a1. Half picture319Scanning pattern b2. Half picture7320/8321/9...620/3083b 100HzScanning pattern a-a-b-bScanning pattern a319Displacementby one lineof 2nd half picture732083219......620308Scanning pattern a3. Half picture319Scanning pattern b4. Half picture320/7321/8.../91.Half picture(301 Lines) 2.Half picture(301 Lines)Scanning pattern b319Displacementby one lineof 3rd half picture620/...3083.Half picture(301 Lines)4.Half picture(301 Lines)Document Q 2500 8 © Loewe ProCollege

Technology of Q 2500 colour TV setFor AA and BB display, delay lines must ensurethat the lines of the 1st and 2nd, and 3rdand 4th fields contain the same picture informationwhen superimposed on one another.This mode of display allows for very effectivereduction of large-area flicker. A reduction ofinterline flicker is, however, not possible, becauseintermediate lines are only traced after20ms.Memory 1Memory 1retardedMemory 2Output10 10 1010 10 910 8 810 10 9x x xx x xx x xx x x1.1.4 Mode ABABThis mode, together with the two describedbelow, are only possible in conjunction with asecond single-frame picture memory becauseof the alternating display of A and B. The deflectionmust also operate in ‘abab’ rasterform. In this display mode, the signals are notmodified during deflection or image processingoperations. In this case, both interlineflicker and large area-flicker can be reduced.However, jerking effects in moving imagescan arise. This form of display is only suitablefor signals where an image is formed from twofields between which there is no relativemovement. This mode is therefore of interestonly for “Photo CD” or cinema scope films inPALplus.signal delayed by one single-frame are comparedwith one another. If deviations are de-Interpolation exampletected in one of the signals, this signal is eliminatedand the values that agree in the othertwo signals are retained. If all three signalsvary, an average is formed.The deflection proceeds as sweep ‘abab’. Thecalculated A’ and B’ are written to shiftedscanning system of the 2 nd and 3 rd singleframes. A and B are written to the non-shiftedsystem of frames 1 and 4.This mode is suitable for the display of horizontalmotion between frames. Only smalljerking effects arise between movements.The mode is used to suppress interline flickerin normal TV operation.1.1.6 Mode AA*BB*Reduction of interline flicker withoutmovement interpolation (DLC)Memory 1Memory 1 Memory 2retarded1.1.5 Mode AA’B’BOutputDeflectionScanningpatternA A v B A aA A v A A' bB B v A B' aB B v B B bA A v B A aIn this display mode two single-frame pictures,A’ and B’, are calculated. By using an interpolationfilter the current single-frame, the currentsingle-frame delayed by one line and theIn this display mode with respect to the calculatedframes A* and B*, the movement betweenthe original frames A and B, and betweenB and the next A are taken into account.This movement interpolation (DMI –Digital Motion Interpolation) takes into accountboth horizontal and vertical movements whichcover several lines. This means that whensuppressing interline flicker, continuousmovement over all frames is achieved.For full frame pictures (films) it is also assuredthat no movement between two single-framepictures takes place (DMM – Digital MovieMode).In this display mode the deflection is also‘abab’.Document Q 2500 9 © Loewe ProCollege

Technology of Q 2500 colour TV setMovement interpolationPcture 1Picture 2 Picture 3Picture 1 Picture 1*Picture 2 Picture 2*Picture 3 Picture 3*Display mode 100HzNo.PicturechangefrequencyVideoscanningpatternDeflectionscanningpatternModeAdvantages1.50HzA-Ba-b2.100HzA-A-B-Ba-a-b-bDLC off-Reduction of large area shimmer3.100HzA-B-A-Ba-b-a-b-Photo CD on-PAL plus Cinema Scope-Reduction of large area shimmer-Reduction of interline shimmerin full picture setup4.100HzA-A´-B´-BababDLC on-Reduction of large area shimmer-Reduction of interline shimmer in fullpicture setup with movement5.100HzA-A*-B*-BababDMI-Reduction of large area shimmer-Reduction of interline shimmer in fullpicture setup with movement-Movement interpolationDocument Q 2500 10 © Loewe ProCollege

Technology of Q 2500 colour TV setSATunitTwinSATVideoNF - LNF - RVideoAudioZFEuro-, Hosiden-, CinchandHeadphones socketsInterfacecontrolDVBDVBTVOPSUSet control unitTVOFB230V~Operating unit,standby PSUIR recieverVGA -InterfaceU5 SB†berhub.ON/OFFRSIGSignal-BoardSignal processingDolby DigidalPIPBooster coilFBAS / PIPFBASAudio-ZFNF-Mono100 HzRGBCut offSpeed modulatorRGB output stagesc.r.t. plateRGBRotation panelnot additional to TVOVertical output stageVertikal deflection coilBasic-BoardO/W output stageHorizontal output stageDiode split transformerNF output stagesHorizontal deflection coiUG2FocusHigh voltageAuxiliary voltagesNF - LNF - RPower supplyOperatingvoltagesHF- ZF / PIPHF- ZFFBAS / PIPFBASAudio-ZFNF-MonoDocument Q 2500 11 © Loewe ProCollege

Technology of Q 2500 colour TV set2 Basic boardThis main heading covers the analoguestages from the power supply circuit throughthe power output stages to beam current limitation,irrespective of whether or not they arecontained on the basic board. In order tomaintain consistency, several smaller stageson the basic board are also described.2.1 Standby power supplyThe Q 2500 receiver once again contains astandby power supply circuit, thus limiting currentconsumption in this mode to < 2 Watt.The use of a new CCU SDA 6000 on the signalboard increases the standby power consumptionfrom 1 W to 2 W, compared to theolder model. To meet the requirements of increasedpower consumption, there is now asmall, blocking oscillator type power supplyattached to the operating control, which suppliesthe U5 SB.Siemens Corporation has announced a newindex of the SDA 6000, that needs only 1 Wpower in standby operation. This will be implementedon the signal board, but thestandby power supply will not be changed.mode. All of this contributes to the standbymode’s low power consumption.2.1.1 Standby power supply circuitThe main voltage is fed via W 8103 the switchS 8101 and W 8611 to the basic board andcontinues via the line filter (C 612, T612,C613) and the 3-pole pin connector W613/BBback to pin 2/3 of operating control W 8613.The 220V is rectified by the bridge rectifier D8133 and smoothed by C 8133. The blockingoscillator type power supply consists essentiallyof the control circuit I 8131, in which theswitching transistor for the primary blockingoscillator winding is integrated, the transformerT 8101 and the opto-coupler I 8122. Anoperating voltage of about 18V is led fromwinding T 8101 pin1/2 via D 8138/D 8131 andC 8132 to I 8131 on pin 4. Control input I 8131pin 3 is supplied with secondary side currentcontrol information by opto-coupler I8122.This control circuit stabilises the secondaryside output voltage derived from the windingpin 5/8 of T 8101 at 5V. This is then fed via W8181 pin 8 to the signal board. I8122 is fittedwith an internal excess temperature, excesscurrent and excess voltage switch protection.The blocking oscillator type power supply operatesat a switching frequency of about 50kHz.The circuit itself is mounted together with theIR receiver and the LEDs on its printed circuitboard. It supplies the U5 SB, which maintainsfunctioning of the IR detector, the processorcircuit and the operating software. The lasttwo circuits operate in standby mode, i.e. theclock frequency is reduced internally so thatonly those stages required to recognize aswitch-on command are maintained in operation.Because of the NexTView function with U3.3 the TV RAM is retained in self refreshDocument Q 2500 12 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500 Operating ControlT8101Standby transformer3 5MP04W8613VH-JSTws 7R92 3pol3from BB21R8134D8133DF08SF8133B8103R10C81334u7/400VT630mAMP031C813647nI8131VIPER1228734MP0265MP01R81380RD8131LL4148C813210u41D8138LL41482 8C8106470uI8122TLP621(BL)-D44132D8121BYG20DR8121470RI8123TL431ACLPR81221kC8123100nR81231k2R81241k5R812612kC8107100nL8106FE_PEC8103100nC8104100uU5SBU5SBW8181JST sw s8W86112pol sw 7R92to BB21642Overtravel contactL810121D8106LL4148Standby-LEDOvertravelON/OFF7654Mains21W81032pol ge 7R92531S8101C8118100nQ8114BC847BWR8113Q8111BC847BW2k2R811122kR811222kD8114R82041kLL4148R82191kR82020RD8202C12VD8201C12V321D8207redgreenD8207D8204C12VThe rectified secondary voltage is applied topin 2 of the relay winding L 8101. via protectiveresistor R 106. The cold end is open sinceQ114 is non-conducting and the receiver is instandby mode. This is indicated by illuminationof the red LED.Transistor Q 8114 is blocked, if the workingcontact is open, the device is in standby,which is indicated by illumination of the redLED.If the processor receives an ON commandfrom the infrared detector it sets its appropriateswitch output to low level. This is then fedto the base of Q 8111 via pin 5 in plug W 8181which is blocked. Via R 813, U5 SB makestransistor Q 8114 switch. The cold end of therelay coil is earthed, the working contact isclosed and the main voltage flows to the mainpower supply circuit via pin 1 of W 8613,thereby switching the receiver on.2.2 Blocking oscillator type powersupplyThe voltage supply in the Q 2400 chassis isdrawn once again from a free-running blockingoscillator type power supply. TDA 4605 isused as the control and regulating circuit. Interms of its function, this IC resembles thewell-known TDA 4601.It has, however, a different type of outputstage. The 4605 is designed to control a fieldeffect transistor.This circuit uses a BUZ 91 MOS-FET as theswitching transistor. Since control of field effecttransistors requires virtually no current,reducing the need for heat dissipation, it hasbeen possible to eliminate the heat sink in theTDA 4605 control IC and house the circuit in adual-in-line package.Dokument Q 2500 13 © Loewe ProCollege

Technology of Q 2500 colour TV setOn the secondary side, BUZ 71 A V-MOStransistors are used to stabilise U3.3, U5 andU12 in order to keep power dissipation to aminimum.The converter transformer, which also providesthe standard VDE power distribution,has a primary working winding and a secondarywinding to supply voltage to the IC and togenerate a control voltage.Secondary windings also generate the followingvoltages:UBto supply the line output stageU 25 to supply the line driver stage2.2.1 Primary sideThe mains voltage flows through the mainspower switch, the working contact of thestandby relay and the mains RFI suppressionfilter to the degaussing coil, and via the startupcurrent limiter R 613 to the bridge rectifierD613.A voltage of approx. 310 V very rapidly buildsup at charging capacitor C 620. This is appliedto the drain terminal on the switching transistorvia the working winding in the convertertransformer.Since the gate BUZ 91 is not driven at thistime, there is no load on the operating voltage.U 3.3, U 5 and U 12predominantly to supply an operatingvoltage to the digital controlU9U8for the interface switching ICsfor the video ICsUNF+ and UNFusedto supply a floating voltage to theVF output stages, approx. + 18 VDocument Q 2500 14 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500 blockingo oscillator type power supply, primary sideUBD680ZPY100R68047kC6691u/100VUBR6693k3R670100kI670TL431ACLPC67022nC6782n2D670C30VR66556kR6624k7/1%UBP6621kR663220k/1%UBR693220RR659*Typ-Var*D666SD103CC6714n7R6721kB663R62156kC622100uR6234k7R622820kC623 MP147220n3B635R10 MP12R634680kR625680kC621470n/100VMP1126I611TDA4605-35C6373n9/63VLIVE CIRCUITB619R10MP1581MP104MP13B630R10D622BA157R62710k/1%C630100p/500VC632R63022RR62422R220nR6361kR63282R23Q624BUZ91A-E3162L618FE_PEC6334n7R6332k2C6341u14R65118k/2%I669PS2561-1L-VD636BA157MP19R62622RR62922RC6364n7L626FE_PEC62822n/630V C627150p/1600VU7T639SMT+PFC2268D672C3V952019181715L619820uC624820p/1600VMP04D623STTA506F101614C620330U/450V13from BBW61121to demagnificationW618 1F611T3,15AR6131R5C612470n/310VT6122x18m5C619100n/250VC613470n/310VR6193to BBW61321FBI3.7L1M1-4D613MP03D617FUF5408C611470n/275VC6391n5/400VR63910M122C6141n/400VDocument Q 2500 15 © Loewe ProCollege

Technology of Q 2500 colour TV set2.2.2 Start-upThe power supply section is started up by anadditional starting circuit. The required voltageis rectified using a diode path in the bridgerectifier. It is fed via resistor R 621 to pin 6 inTDA4605 where capacitor C 622 is thenslowly charged. During this charging phase,capacitor C 637 is charged to 6.6 V on pin 2via an internal IC path. A reference voltage of1V that is required during the start-up phaseand later during normal operation is also generatedin the IC.If the voltage at pin 6 reaches 12 V the IC operatesand makes the switching transistorconducting via pin 5. A current flows throughboth the transformer working winding and theswitching transformer drain source path. Duringthis period, magnetic energy is beingstored in the transformer. During this conductivephase, a drain current simulator C 637,integrated in the IC, is charged on pin 2. If theinternal reference value of 1 V is reached theIC blocks the switching transistor. The magneticfield in the transformer breaks down andthis induces voltages in the windings.The start-up procedure recommences and thesystem swings/oscillates to normal operation.This is arrived at when a voltage of 400 mVhas built up at pin 1.2.2.3 Normal and control operationA static state is set in normal operation atconstant load. The operating voltage for the ICis drawn from the transformer winding pin 5-6and rectified with D622. The voltage at pin 6 inthe IC is then 11 V. The control input at pin 1is 400 mV and the duty cycle for the zero passagedetector at pin 8 in the IC is set.The switching transistor is controlled with afixed frequency of between 20 and 40 kHz,which corresponds to the instantaneous load.If the load changes, the duty cycle at pin 8 inthe IC also changes. The negative edge indicatesto the IC when the energy stored in thetransformer has been dissipated. If the loadincreases, this occurs more quickly and the ICreduces the control frequency. If the load decreases,the control frequency increases. Thismeans that load variations between approx.40 and 260 W and mains voltage fluctuationsbetween 180 and 270 V can be compensatedfor.In order to achieve a higher UB voltage stability,regulation on the secondary side is nowused which influences the primary circuit’s I669 opto-coupler. The I 669 opto-coupler iscontrolled via I 670. The control mechanism isinfluenced via several paths:- With d.c. voltage via R 663- Alternating, by coupling to the R 680 diode.- When not under load, via D 672The operating voltage is set with the P662potentiometer. A small resistance here indicatesa high value of UB. Correspondingly, ahigh value of R means a low value for UB.If UB increases, e.g. due to a smaller load onthe line output stage, UB exerts a strongerinfluence via R 663 at the input of I 670. Thisresults in the I 670 cathode outputting asmaller voltage. The photodiode in I 669 receivesmore current through R 665. The pathbetween pin 3/4 of I 669 has a lower resistanceallowing for a higher voltage on pin 1 ofI 611. Component I 611 then regulates outputvoltage until a value of 400 mV on pin 1 isreached again. If the value of UB becomeslower, then the regulation process is exactlythe inverse of that described here.Via D 680, R 669 and C 669, ripple voltagecomponents are coupled into the regulatingcircuit. In particular, this branch prevents a low50 hz ripple voltage arising on UB. With 60 hzsignal sources (NTSC, PAL 60 Hz or VGAoperation), this would result in humming interferencein the picture.Document Q 2500 16 © Loewe ProCollege

Technology of Q 2500 colour TV setWithout secondary-side regulation, e.g. inSAT standby operation, UB would increase toapprox. 180 V. In this mode of operation,other voltages (e.g. the bias voltages for the U5, U 12 branch) do not alter significantly. Stabilizationis also guaranteed for these voltagesin this mode of operation.Due to the secondary-side stabilization withUB as stabilization factor, UB without any loadwould naturally remain constant. In this case,the power supply would regulate down fromapprox. 180 V (without secondary-side regulation)to the previously set value of UB, typically146 V. This would also result in all othervoltages being reduced. The bias voltages forthe stabilized voltages would be too low andthey would no longer be stabilized. The digitalelectronics would search for errors.In order to prevent this, the regulation acts viaU 7. This is accomplished via components D672, R 693 and 666.U 7 also drops when the line-output stage isdisconnected. When this has reached a valueof approx. 6V, the D 666 Schottky diode voltagehas also fallen sufficiently for it becomesconducting. A further drop in operating voltageis prevented by the I 670 input. Stabilization ofsecondary side voltages, e.g. for U 5 and U12, still operate properly in this mode ofoperation.The indicator for this is the voltage on pin 6 inTDA4605. During normal operation this voltageis approx. 11 V. If the load increases, dueto a short circuit on the secondary side, forexample, the voltage on pin 6 drops. If it dropsbelow 7V, the logic circuit switches off. Thesame occurs if the voltage on pin 6 exceeds15 V due to complete discharge or a fault inthe control circuit. There is also a second protectivecircuit to safeguard against overloading.If the current flowing through the workingwinding in the transformer and therefore alsothrough the switching transistor is so greatthat the voltage on pin 3 drops below 1 V, thepower supply also cuts out.In addition, integrated thermal protectionswitches the system off at chip temperaturesof over 150°.2.2.5 Power Factor ControlAll TV sets with power consumption of morethan 75 W, and delivered after 01.01.2001,must be fitted with a Power Factor Control(PFC) circuit.The circuit power supplies used up to nowoverlay a pulsed current on the sinusoidalmains alternating voltage. The Power FactorControl circuit ensures current extraction isalmost completely sinusoidal. This function isimplemented by changing the power supply’sinput rangePower Factor Control2.2.4 Protective operationT639The IC contains a protective circuit to preventthe control frequency from entering rangeswhere it would otherwise damage the switchingtransistor during over- and underload. Insuch cases the system is shut down.230V~R613D613D617C611L618C628D623C620Document Q 2500 17 © Loewe ProCollege

Technology of Q 2500 colour TV setThe alternating voltage from the mains is rectifiedby the D 613 bridge rectifier. When inresonance, C 620 is loaded to approx. 310 V.Without PFC this means that mains currentwill only be drawn when the sinusoidal halfwaveexceeds 310 V. Sinusoidal current extractionis therefore not guaranteed. With thePFC circuit, C 620 is not directly charged fromthe mains. Charging of C 620 is via the C 628current pump. When the Q 624 switchingtransistor is conducting, C 628 is connected toearth. C 628 is charged via D 617 and L 619.If Q 624 is now switched off, a voltage ofapprox. 400 V is set on the drain.The energy stored both in C 628 and in thecoil can now charge up C 620 via D 623. C628 will naturally also be charged when thesinusoidal mains alternating voltage justcrosses zero and has a low value.Q 624 is switched with a frequency between20 kHz and 40 kHz, depending on load conditions.This also means that C 620 is chargedwith a current at the same frequency. Thecurrent drawn from the mains would also correspondto this frequency, but will be harmonizedby the mains input filter.2.2.6 Secondary sideAlthough the secondary side voltages arerelatively stable, and fast and transientchanges in load can be compensated for bythe field effect transistor in the primary side,stabilisation of voltages in the digital componentis still required.The two secondary voltages U 3.3, U 5, U 8,U 9 and U 12 are stabilisedFor the other secondary voltages:- UB for the horizontal stage- U 25 for the horizontal driver stage- UNF+ and UNF- for the VF output stageStabilisation is not required, as no current isdrawn from these non-controlled levels.Document Q 2500 18 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500 blocking oscillator type power supply, secondary sideU-MuteC4924u7R4921kD4911N4148D652*Best-Var*W701to power supply unit TVO32U141 an L534/(UB)L650FE_PED651T639SMT+PFC2265810201918171516141312F656F3,15AR4913R3F672T5AF689L685FE_PEF661T4A*Best-Var*C0650150p/1600VL656FE_PED671STPS20L40CF1 3R6860R1L661FE_PER6870R1C688680p/500VR6574k7/1%D656EGP30FC661680p/500V2,4C65147u/250VC656680p/500VD663*Best-Var*C682D687BYW98-200UBD661*Best-Var*C6621000uD0681D686BYW98-200C687C689680p/500VC663B548R10B549R10R06584k7/1%U25U14Q663STP16NE06FPC6724700uC657470u/50V470u/50V330nC681L686FE_PER06891RC673330nR6901RR6604k7C6554u7C691Q674STP16NE06FPU+NFR684R6521RR685L687U-NFFE_PER6881RR683100uI674TL431ACLPQ682I691L78S09CV1 IN OUTGNDC692330nC66422nD660C12VU722R6614k7C67422nR6641kR675R678I676TL431ACLPR66618k/1%R6741k1k10k/1%R681R682R691*Best-Var*3C693330nI663L7808ACV1 IN OUT 3GNDC660100uR653100RC665 C668330n 470u/50VR6684k7/1%C677C666R67710k/1%R679100k220uQ681330nC552330nR56215kQ562STP16NE06FPR692*Best-Var*C694100uR654100RC667100uU5I569TL431ACLPU9U8U12U25C659D569C12V220uC658330nU3.3R5613k9/2%R56010k/1%Document Q 2500 19 © Loewe ProCollege

Technology of Q 2500 colour TV set2.2.7 Voltage stabilisationFor each of the operating voltages U 3.3, U 5and U 12 a V-MOS transistor is used as ahorizontal controller for stabilisation. Theirgate voltages are kept constant by the connectedIC's I 569 for 3.3 V, I 676 for 5 V and I674 for 12 V. In addition, their control input isconnected to the voltage distributor by therespective output voltage.If the output voltage falls under high load, theIC's become high resistant causing the gatevoltage to increase and the horizontal controllersare controlled upwards further, whereuponthe output voltage increases again. If theload decreases the opposite occurs.In addition, voltages U8 for the video controland U9 for the interface with the fixed voltagecontrollers L 7808 and. L 78S09 are stabilised.The controllers I 663 and I 691 are nowalso located in the power supply. The inputvoltage is U 12.2.2.8 Voltage increaseTo avoid overloading the VF output phases,they are supplied with a load-dependent operatingvoltage. The control range of the circuitfor this lies between +18 V in no-load operationand +13 V at full load.The pulses taken from pin 14 of the transformerare rectified by D 681 and applied tothe emitter connections of transistors Q 682and Q681. For no-load or low-load operationno voltage is felt across current measurementresistor R 681. This means that Q 681 isblocked and Q 682 is switched through to itsbase with L level via R 684. The voltage frompin 14 of the transformer increases the VFoperating voltage to +18 V.If the noise level is increased, more current isdrawn accordingly. There is a correspondingvoltage drop across R 681, which means thebase of Q 681 goes more negative, the transistorswitches and as a consequence withbase Q 682 going positive, a greater or lesserdegree of blocking is achieved. The VF operatingvoltage is reduced accordingly.Harmonic distortion is therefore kept low. thuspreventing overheating of the output ICs. Inthis way a noise-level dependent video pumpingcan be prevented.Voltage increase for VF8T63914F689D68113R686D686L686UNF+C681R685Q682R681R687D687C687R684Q68110SM-Trafo12C689L687UNFÐR683R682Document Q 2500 20 © Loewe ProCollege

Technology of Q 2500 colour TV set2.3.1 Horizontal driver2.2.9 Servicing informationFor repairs and fault-finding in the power supplyunit the following should be noted:Always connect the unit via an isolation transformer,especially when fault finding the primaryside.The horizontal driver stage is controlled fromI 2521 on the signal board via pin 13 fromconnector W 1511. The pulse at this point is2.5 Vss.U25The load on C 620 remains active long afterthe unit has been switched off. Discharge theload if necessary via a low-resistance resistor.C521!R521T528D532R532T531Q534Operation of the power supply unit without thedigital unit is possible. For this pin 5 on pinconnector W 8181 is connected to earth, butnot until a voltage is applied to the standbypower supply. For specific failures, this testcan also be done with an integrated digitalcomponent.C527 R527C528D527C526R533Basic boardUBA check of the horizontal output stage cannotbe made by withdrawing the deflection plug.For this test L 534 must be unsoldered. Anextra load is not required.R526C524D526Q526A separate test of the power supply unit functionwithout interference from the chassis canbe achieved by unsoldering one side of thesecondary side rectifier diodes. The rectifierbranch for the UB (D 651) and U7 (671) mustbe available. The UB can then be loaded witha 100 Watt LED.U5R1044R2563Q2561R2561R2558R2562Signal boardQ2556 R2557HQ2951DEFLECTIONI 2521Video /deflectionprocessor879I 2801CCUU 7 and UB are necessary for power supplycontrol, so do not deactivate them.U52.3 Horizontal deflection and highvoltage productionOn the 100 Hz Chassis Q 2500 the horizontaldriver, horizontal output stage and high voltageproduction are essentially the same asthe predecessor.Capacitive control via C 524 prevents driverstage Q 526 being held conductive continuouslyif components are faulty or there are nocontrol pulses. Diode D 526 enables rapiddischarge of C 524, if Q 526 is controlled inthe blocking phase.Document Q 2500 21 © Loewe ProCollege

Technology of Q 2500 colour TV setIt can be clearly determined from the linedriver circuit, as from the control of the lineoutput stage, that this is a case of lowresistancecurrent control. The driver stage isequipped with a transistor, which supplies forthe drive transformer T 528 (conversion ratio7:1) output stage the required base controlcurrent of up to 0.9 Ass. To limit inductiveswitching peaks an R/C combination is connected,a.c. to earth, to the collector of Q 526after diode D 527. The driver stage operateswith respect to the output stage in alternatingoperation, i.e. if Q 526 is conducting, thenQ 534 is blocked and vice versa.2.4 Horizontal output stageAs mentioned in the previous section controlof the horizontal output stage, or more preciselythe horizontal switching transistor, alternatesaccording to the switching regulatorprinciple. Essentially the base resistance consistsof R 532 and the series secondary windingof the driver transformer T 528. The parallelarranged resistor R 533 dampens switchingpeaks arising in the inductivity.An additional anti-parallel diode from collectorQ 534 to earth, which was used as a boosterdiode in earlier forms of thyristor deflectionswitching, is not required, as in this switchingconcept the collector-base route of the switchingtransistor Q 534 fulfils the function of thebooster diode by a process of inverse operation.In practice the parallel O/W-modulationdiodes cause a perceptible load reduction ofthe switching transistor. The drawing belowshows that this inverse operation of the transistoroccurs during the first half of the trace,until about the middle of the line. In the secondhalf of the run the transistor operates asnormal with conducting base-emitter diode.Only during the relatively short flyback time isthe switching transistor blocked. The low resistancebase switching already describedenables the base peak current between +0.9A and –0.9 A in both directions to be dissipatedquickly.Document Q 2500 22 © Loewe ProCollege

Technology of Q 2500 colour TV setDocument Q 2500 23 © Loewe ProCollegeC506???FE_PEL5432k2/0W5R50644uL506L537C5241uL5401m8C5402u2/350V47RR540L53022m3R3R5413R3R5343R3R5313R3R521C541C539L538R5431k51RR594R546220RQ526FXT653R53710k/1%R53610k/1%L534150uL533FE_PEL544L542D541BA1571N5822D537BA157D533D532C591C546470p/1000VESC011MD5392 13B534R10W5322pol grau1213polW5111312111098Q586BD537Q534Q533BF422Q532ZTX614Q531ZTX712B533R5R5921RR5911RR59010R1kR586R585150RR5551k2/1%220RR0553R549150k/2%R539100kR538100kR0535100kR53312R/1%R5324k7R530R5294k74k7R528R5274k7R52656RR5254k74k7R524R51810RR51722RR51622RT5284321L5901m6C590C555100nC544C543C542C53847u/250V100p/500VC537100uC535C534100uC533100p/500VC532100p/500VC531C528680p/500VC527220n/100VC526100p/500VC0521100u15712D527EU02V0BA157D546RU2MD531D5261N4148U25UBUVideoMP29MP28MP27MP20MP18MP17MP16MP02MP01HDRIVESEKGNDFPHFLBHDGNDHPOSQ2500 horizontal output stageOW

Technology of Q 2500 colour TV setIt is conceivable that the essentially higheremitter currents (IE max. = 4.5 A) will invokeenormous "flooding" of charge carriers in theN-P- and P-N-transitions of the semiconductor.In order to guarantee rapid switchingbehaviour and to ensure rapid dischargeof the charge carriers in the base zone, thebase control is correspondingly low resistance.32“/16:9/RF c.r.t.s, 142V at 21,24,28“/4:3 and136 V for all other c.r.t.s. The exact controland switching rhythm during a line period correspondsto the principle of the switchedresonant circuit. For this the line switchingtransistor operates via its three operating conditions- conduction, inverse conduction andblocked – in such a way that the charge anddischarge procedures of the collector capacityC 531 and inductivity T 531 determine theexact trace and flyback intervals.Screen+ II Abl.0- I+UU CE0- UTrace1st partInverseoperationTrace2nd partNormaloperationSwitchingtransistortOnly during the horizontal flyback time isQ 534 blocked for 6 µs. By charging the operatingvoltage the capacitor of the parallel resonancecircuit C 531 forms the positive halfwave of a sinusoidal oscillation. C 531 andT 531 are dimensioned in such a way thatthey create horizontal flyback pulses. Thenatural desire of a parallel resonance circuit toconvert the stored charge in the capacitor intoinductance as magnetic energy leads to reversalof polarity of the current.Normally the negative component of the sinosoidaloscillation is felt on the collector ofQ 534. This attempt is however prevented bythe collector-base diode path of Q 534.On reaching the start up voltage the diodepath becomes conductive and cuts the negativecomponents. In these cases the E/Wmodulator diodes support this function,whereby in the switching transistor the powerdissipation of the transistors is reducedIn this respect it must be mentioned that thecontrol pulses are specially formed for thedual functionality of Q 534 normal and inverseoperation. In principle the trace relationship ofthe base control of 6 µs flyback and 26 µstrace time is changed to 14 µs flyback and18 µs trace time. In this way it is possible, toprocess unavoidable production dispersion ofthe driver transformer. By means of promptcontrol the switching transistor has sufficienttime to prepare for the following operationalphase.The horizontal deflection pulses are detacheddirectly from the collector of the switchingtransistor on the parallel deflection winding.Between the base point of the horizontal deflectorand the E/W diode modulator theeast/west correction information is coupled inaccordance with the dual generator principle.This procedure is almost non-reactive withrespect to the primary winding of the highvoltage transducer.The operating voltage of the horizontal outputstage is taken from the switch mode powersupply and is 146 V for 33“/4:3 andDocument Q 2500 24 © Loewe ProCollege

Technology of Q 2500 colour TV set2.4.1 High voltage productionQ2500 secondary H output stageThe filament voltage of the c.r.t. is assigned topin 9. On pin 4 the flyback pulse for the synchronisationof the control is assigned to pin 4.At the same time this pulse is rectified byD547 and fed to the c.r.t. plate via connectorW 549. The 60V occurring here is required bythe c.r.t. PCB for the speed modulator. TheUV+ and UV- for the vertical stage (approx. +13 V) occur in the windings between pin 6 and9 and pin 3 and 9.C532100p/500VD531RU2MR5313R312B533R5T53116W511Pin10 Pin11R5502k2R5421k8/2%32kVHFLBR548120RFPR545Just like the amplitude of the radiation currenta corrective voltage for the stabilisation of thehorizontal amplitude can be tapped at thebase, connection 10 of the high voltage winding.This radiation current dependent voltage is ledto the signal board via pin 11 of connectorW 511. The radiation current fuse and limiterare found here.R5343R35MP2017FOCUS13FOCUSUG2104869C54922nD5481N4148R5473R3L553R5581RD549C30VD547BA159C547100p/500VD558RU2MC556100p/500VB560R5C5502200uR551150k/2%R5521MC54822u/250VUV-C51122u/250VW550UVideo 5UF 43USVM21The operating voltage U 200 for the videooutput stage is tapped on the primary side ofthe pin 5 of the diode split transformer andrectified by D 531. In addition on connection 5another voltage UB -10 V and on pin 7 a voltageof UB +10 V are produced, which are felton capacitors C 535 and C 534. On UB = 136V there are 126 V and 146 V. These voltagesare required for the offset correction of thehorizontal deflector.3R5571RC5582200uD557RU2MUV+2C557100p/500V2.4.2 Horizontal- offset deflectorThe high voltage transducer also contains thecascade. The secondary winding of the stepup transformer is divided into four and thehigh voltage rectifier diodes are connectedbetween the individual winding sections. Thisform of high voltage production is possiblewithout the highly charged capacitors used upto now, which increases the reliability of highvoltage production and makes possible aspace-saving compact solution.The deflector pulse is formed in such a waythat through the deflection and S-correction alinear deflection results. This only functionshowever when the deflection is exactly central.As the Q 2500 chassis could also be usedas a VGA monitor, high demands are placedon linearity. For this reason the possibility ofoffset correction is created.The resistance voltage divider and the potentiometerof the focus and G2 adjustment isintegrated mechanically into the splitting combinationfor units with 4:3 c.r.t.s.Document Q 2500 25 © Loewe ProCollege

Technology of Q 2500 colour TV setA free DAC in I 2271 is used for horizontaloffset correction. The d.c. voltage felt on pin55 can be set in the servicing mode. This isfed via connector W 511 /W 1511, pin 8, to thebase of transistor Q 533 on the basic board.Q 533 together with R 555 represents a currentsource for the push-pull stage Q 531 andQ 532. The operating point for the push-pullstage is set with R 537 and the parallel circuitof R 535/538/539. At rest the operating voltageof the line output stage is applied to thebase connections of Q 531/532 and both transistorsare blocked.If I 2271 increases the base voltage of transistorQ 533 and this then conducts, the basevoltage of the push-pull stage drops and Q531 conducts. This means the d.c. current ismade more negative by resistors R 516,R 517 and R 518 and coil L 530, whereby thedeflection shifts to the left.If, on the other hand, the voltage on pin 27 ofI 2271 drops, transistor Q 533 becomes highresistance and the base voltage on the pushpullstage increases. This means Q 532 conductsand L 530 increases the voltage on pin2 of the deflection coil. This leads to a shiftingof the d.c. current component in a positivedirection and deflection to the right. Coil L 533serves as d.c. current coupling for the deflection.2.5 East/west correctionIn order to compensate for the pincushion(distortion) in 110° units in an east/west direction,the horizontal deflection current in thevertical centre must be increased with respectto the vertical start and vertical end. The rightdegree of correction is achieved by influencingthe horizontal deflection current with a verticalfrequency parabola in the east/west diodemodulator.Two generators connected to each other by abridging circuit provide the correction signalfor the E/W modulator for the horizontal deflectioncurrent.G1G2C1C2L1L2UB2D1D2UB1In the above drawing the two generators, G1 =horizontal generator, and G2 = east/west generator,are represented only by their resonantcircuits. The deflection current in the deflectioncoil L1 is supplied by both generators. Sothat the high voltage is not influenced by theE/W modulator, the voltage on transformer THis determined only by the horizontal generatorG1. Therefore, for correct bridge compensationduring the line trace, only E/W modulationof the deflection current takes place in an almostnon-reactive fashion on the horizontaloutput level. For improved clarity the conceptualflow diagram above is shown in the followingdrawing with the actual componentlocations.STHDocument Q 2500 26 © Loewe ProCollege

Technology of Q 2500 colour TV setC541C5432.5.1 CircuitThe components of the east/west outputstage, as well as the diode modulator are locatedon the basic board.W511Pin1VPROTR598C596R596Q597Q596R597Hor.vom Signal-BoardHorizontaldeflectorE/WchargingcoilC590Q534C581R581R582Q582C582R583Q589D584D539aD539bQ534C541R585D539aD539bUBE/W correctionR587C589R584L543C531C543R588Q593R589L539L588C588Q59312 3L541L536U12R593R592R591SplittingtransformerT531R590L590D590D589The video/deflection processor TDA 9332 appliesa d.c. underlying parabola type voltageto pin 3. This Information contains all correctionsfor picture width and east/west. The followingamplifier stage, consisting of transistorsQ 582 to Q 589, could therefore be implementedsimply as a conventionally baseddifferential amplifier.Control is via low-pass filter R 581, C 581 andR 582 on the base of transistor Q 582. Thelow-pass filter suppresses any noise componentsfrom the pulse width generator inI 2521.The base of transistor Q 589 is determined bythe voltage divider R 588/R 589 in d.c. andthereby determines the operational point ofthe differential amplifier.The amplification of the differential amplifier isdetermined essentially by the relationship ofthe negative feedback resistance R 583 andthe output resistances R 581/582. The parabolatype voltage, amplified to 12 V by outputstages Q 585 and Q 586, is fed via the E/Wcharge coil to the diode modulator. Dual diodeD 539 superimposes the deflection current onit and the E/W correction is implemented.Transistor Q 593 was incorporated to protectthe output stage transistor Q 586 in the eventof the deflection connector being withdrawn.Normally Q 593 acts as positive feedback toQ 586. If the deflection connector is withdrawnthe current increases through Q 586 andtherefore also through resistors R 591 /R 592.This causes Q 593 to conduct and the powerloss in Q 586 to be returned to a normal level.In the event of a fault the two transistorsQ 596 and Q 597 ensure that the unitswitches to protective operation. Q 596 isconductively controlled by a reduced basevoltage. Q 597 conducts and controls VPROTat low level. The CCU protective circuit respondsand switches the unit off.R586Q586C590Document Q 2500 27 © Loewe ProCollege

Technology of Q 2500 colour TV set2.6 Vertical output stageIn comparison with earlier models the Q 2500generation of chassis does not have an a.c.coupled, but a d.c coupled vertical outputstage. This has the advantage that the verticaldeflection coils can be supplied with currentdirectly and the large coupling capacitor canbe dispensed with. This means that verticalcorrection information can operate directly,without vertical distortions caused by the deflectioncoil coupling capacitor.As we know, a positive and a negative deflectioncurrent flow through the vertical deflectioncoils. In order for the d.c. coupled output stageto produce this negative current, it must besupplied with a +/- voltage.The two possible variants of the vertical outputstage IC´s (TDA 8177/STV9379FA) incorporatedinto the 100 Hz Q 2500 chassisare housed in a Heptawatt plastic housing.The following functional groups are incorporatedinto the IC´s as circuit components:• A power operational amplifier that is able todrive the vertical deflection coils with apeak deflection current up to 3 Ass.• A flyback generator, that generates thevoltage charge for the vertical flyback.• A temperature protection circuit that limitsthe deflection current on overload.The power operational amplifier is controlledsymmetrically and inversely on its noninvertingand inverting inputs. Therefore, thevideo/deflection processor outputs two inverselysymmetrical vertical control signals.Vertical output stageV+ VÐV-FlybackR566R578W 511Pin 1VPROTW 511Pin 4R563C564C563C567R565C579 R579 C578R573D561UV+16VUV--13V246 3 7I 561FlybackGeneratorTDA 8177/STV9379A1-+5R564R567R569VerticaldeflectioncoilsTemperatureprotection circuitR574R568C568Document Q 2500 28 © Loewe ProCollege

Technology of Q 2500 colour TV setW 511Pin 4Vertical output stageV-FlybackR559R563 C564U-SVMPicture formation is normally established bythe d.c. current component of the deflectioncurrent. This means that for a d.c. coupled Voutput stage, by simply changing the d.c.components of the control sawtooth, the d.c.component of the deflection current can bechanged, and with it the picture formation.C561D561UV+13VUV--13V246 3FlybackGeneratorSTV9379FAI 5612.6.1 Flyback generatorThe job of the flyback generator is to provide,the switching voltage for the voltage increaseduring the vertical flyback. The problem withthis is as follows:These two control signals contain all verticalcorrection information. This means that outputside S correction, which is necessary for a.c.coupled output stages, can be dispensed withcompletely. The component insert at the outputof the V output stage is also considerablyreduced. Symmetrical control almost fullysuppresses interference that can affect thetwo V control signals due to the very highcommon mode rejection ratio of the V-poweroperating amplifier. The two V control signalsV+/V- are applied to the pin connector W 511,pin 2/3 and reach the series resistors R 566/R 578 via the inputs on pin 1/7 of the V outputstage I 561. The sawtooth, which is amplifiedabout 10 times, is output by pin 5 of I 561 andforces the current through the vertical deflectioncoils.The R/C combination 568, from the output ofpin 5 to earth, prevents the tendency of theoutput stage to oscillate and protects it fromswitching peaks that can be caused by thedeflection coins. To stabilise the V outputstage, part of the sawtooth from the base ofthe deflection coils is fed back via resistorR 579 to the inverted input pin 1 .The energy requirement of the vertical outputstage is at its highest during the flyback, asthe electron stream has to be directed rapidlyfrom the lower right corner of the screen to thetop left corner.This transitory additional energy requirementis achieved by doubling the operating voltage,which is only available for the vertical outputstage. During the vertical trace, the bootstrapcapacitor C 563 is charged to approx. 26 V viaD 561. The output of the flyback generator atpin 3 of I 561 at this point is UV-/-13 V. At thetime of flyback start, the flyback generator isswitched by the output stage output at pin 5and applied to the output at pin 3 UV+/ +13 V.Due to the d.c. shift on the minus pin of capacitorC 563, the operating voltage for theoutput stage on pin 6 increases by the voltagein C 563. At the same time, D 561 is blocked,which prevents the charge in the power supplyleaking away. This means that for rapid flybackthere is a transitory +40 V (approx.) operatingvoltage available.For many c.r.t. types the flyback pulse is notsufficient to fully return the deflection beam,so that flyback lines are visible.Dokument Q 2500 29 © Loewe ProCollege

Technology of Q 2500 colour TV setIn these devices the V output stage ofSTV9379FA is used. For the flyback generatorthis has an independent voltage supply. AUSVM/60V is used that is fed to the I 561 viathe fused resistor R 559 on pin 3.If the V output stage is changed during servicethen ensure it is replaced with the same type.The two IC variants are not compatible.2.6.2 Vertical protection circuitsProtection circuits are used to protect the c.r.t.against burning if the vertical deflection fails.For a d.c. coupled V output stage a fault situationcan theoretically occur in which the deflectionsaw tooth appears to be available, buta faulty d.c. component directs the electronbeam to the upper or lower end of the c.r.t.neck. This could cause the c.r.t. neck to meltand lead to destruction of the c.r.t. neck.To prevent this a V saw tooth is taken fromthe base of the V deflection coils with R 573and a d.c. voltage is applied to the signalboard with R 2651.U40V13VVertical protective circuit via CCUtBasic boardC563C564R563W1731Pin 4R1036Signal boardU5R2594D2594I 2801CCU/Pin94D2661D2586UV+D56126 3FlybackGeneratorD2591D1769R2593C2592/93R2594Q2594R2586UV-4I 561TDA 8177Bild 2 - 15This VPROT signal is fed to the protectivecircuit that consists of the dual operationalamplifier I 2651. Operational amplifier A workson its non-inverting input pin 3, with referencevoltage of 3 V and operational amplifier B onits inverting input pin 6 with 5 V. If the VPROTsignal - Diagram A – does not fall below orexceed the reference values of 3V and 5 V,then the V deflection and the vertical d.c.component through the deflection coils is correct.If the d.c. component is too positive ortoo negative - Diagrams B + C – this is interpretedas a fault. If, for example, the d.c.component of the VPROT signal is too small(5V DiagramB ) pin 7 goes from OP B to H level andthe CCU switches the device off.Document Q 2500 30 © Loewe ProCollege

Technology of Q 2500 colour TV setVertical protective circuit via CCUCCU Pin 94D2657LL4148R2656100R7I2651LM 3588+B-456R26633k3R26544k7R26515V4k7U8C2650100nU3.3D2596LL103CR266122kD2661LL4148D2667LL4148C2662100nR2666100R 1I2651ALM 358+A-323VR26644k7MP002R1031100RC103122nW 1511/ Pin 1Signal boardV+ V-I 561+-R579VerticaldeflectioncoilsVPROTW 511/ Pin 1Basic boardC578R574R573UMP 350,8VUMP024,5V3,5V0Vt0Vt-0,8V5Va.)3VUVPROTI2651/Pin6I2651/Pin3tb.)U5V3V0VI2651/Pin6I2651/Pin3td.c. current component much too positivec.)U5V3V0VI2651/Pin6I2651/Pin3td.c. current component much too negativeDokument Q 2500 31 © Loewe ProCollege

Technology of Q 2500 colour TV setBeam current limitationD531R53112(9)C51132kVR552UvidR551Signal boardR2604R2611U8D2611R2603BCLC2604C2603I 252143 Video/deflectionProcessor14 45T53110FocusUG2D548 D549C549W511/Pin11Basic boardFPW1511/Pin11R2609C2608R2608R1043D2544FPR2608R2607 D2607R2606R2544D2549R2547R2552E/W amp. compensationPhase compensationR2636R2549Q2638R2637R2638C2638Q2639R2546U8The second protective switch monitors the Vflyback pulse that is fed from I 561 /pin 6 viaR 563 to the pin connector W 511 /pin 4. Onthe signal board this V flyback pulse is rectifiedby diode D 2591/1769 and integrated withcapacitor C 2592/2593. With the voltage availableon capacitor C 2992/2593, Q 2594 conducts.The collector of Q 2594 is then at thesame potential as L, and diode D 2594 isblocked.If there is no flyback pulse due the absence ofa V output stage, no voltage can build up oncapacitors C 2592/2594 and Q 2594 blocks.Pin 94 of the CCU is set to H level via diode D2594.If pin 94 of C 161 is set to H level by the absenceof a V flyback pulse in the operatingcondition of the unit, as described, after 2seconds the CCU switches the device back tostandby operation. This permits safe shutdown of the device with a faulty deflectioncontroller.2.7 Beam current limitationTo limit the beam current the Q 2500 chassisis provided with an average value control. Thelimit switch is integrated into TDA 9332.Document Q 2500 32 © Loewe ProCollege

Technology of Q 2500 colour TV setThe switch to limit the contrast and brightnessis controlled with a d.c value via pin 43.The switch is designed in such a way that fora voltage of >3.3 V there is no limitation oncontrast and brightness.For a voltage between 3.3 and 2.2V the contrastis reduced in proportion to the voltage. Ifthe voltage drops below 1.8 V the brightnessas well as the contrast is reduced. At approx.1 V on pin 15 the brightness and the contrastare reduced by 100%, whereupon the screenis black.To achieve beam current limitation the base ofthe diode split transformer influences the d.c.value on pin 43 of TDA 9332. Inversely proportionalvoltage information on the beam currentcan be obtained at the base.In order for the TDA pin to be at >3.3 V with abeam current of zero, the base of the transformeris connected to U 200 via R 551/552.The positive voltage in this operational state ischarged via resistors R 2608, R 2609 andR 2611 of Elko C 2603 and on pin 43 of theTDA there is a voltage of >3.3 V; there is nobeam current limitation.As the high voltage winding in the diode splittransformer operates with a virtual earth, thebase becomes negative with increasing beamcurrent, whereby C 2603 via R 2608, R 2609and R 2611 can be correspondingly dischargedto a greater or lesser degree and thebeam current controlled.Diodes D 2607 and D 2611 are provided sothat the circuit can also react to jumps inbeam current. They ensure the rapid dischargeof C 2603.In addition, for a 4:3 display in a 16:9 TV set,from pin 113 of I 2311 via Q 2612 and R 2601,the voltage on C 2603 drops. This corrects thebeam current limitation for the smaller screenarea. (see also signal board deflection).CCU Pin 94Overbeam current protective circuitU3.3D2596LL103CR258622kC2618100nD2618LL4148Q2616BC847BWR261810kC26161uU5R2617220kR2616220kC2608100nR260822kR260618k100RR1043100RC10431n111213FPW15112.7.1 Overbeam current fuseIn correct operation the beam current measurementinput on pin 43 of TDA is at a d.c.level of 2 to 4 V. According to the level, theRGB output amplifier in this IC is controlled toa greater or lesser extent, which ensures thatthe beam current limitation is implemented.If the c.r.t. is controlled upwards to the fullextent, even though the gain of the amplifierhas been fully reduced , which can occur ifthere is a fault in the RGB output stage or itsDocument Q 2500 33 © Loewe ProCollege

Technology of Q 2500 colour TV setpower supply, then the c.r.t. could be damagedif no protective measures are taken.To prevent this, transistor Q 2616 is connectedto the beam current data. In normaloperation the transistor conducts and L levelis applied to its collector thus making the circuitinoperative.If the described fault occurs, the base of thediode split transformer becomes negative dueto the high beam current, Q 2616 blocks anddue to the 5 V on its collector diode D 2618conducts.Pin 94 of the CCU is set to H level andswitches the device to standby.2.7.2 HFLB protective circuitIf the line output stage is too strongly overloadedby a fault, the protective circuits discussedcannot respond in any way. Excessiveoverloading of the H output stage causes theline flyback pulse to reduce in amplitude. TheHFLB pulse on pin 10 of W 1511 is thereforemonitored by a protective circuit. In normaloperation this pulse has an amplitude ofapprox. 35 V. Via the 20 V zener diodeD 2581 this pulse makes Q 2581 conductivein rhythm with the line frequency. CapacitorC 2584 is switched to earth cyclically with theline frequency via Q 581 and cannot thereforecharge up. This means that L level is felt onC 2584l. If a fault in the deflection circuitcauses HFLB to fall below 20 V, zener diodeD 2581 and Q 2581 block. C 2584 charges toH level. This H level is fed via D 2586 to pin94 of the CCU, which switches the deviceback to standby operation.2.8 Speed modulatorThe device is also equipped with a speedmodulator. It is located between the RGB outputsof the digital unit and the RGB outputstages on the c.r.t. board. It controls thespeed of the electron beam in the horizontaldirection, which increases picture sharpnessand prevents a defocusing effect at high contraston vertical, very bright areas of the picture.2.8.1 GeneralThe speed modulator evaluates high frequencychanges in the picture signal andsends them to an additional winding in thedeflector. The resulting magnetic field overlaysthe normal field produced by the deflectionwinding. By this method, the deflectionspeed is adapted to the picture content, whichleads to a definite improvement in picturesharpness.A picture change in a positive or negative directionproduces a signal, as shown in thefollowing drawing and thereby supplies theadditional winding in the deflector.The amplitude of the signal and the modulationlevel of the contrast are therefore dependenton the setting and the slope of thesignal change.One could also modulate the deflection currentdirectly, which would however, be moreexpensive than the second winding.Document Q 2500 34 © Loewe ProCollege

Technology of Q 2500 colour TV setJJJJSum of RGBsignalstHorontaldeflectioncurrentSum of deflectionand correctionsignaltCorrectionsignal(magnified)ttTo really understand the operation of thespeed modulator we must look at the lightcharacteristics of the pixels on the c.r.t. Thelonger a pixel is irradiated, the more intensivelyit shines, and the persistence of thefluorescent image is also longer.If the signal jumps from dark to light, the deflectionis initially accelerated briefly andthereafter remains mainly on one point. In thisway the first “bright“ pixel is irradiated forlonger and therefore shines more brightly. Atthe same time the last “dark“ pixel has moretime to fade and is irradiated for a shortertime.If the signal jumps from light to dark, however,this initially causes braking and then decelerationof the deflection in the speed modulator.This means the last “light“ pixel is irradiatedlonger and therefore shines more brightly. Onthe other hand, the first “dark“ pixel is irradiatedfor a shorter period.In both cases another, simultaneous effectoccurs. The signal change occurs while theelectron beam, without almost any further deflection,remains on the last “bright“ pixel.Pixels onscreenDocument Q 2500 35 © Loewe ProCollege

Technology of Q 2500 colour TV setW3201to signal board987654321CUTOFFU12Q2500 Speed modulatorC3182RGBQ3181R3181R3185U12Rto W548 basic boardW33015pol. ws123 Uf45L33664u7R3366270RC3172GQ3171R3171GU12C3208R3207C32103R3 SI R3153UvidC336622uC3162BR3175Q3161R3161U12BR3208Q3204Q3211R3209R3206R3215Q3157R3156C3158R3218C3221R3221R3229Q3221C3156C3157C3154C3202C3201C3203C3204R3165R3204R3212C3212R3211Q3216R3216R3220R3217C3216D3218D3219R3219C3222R3222C3219C3223R3224 R322356kR3225Q3222R3228L3226N60R3227 R3226470R 470RW3258321to booster coilSVM2.8.2 Switching of the speed modulatorThe circuit is located on the c.r.t. PCB and issupplied with RGB signals from TDA 9332 viapins 40/41/42.The RGB signals are applied to connectorW 3201 pins 4, 6, 8 at 3 Vss and are then fedvia impedance converters Q 3181, Q 3171and Q 3161. To detect changes in all threecolours, the signals are decoupled by capacitorsC 3201, C 3202 and C 3203 together.The resulting signal is differentiated withC 3204, R 3204. Control via the RGB signalsoffers the advantage that this circuit alsoworks with Teletext and OSD operation.This means that when steep signal changesoccur there are only oscillation packages withmax. 0.3 Vss on the emitter of transistorQ 3204 for processing.The input for the circuit of transistor Q 3204has a low resistance input, so that it can processsteep slopes. From the collector the 4 Vsssignals are led to the impedance converter Q3211. This supplies the signal at 6 Vss to thepush-pull output stage Q 3221 and Q 3222.The two transistors are current counter coupledand amplify the signal to a maximum 50Vss. All voltage data refers to a black/whitechange and maximum contrast.Via the voltage dividers R 3221, R 3222, R3223 and R 3224 one end of the correctioncoil on pin 1 of W 3258 is set to 30 V.The two transistors Q 3221 and Q 3222 areblocked without control, so that the other endof the coil is hanging free and no current flowsthrough the coil. Deflection occurs only via thehorizontal deflection coil.For a positive pulse transistor Q 3221 isblocked and Q 3222 conducts. This causes acurrent to flow via R 3221 and R 3222 throughthe booster coil and via Q 3222 to earth,which accelerates the deflection.If, however, a negative pulse is felt, then Q3221 conducts and Q 3222 is blocked. TheDocument Q 2500 36 © Loewe ProCollege

Technology of Q 2500 colour TV setcurrent now flows via Q 3221 through the coiland then on via R 3223 and R 3224 to earth.The reversed direction of current causes thedeflection to be arrested.The deflection coil is controlled directly fromthe collector connections. Two resistors areconnected in parallel to the deflection windingto stabilise the system and using L 3226 in thecontrol lines a throttling of clock faults isachieved.To prevent overshooting and overloading ofthe output stages a protective circuit is providedon the PCB. It affects the level of theinput signal.For very steep positive or negative flanks diodesD 3318 and D 319 conduct via C 3319.Positive flanks at the output reduce the inputsignal via D 3218, as the signal on the outputis rotated by 180°. Negative flanks on the outputreduce the input signal, as the input signalsare directed to earth via D 3319. The circuitspecification is such that it does not operatefor small signal flanks, thereby ensuringsecure operation of the speed modulator overa wide spectrum.If there is no picture signal, but only noise, theoutput stages have become overheated. Aprotective circuit is therefore provided for thiscase as well.If the current in the output stages increases,there is a larger voltage drop across currentresistor R 3156. The base of Q 3157 goesnegative and the transistor conducts. ElkoC 3158 ensures that transient, but high currentsfor steep flanks are possible. Using transistorQ 3157 in conjunction with transistor Q3216 the input signals of the output phase arereduced and overloading thereby prevented.As there is a time difference of approx. 80 nswith respect to the RGB signals in the speedmodulator circuit up to modulation of the deflectionspeed, the RGB signal circuit must beretarded by 80 ns after decoupling from themodulator if it is to function correctly. For thisreason the 80 ns time lag lines, consisting, forexample, of L 3392/3393, C 3392/3398/399and R 3391/3393 are incorporated into theRGB lines.2.9 Colour stagesIn order to avoid damaging capacitive chargescaused by, for example, long cathode wires,which could lead to the frequency responsebeing cut, the RGB output stages have beenre-incorporated into the c.r.t. circuit board.For each colour channel there is an IC whosesignal bandwidth of >12 MHz guarantees ahigh resolution even for rapid signal changesin both directions.The circuit for the three colour channels isidentical. By using ICs the components in theoutput stages could be reduced to a minimum.The output stages are energised by the speedmodulator with a max. 3 Vss. Via an RC combinationthe respective signals reach pin 3 ofthe ICs and are passed on in the IC to theinverting input of an operational amplifier. Thenon-inverting input and thereby the work pointis set via pin 1 of IC .The resistance between pin 9 and pin 3 providesthe negative feedback for determinationof the amplification factor.Document Q 2500 37 © Loewe ProCollege

Technology of Q 2500 colour TV setColour outputCut-offRAM memoryto SVMGR3181U12C3181Q3181R3391 R3393 R3348R3397Switch off flashsuppressionD3391R3392UfU12U12R3356R3352C3202URef 2,4VR3185R3186L3392 L3393C3392 C3398 C3399U12C3397R3380U200C3393Q3396C3396R3396L3398C3368D33678611R336810RG9 12 45R33627V3001R3367C3367C336029kVUvidUG2Focus 1Focus 2D3396R3394RR3398BBR3353C3352C3374C3394I 3391 -+GrünFor control of the c.r.t. cathodes the signalsare applied at a maximum 160 Vss via pin 7and 8. Control is via pin 8 with a correctivesignal on pin 7, in order to achieve an automaticblanking current control. The emitterfollower on the output of the output stagepermits rapid blocking of the cathodes ontransition from bright to blank. This permits thedelaying effects that are otherwise present tobe reduced.The IC's also contain a component for temperaturedrift compensation, as well as a circuitvia which the transient current can be decoupled.Current information is taken from pin5, and so with an additional sensor controlcircuit an automatic blanking value control (cutoff control) can be established.2.9.1 Cut off controlThe cut off control is basically a sensor controlcircuit. It controls electronically dynamic componenttolerances and signs of wear, e.g. ofthe c.r.t.s.It also has the following advantages:− automatic blanking value equalisation.− Avoidance of colour distortion during c.r.t.warm up time and control of above averageageing in the initial operating hours.Document Q 2500 38 © Loewe ProCollege

Technology of Q 2500 colour TV setLM = Leakage current measurementCut - off measurementMRMGMBCut - off measurement pulseLMMRLMMGR - ChannelG - ChannelLMMBB - ChannelThis means that the traditional adjustmentcontroller and the associated adjustment workis no longer required.Directly after the vertical picture return, measurementsare taken of the leakage current ofthe c.r.t. systems at ultra blank and then, oneafter the other, the cathode currents of thethree systems after input of a specific blankvalue.These pulses are fed with the respective RGBsignals via the output stages of the c.r.t. systems.From the output stage IC's the respectiveblank currents of the control circuit invideo IC I 2521 on the signal board are suppliedvia its pin 44.From a comparison between the establishedblank current and a reference value, whichrepresents the specified current, a differenceis obtained, which controls the cathode currentvia the video output stages as a controlleroutput. It is dynamically stabilised just abovec.r.t. blocking current, up to control tolerances.As small leakage currents in the output stagesof the c.r.t.s could lead to distortion of the cutoff control, measurement of the leakage currentis carried out during the vertical flybackbefore measurement of the three blankingcurrents.35TDA 9332Cut - off circuit principle36 37RGBInsertion38White PointandBrightnessControlBeamCurrentLimterC2534Fromcathoderay tubePCB43A consequence of a change to the UG2-voltage is that the cut off control opposes thischange. Only a transient effect can be detectedon the screen, as long as the control3429OutputAmplifierandBufferContinuousCathodeCalibration404142RGBW1051Cut off44BCLDocument Q 2500 39 © Loewe ProCollege

Technology of Q 2500 colour TV setrange of the cut off control is not exceeded.This means an optical comparison of theraster 2 voltage is ruled out. A comparisonusing a voltmeter is also very unreliable, asthe voltage source with approx. 500 MOhm isvery resistive.A comparison of the raster 2 voltage is thereforemade in service mode.2.9.2 Switch off flash suppressionTransistors Q 3341 and 3343 are responsiblefor suppressing fluorescent flashes on switchoff, caused by c.r.t. charges that are not dischargedquickly enough via the bleeder in theDST. On start up and during operation theyhave no function, as the base and emitter of Q3341 are at the same level it is thereforeblocked, as is Q 3343.On shut down the base of Q 3341 via R 3341very quickly becomes zero volts. Due to DiodeD 3342, that is blocked in the direction of thepower supply, Elko C 3342 cannot discharge.Q 3341 switches through and that in C 3342can switch through via the emitter-collectorthe output side connected transistor Q 3343.In this way the RGB signals that control theoutput stage IC's are directed to earth.Fluorescent image persistence is thusavoided.Until Elko C 3342 is discharged and the circuitbecomes ineffective, the c.r.t. discharges viathe bleeder.2.10 Rotation panel2.10.1 Raster correctionfrom RGBoutput stage ICsSwitch off flash suppressionD3391D3381D3371Q3343C3341R3344R3343D3342C3342R3342Q3341U12D3341R3341So as the earth’s magnetic field affects thecolour uniformity of the c.r.t.s, it also influencesthe picture raster. For a geometricalcomparison, a definite alignment towards east(“face to east“) is therefore prescribed.If the device is turned towards another point ofthe compass, rotation of the picture on thescreen occurs according to the type and sizeof c.r.t. and local characteristics.Raster correction"Face to East" comparisonRaster rotation"Face to North"Correction of rasterrotation by rotation panelDocument Q 2500 40 © Loewe ProCollege

Technology of Q 2500 colour TV setTo compensate for this a rotation panel (rastercorrection) is incorporated into the 81 cm devicewith chassis Q 2500. As the effect on theraster is less on smaller and 4:3 tubes therotation panel is not required.For the raster correction a circular coil is attachedto the cone of the c.r.t. If a uniformcurrent flows through it, the electron beamrotates around its own axis. As the createdmagnetic field overlays the field of the deflectioncoils, the picture can be rotated about itscentral point.2.10.2 CircuitFor raster correction the DAC on pin 25 of thevideo/deflection processor TDA 9332 is used.The voltage produced can be adjusted by theuser via “rotate picture“ and in service mode.It flows via W 1021, pin 3 to the rotation panelW 1, pin 3.R16U12ROTW01123R21R23R11C16C30C23R12C11C17I 01C10+89-C01R36Q26Q28C27 C472 1W31R38 R41R42Q47Q48I 01A+1-C0232C31C124I 0111R39In this way the inverting input of the operationalamplifier on pin 9 of I1C is controlled onthe rotation panel. At maximum anticlockwiserotation approximately 3.2 V is applied and atmaximum clockwise rotation 3.3 V. The operationalpoint is adjusted on pin 10 by R21 andR23. According to the voltage difference betweenpin 10 and pin 9 the push-pull stageQ26 and Q28 is controlled. On the base connectionsthere is a voltage of 0.6 to 10.6 V.The output voltage of the push-pull stage isapplied to pin 2 of the correction coil and atthe same time is fed to the inverting input ofoperational amplifier I1A via R 38 and R41.This also controls the second push-pull stageQ 48/Q 47. The two OPVs and push-pullstages counteract each other. This means thata current can flow to earth via Q 26, throughthe correction coil (from pin 2 to pin 1 on W31)and via Q48. On pin 8 of the OPV there is avoltage of 10.6V at maximum clockwise rotationand on the other output pin 1, 0.6 V. Otherwisethe current flows via Q 47 through thecorrection coil (in this case from pin 1 to pin 2on W 31) and via Q28 to earth.In this way the current can be adapted to therequired correction with respect to directionand size. This correction can, however, alsoact in reverse, if the coil is rotated on the deflector.The control electronics for the rotation coil isfixed firmly to the Q 2500 chassis. However,the rotation coil and control electronics shouldbe considered as a unit. In the event of a faultthe coil is then changed as a complete unit.Document Q 2500 41 © Loewe ProCollege

Technology of Q 2500 colour TV set2.11 NF output stagesThe two amplitude controlled VF signals areoutput from pins 56 and 57 of MSP 3411 onthe signal board. The signals are applied tothe base of transistors Q2081/2083. The transistorsare switched as impedance convertersto prevent, as far as possible, the coupling ofinterference pulses on the VF wires betweenMSP and the output ICs.The VF signals reach the two output stagesvia the coupling capacitors C 2082/476. Inbetween are the two mute transistorsQ 1586/88. (See signal board).U+NFC466U+NFR466Q2500 Stereo sound output stageC468R468LS-RLS-L12RSIGUMUTE345W61013pol13polW211123Mute456U-NFU-NF9 pin Cubeconnector123456789123456789W470C467B210B214U12B222R46721W47121W481R478L479C478L489C488C473C471U+NF13 27 10R4796 414 I474TDA7296 1R47598 3C477 15C475U-NFU+NFR488R489C481U+NF14C485R485C483U+NF13 27 106 4I484TDA7296 198 315C487U-NFR473 C472C474C489C484D474R474R476R483 C482C476R484C486R472R477R471C079R482UMUTEC492R492Q469R469D491The output stages are implemented easily asall control processors (volume, tone, balance)as well as base width switching are processedin the MSP.Compared to previous models the Q 2500 hasnew output stages. TDA 7296 is equippedwith an internal mute function that removesany residual on and off switching interferencethat is not fully suppressed by the additionalmute switching.The internal mute switching is controlled onpins 9/10. If the voltage on the pins is

Technology of Q 2500 colour TV setOn start-up C 479/22 µF is very quicklycharged up by R 471/22 k. For C 489/22 µFcharging occurs more slowly via R 477/10 kand R 4476/33 k. This means that in thecharging phase pin 9 is more positive withrespect to pin 10. On shut down C 489 dischargesrapidly via D 474 (which releases R476) and R 477. Pin 9 is again more positivewith respect to pin 10 and mute is implementedagain internally.TDA 7296 can be considered to be an operationalamplifier. It is controlled by its noninvertinginput pin 3. The amplification is calculatedfrom the negative feedback combinationR 478/473.This results inR 478 22 kV = 1 + --------- = 1 + -------- = 33R 473 0.68 kThe amplified signal is felt on pin 14 and forthe left channel is fed to the loudspeakers viaL 479.The R 479/C 471 combination is necessary foran internal bootstrap. In addition, the outputphase is equipped with an overload and temperatureprotection circuit.The two output stages are supplied with voltagesymmetrically. It is taken from the transformerat zero potential and rectified andsmoothed by D 686/687 and C 687. With thehelp of the R/C combination 466 and 468 it issplit into +/- 18 V (see also power supply).This measure achieves a halving of the peakcurrent by the rectifier diodes D 686/687 and ahigher undistorted output performance, especiallyfor low frequencies.An output stage without any electrolytic capacitorscontributes to this.Document Q 2500 43 © Loewe ProCollege

Technology of Q 2500 colour TV set3 Receiver components3.1 HF/IF unitFour receive components can be used in deviceswith Q 2500 chassis. One is the terrestrialtuner, or HF/IF component, which processesfrequencies from 47 MHz to 860 MHz.This hyperband tuner is located on the basicboard.Second is the single SAT or dual SAT receiverfor the first IF from 950 MHz to 2150 MHz.This is partly a standard feature or can beretrofitted for certain sets.In addition, for full IP sets a PIP-HF/IF unit forthe reception of terrestrial signals is incorporatedinto the hyperband range. In this case,however, the audio band is dispensed with, aspicture for picture only video signals are required.This is also built into the basic board.With this equipment the set is able to processall television signals, irrespective of whetherthey are received by terrestrial antennae orvia cable units, and even when derived fromparabolic antennae.3.1.1 HF/IF componentsA HF/IF combination is also used. All functionsfor current European television standardsare located in one housing, with twoprovisos. The IF consists of only one pictureIF. The audio demodulation takes place in theaudio IC on the signal board. From the IFcomponent only the sound IF is supplied asbroadband.This means that the ceramic transducer andan expensive sound/IF switch are not required.Secondly, for lower price models notdestined for export HF-IF, designed only forPAL and SECAM BG, is used. In this case,the change-over to SECAM L and NTSC andthe components necessary for this are notrequired.This means the two designs are hardware andsoftware compatible.The following block circuit diagram shows themulti-standard design. Some of the componentsare not fitted to the BG version.As in earlier models, the electronics is housedin an HF proof folding housing.Document Q 2500 44 © Loewe ProCollege

Technology of Q 2500 colour TV setIF-AGCAntennen Splitter45 MHzhigh pass27 MHztrapAnt inAnt out power splitterMASV5TunerM, N, BG, I, DK, L, L1V9IFHigh Band ChighoscIFon/offMixerrejection Mid Band Cmidoscon/offMixerLow Band AlowoscMixerBSV9CNORBAV5P4 P5LOBSPMNBLIL1PNAFCV9 TAGC V33 SCL SDA IDCMNBLML1ZFSyst.: M, N, BG, I, DK, L, L134,4 40,412 M L132,38 33,412AFCDetectorCVBSM,NAFSSIFon/offPLL0123770-150mVZF-inpos./neg.switchCSAGC PNSIFM o. L1AGCSIFQSS - IntercarrierMixerAmpl.SIFAM Demod.I,DK,L BG,L105....10mVVIFAmplifierVCOFPLLTWDTunerTuner VIFM,N BG,I,DK,L,L1AGC AGCAGCd = 25 dBAEL1TOPCblFM-PLL-DemodulatorVoltageRef.TDA 9818Video DemodulatorAmplifierTunerAFC4,5 5,5 5,74C AF+5V21Cv AGCT PLLMixer Osc ICCCVSDocument Q 2500 45 © Loewe ProCollege

Technology of Q 2500 colour TV set3.2 DVB Board3.2.1 OverviewThe DVB decoder is able to convert DVB signalsthat are transmitted free to air via satelliteinto the appropriate analogue audio and videosignals, which are then fed to the signal processingof the TV chassis.For the conversion of the L band signal derivedfrom LNC or a multiswitch, the combitunerof the satellite unit Sat 6 is designed asan assembly set or retrofit set for the Q 2500chassis. It also supports the interface to anintegrated online module.AnalogueAV progr.CVBSSound-ZFor L-R27 MHzVCXO2+2 MBSDRAMDVB-DecoderSatelliteantennaAnalogue/Digital-Sat.-TunerI-SignalQ-SignalAGCI2C-BusDVBI2C-BusTVADCQPSK,FECI2C-BusDemux,DescramblerAV-DecoderV-EncoderControllerAudio -DACRGBS-Video toScart-MatrixAudio L-R toScart-MatrixLNC-ControlDISEqC2+2MBDRAM1+1MBFlash128 kBEAROM2x RS 232 toTV-Controller andOnline-ModulSat 6The following block diagram shows the principalarchitecture of the Sat 6 and DVB decoder.The interface between Sat 6 and theDVB decoder is formed from quasi-analogue Iand Q signals, the AGC signal, the IIC busand a port used for DISEqC. The IQ signalsare derived in the satellite tuner by quadraturemixing of the second IF (479.5 MHz) in thebase band. The AGC signal provides amplitudecontrol of the IQ outputs of the tuner. Asthe Sat 6 unit is able to process analogue anddigital signals, both the DVB controller and theTV controller have access to the tuner and theLNC supply. The switching of the IIC busesused for this is achieved by the TV controllerdriven by the Sat 6 unit.The processing of DVB signals from the tunerbase band interface to the analogue output isachieved by two high integration chips. Thefirst is the front-end component STV0299B(ST microelectronics) that digitises the IQ signalscoming from the tuner by means of dualADCs, demodulates them (carrier and pulseextraction) and carries out Forward Error Correction.The second component is the MPEG-2 demultiplexer-, decoder-, backend- and controllerchip STi5500 (ST Microelectronics),which demultiplexes the MPEG-2 transportbeam, feeds the selected audio and videocomponents to the MPEG-2 decoder for decompression,decodes them and then convertsthem into analogue output signals. TheSTi5500 also has an integrated 32-bit RISCDocument Q 2500 46 © Loewe ProCollege

Technology of Q 2500 colour TV setcontroller that forms the core of an independentprocessor subsystem. It is responsible forthe control and diagnosis of the other functionalunits of the DVB decoder module.Commands and data are exchanged via aserial interface to the TV controller. In addition,the DVB is responsible for applicationssuch as the Electronic Program Guide forDVB programmes. In this case the on screendisplay from the OSD component of theMPEG-2 video decoder is produced. Forcommunication between the TV controller andthe controller of the online modules, the datais transferred transparently between the twoserial interfaces.Document Q 2500 47 © Loewe ProCollege

Technology of Q 2500 colour TV set3.3 Features and parameters3.3.1 DVB internal featuresFeature Standard/value range NotesGeneralReceiving and decoding of DVB compatible free to airsignals via satelliteImplementation as integrated module for incorporation orretrofitting in Q 2500Operational control integrated into the Personal ControlSystemElectronic Programme Guide based on standard DVB-SIPre-programmingMPEG-2 main Profile@Main levelSupport for 4:3 and 16:9 source format (letterbox filtering)and 4:3 display format (16:9 display format by scalingin TV up converter)Q2500 basic, medium,high endASTRA 19.2° East andEutelsat 13° East720x576 Pixel, 25 HzPan&Scan isnot usedTeletext processing to DVB teletext standard ETS 300 472, s. [5] Reinsertionin the Y signalSupport for DVB radio programmesDocument Q 2500 48 © Loewe ProCollege

Technology of Q 2500 colour TV setFeatureStandard/value rangeNotesSatellite front endDemodulation and channel decoding to DVB satellitestandardUse of the combituners (analogue/digital) of the Sat-6satellite unitInput level area 45...80 dBµV to 75 OhmInput frequency levelInput socket950...2150 MHzF female, 75 OhmIF wideband 36 MHz -3 dBDemodulationDemodulationQPSKQPSKSymbol rate 15...30 Mbaud 1...30Mbaud adjustable15...30MbaudguaranteedForward Error CorrectionUse of the LNC voltage generation of the Sat 6 satelliteunit or an optional switch fitted directly on the DVB moduleOption for antenna controlLNC currentViterbi, De-interleavingand Reed Solomon13/18 V, 0/22 kHz, DiS-EqC Tone Burst, DiS-EqC 1.1(partial)400 mADocument Q 2500 49 © Loewe ProCollege

Technology of Q 2500 colour TV setFeatureStandard/value rangeNotesAudio/video backendInterfaces to chassisController and graphicsControllerWorking memoryMPEG and video memoryGraphicsOSD comparison in service mode (background brightness)FBAS/audio input(SAT6), RGB output, Svideo/FBAS output, audiooutput (Stereo)32 bit RISC controller,50 MHz clock4 Mbyte DRAM,2 Mbyte Flash ROM4 Mbyte SDRAMInternal OSD with720x576 pixel resolution;to 8 bit/pixel, 4bit/pixel usedY_nominal+/-6 levelsDocument Q 2500 50 © Loewe ProCollege

Technology of Q 2500 colour TV setFeature Standard/value range NotesSoftwareLocal update of operating softwareGeneration and update of programme list via variousoptions: pre-programming, frequency search procedure,semi-automatic programme search (manual setting ofcarrier currents and automatic search for carrier currentlevels)Separate search procedure for DVB television and radioprogrammesAutomatic setup of audio channels (default: configurationin menu language) and display of options (menu tree:sound/voice)Programme information: Decoding and display of Present_Eventand Following_Event via DVB-SI andTeletextGeneration of an SI database for freely selectable preferredprogrammesWith Next-View harmonised Loewe Digital EPGSeparate Radio EPGDetection of encrypted programmesDetection of inconsistent data, robust reaction and generationof messages on fault detectionDVB Service Mode for comparison (VCXO), diagnostics(Test picture) and deletion of DVB-EAROMsDVB module: via servicesocket (RS232-Interface, 5 V)Document Q 2500 51 © Loewe ProCollege

Technology of Q 2500 colour TV set3.3.2 DVB/TV featuresFeature Standard/Value range NotesPIP: DVB in TV or VGA, TV in DVBAutomatic picture format switchingCreation of a common programme list with analogue anddigital programmes with special recognition of the digitalprogrammesSeparate radio mode with radio programme list„D“Satellite: 2 independentleads and Sat 6twin fitting necessary!3.3.3 ArchitectureThe following block diagram shows the architectureof the DVB decoder for Q 2500.Document Q 2500 52 © Loewe ProCollege

Technology of Q 2500 colour TV setto Signalboard from SAT6-Einheit to Signalboard to/from SAT6 unitto/from TVOto/from SignalboardTV-Contr./Serv.socketsW7611RGBW7680C-DVBCVBS/YW7506Audio L/RW7120 W7100W7781 W7943I2C AGCI/QL/R-AnaCVBS-AnaY-DVBCVBS-AudioSwitchAudio-DACCS4334DVB-ANAL/R-DVBDig.AudioI2CSER.TRANSP.QPSK-Demod.FECSTV0299Quarz13.5MHz32 MBitSDRAMRGB/Y/CKM416S1020CT-G827MHzVCXOMK2727SSD-BUSCONTROL27MHzCONTROLLERDEMUXVIDEODECODERAUDIODECODERVIDEOENCODERSTI5500RESSER.3SER.1&Quarz4MHzDebug/JPIRGB/YCdriverPON-RESET3.3V3.3VsupplyDVB-DecoderQ2500EMI-BUSU5U12 U5A1MBitEAROMAT29LV010-25TC32 MBitFPM-DRAMKM416V1200CT-616 MBitFLASH2 * TE28F008B3T90+5Vcontroller+12Vcontroller+5VcontrollerU14 U25W7916Power Supplyfrom Basic-BoardDocument Q 2500 53 © Loewe ProCollege

Technology of Q 2500 colour TV set3.4 Components3.4.1 Satellite front end3.4.2 Functional distributionThe satellite front-end processes the signal ofthe 1. satellite IF coming from the Universal-LNC or Multiswitch up to the MPEG-2 carriercurrent, fed to the MPEG-2 demultiplexer/decoder.It also houses the componentsfor the supply and control of the antennaunits. The functions mentioned are distributedto blocks of the Sat 6 (Tuner, LNCsupply) unit DVB decoder (AD conversion,demodulation, forward error correction). Theseparation is implemented via an analogue/digitalsatellite tuner in order to be ableto use redundancy free processing of TV andDVB signals. The reasons for the choice ofinterfaces are:Fewer requirements for the screening of theSat 6 unit and low-interference quasianaloguebaseband interface to DVB decoder.Due to the functional unity, the relevant parametersfor DVB reception of the Sat 6 unitare specified in the following.3.4.3 TunerThe tuner converts the signal of the 1. satelliteIF in the base band. Signal processing foranalogue and DVB signals is distinguishedonly in respect of demodulation, and is thereforealmost identical with respect to the prefilteringand amplification stages, mixing onthe 2. IF, channel selection and amplification.For this the implementation of an analogue/digitalcombi-tuner is advised.The Sat 6 unit incorporates theBS2W7VG2002 (Sharp) analogue/digital satellitetunerDocument Q 2500 54 © Loewe ProCollege

Technology of Q 2500 colour TV setSat6: Main - analog/digital Twin: analogRF inIoutQoutIout DVBQout DVBLNB1/2SCLSDAAGC InTunB2B4B6B5AFT2AFT1CVBSTSA5523P6Port P0 ... P7W100 toDVB-BoardSCL4 SDA4 U5 U12Video-TPW680 toSignal-Board5.5 10FM InS1 R OutAF Rf/MHzSTV0056S1 L OutAF LSGS LNB2LM2574SAA1300digitalanalog10f/MHzBB InI/OSCLSDAU5U12S1 Vid OutS2 Vid RtrnS3 Vid RtrnS2 Vid OutFBASSDA SatSCL SatMax4546U16U26GNDW390 toBasic-BoardAGCSCL DVBSDA DVBDiSEqCGNDW120 toDVB-BoardGND5V12VSCL4SCD4N.C.30VW260 toBasic-BoardDiSEqCW760 toSignal-BoardUlncPhilipstunerCVBSAS SCL SDA Ud U5TDA6151-5xAmplitude+/-/BBMuteFBASSIFW770 fromBasic-BoardSGS LNB2LM2574SAA1300P4P5P7P0P1(TSA5523)P3: Clamping on/offP2: MuteCVBSSIFU26DiSEqCSCL4SDA430V 5VDocument Q 2500 55 © Loewe ProCollege

Technology of Q 2500 colour TV set3.4.4 DVB demodulation and fault correctionAdditional signal processing comprises:- AD conversion of the quadrature signalsfrom the tuner,- QPSK demodulation andchannel decoding in the form of ForwardError Correction.Demodulation and channel decoding arecompatible with ETS 300 421. In practice anin-house chip solution is used for all threefunctions. For reasons of interface compatibilitywith the MPEG decoder, the STV0299Bmodule from ST Microelectronics is used.There then follows specification of the practicalimplementation, as well as parameters,which in ETS 300421 are only partially set.Document Q 2500 56 © Loewe ProCollege

Technology of Q 2500 colour TV setParameter Value/algorithm NotesChip STV0299B Manufacturer: ST MicroelectronicsADCADC-TypeResolutionSampling ClockIQ input voltageDemodulationProcedureSymbol rate range STV0299BSymbol rate over all (includingtuner) without neighbouringchannel assignmentSymbol rate over all withneighbouring channel assignmentDual2*6 bitVariable, dependent on symbolrate1 VssGenerated by on chip PLLCoherent grey coded QPSKdemodulation1...45 Mbaud1...30 Mbaud Lower limit: Phase noise oftunerUpper limit: IF bandwidth oftuner15...30 MbaudPreferred value for symbol rate 27.5 and 22 Mbaud Used in frequency search procedureOther symbol ratesDecoding from NIT (deliverysystem descriptor) of BarkerChannel or manual selectionRoll off filteringHalf NyquistRoll off factor 0.20 (20 %); 0.35 (0.35 %)Used roll off factor 0.35 (35 %)Carrier recoveryDigital PLL with internal derotatorand hardware lock-indetectorPulse recoveryProcessing of the normal orinverting spectrumInternal digital PLLDocument Q 2500 57 © Loewe ProCollege

Technology of Q 2500 colour TV setParameter Value/algorithm NotesChip STV0299B Manufacturer: ST MicroelectronicsAGCAFCForward Error Correction (FEC)AGC analogue/digital tuner withPWM output.Internal digital AGC on poweroptimisation within the signalbandwidth.digital software AFC1. FEC stage Viterbi decoder- Constraint length 7- Rate ½- Other code rates ½, 2/3, ¾, 5/6, 7/8- Rate selection Automatic or manual2. De-interleaver- Synchronous word extraction- Convolutional interleaver- Depth 123. Reed Solomon Decoder- Number of parity bytes 12- Block length 204- Correctable byte error 8- Energy dispersal de-scramblerOther- Carrier current output Parallel or serial- Used mode for output Serial- Control IIC bus- On Chip Error MonitoringDocument Q 2500 58 © Loewe ProCollege

Technology of Q 2500 colour TV set3.4.5 LNC supplyThe components for LNC supply located onthe Sat 6 unit or optionally on the DVB module.The control of the circuit on Sat 6 is byDVB operation via the IIC bus and a free port(DISEqCWR) of the DVB decoder/ controllerchip STi5500. In TV operation the TV controllerassumes control of the Sat 6 unit. Thisachieves better decoupling of the softwaremodule.Parameter Value NoteLNC voltages0/14/18 VLNC currentmax. 400 mACurrent limitationElectronic22 kHz signal yes (modular)Amplitude pf 22 kHz signal 1 VssDuty cycle (50 +/- 10) %DISEqC version 1.0 and partially 1.1 Write onlyDocument Q 2500 59 © Loewe ProCollege

Technology of Q 2500 colour TV set4 Signal boardMounted on the signal board, which is linkedto the basic board via connectors, are all thenecessary building blocks for device control,interface switching, video, audio and videotextprocessing.These are:- The device control with computer circuit,operating software and the EAROM for thestoring of system data and customer specificcalibration values.- Production of system cycle frequency necessaryfor a digital design.- The digital IC’s necessary for picture signalprocessing.- The video/deflection processor for the productionand synchronization of controlpulses.- Digital audio processing for analogue transferredinformation and NICAM decoding.- The teletext decoder, integrated into theSDA 6000, with page memory, in which upto 3000 text pages, according to design,can be saved and which also generates theOSD for the user control.- The signal and interface selection by correspondingIC’s controllable via the I²C bus.- Optional IC’s for video processing, picturein picture.4.1 Device controlFull device control is implemented by a Siemens16 bit processor (SDA 6000) togetherwith Loewe operating software. The teletextfunction is also integrated into the SDA 6000.A standalone teletext processor is thereforenot necessary.All processes in the digital signal preparation,in the tuners and interface selection arechecked and controlled via a microcomputerintegrated into the SDA 6000. The processoris also known as the CCU (Central ControlUnit).It also supports the operating, tuning andstorage system on the frequency synthesisprinciple. Without the DVB module there are220 programme storage locations, and withthe DVB board there are 1470. The programmelocations are available for TV andalso for radio operation. The total number ofstored programs must not exceed 220 (1470).For the AV inputs six additional places arereserved.Operating software is held in an externalEPROM. For the storage of c.r.t. and systemspecific data there is an EAROM for devicecontrol. The latter also contains programmelocation information.All three modules, CCU, EPROM and EAROMare mounted on the signal board.The remote maintenance sensor permits controlof possible device functions. The chassistuning is also carried out by remote maintenance.For this, the sensor IC generates a serial dataword for each command that is transferred tothe receiver with a delay. This signal is demodulatedby the IR receiver and prepared insuch a way that it can be sent directly to theCCU as an RSIG signal.The CCU detects the local operating commandson a line by the different voltage levels.Document Q 2500 60 © Loewe ProCollege

Technology of Q 2500 colour TV setBlock diagram - Device controlIR transmitterReceiverunit 1PIPrecieverunitPIPprocessorInterfaceICsSAT or Twin-SATI2C-Bus 1I2C-Bus 2SDRAMIRrecieverLocaloperationSDA 6000AddressesEPROMI 2926DataStandbyPSUStandbyandON - LED6 MHzReset inReset outSwitchinginputs andoutputsIR-OutEuro/AVTVORS232Service/Controlto DVB/TV-OnlineVideo processing50 Hz 100HzI2C-Bus 0Audio processingEAROM 1EAROM 2DeflectionThe CCU operates as a central control andinformation module. The software is held in asexternal EPROM. It concerns data necessaryfor the control of the digital IC’s, tuning, OSD’setc.For control of all processes in the device the C161 bus system:- generates I²C bus 0transmits data to and from the EAROM. Inaddition it controls the picture and audiosignal processing.- generates I²C bus1controls the 1st and 2nd receiver unit onthe basic board, the switching IC’s for theaudio and video signals on the signal boardand the optional PIP processor.- generates I²C bus 2controls the satellite units and partially controlsthe switching IC´s for audio and video.Dokument Q 2500 61 © Loewe ProCollege

Technology of Q 2500 colour TV setA B C D E F GR11312345D114SYMPOL-LCD76Z121Z221Z312Z4121317X1406Y1507Y1613X1712X1811X1910X20Vss21Lou2203Y2302Y2415XI 10116X 1205Y 1104Y 10XT1 9XT2 8Vdd 76RES 5T1TO 400Y 301Y 214X 1R106R112C111C112X111R101C101R118D118R117D117UBUB7654Z5212Z92Z122Z1522Z6 Z7 Z811V= 1 12Z101 1 2 1 312Z134 1 5 1 612Z16Z11Z14Z177 1 8 1 92222R416R414Q416C423R411R407Q414R404R410Q404UBR111UB54D105Z181R408 R403 R402 R4062x1,5V3203Z191Z201Z212Z222UBT M 1 E 1 i22R122Z2321R124Q1212Z24212Z251 OKZ2612D1212Z2712R120R121FB Control 101Z282 2Z29 Z30 Z312211rt gn 1 ge1 blFB Control 1501A B C D E F G4.1.1 The infrared sensorWith the state-of-the-art IR transmitter all devicefunctions, with a few exceptions, can becontrolled remotely. Starting with on/off viacontrol functions such as volume/contrast, tocontrol of the satellite antenna.To ensure remote control of all functions, buttonsmust have double or extended switchingfunctionality.Operation is via a well-organised menu structure.For this a cursor cross is provided on theremote control. In addition, frequently usedfunctions can be assigned to the four colourkeys. This does not set the command in theremote control, but a corresponding value inthe device software. In the high-quality systemDocument Q 2500 62 © Loewe ProCollege

Technology of Q 2500 colour TV setrange device the various functions are supportedby an LCD display.An 84 C 122 Philips microprocessor is used inthe remote control for the Q 2500 chassis(Control 10 for Loewe Systems and Control150 for Loewe.). This is an 8 bit standalonemicrocontroller, especially designed for use ininfrared remote controls. It has very little externalwiring and is able to control the transmitterdiode directly via an amplifying transistor.The modulator is incorporated into the IC.The processor is equipped with Loewe specificsoftware, which is mask programmed. Tooperate the Q 2500 chassis, commands areissued as RC 5 code, level 0.The operating commands are formed on thetransmitter keyboard by linking a Y input (Y4Y7) with an X input (X10 X17).Internal circuit 84C1229UB7ROM1k x 8ROM32 byteOscillator8X1114,3MHzosz f / 30HardwareModulator6WDTI 101PCA84C122ATOutputDriver21RSIGT15BatterycheckTO/INTVSS20322322101114151918171612412134Y01 Y03 Y05 Y07 X11 X13 X15 X17Y00 Y02 Y04 Y06 X10 X12 X14 X16TO/INTDocument Q 2500 63 © Loewe ProCollege

Technology of Q 2500 colour TV setThe operating commands for videotext arespecified as a sub-program in "Level 0".The transmitter IC produces a code word foreach command and adds two start bits and acontrol bit. The two start bits are always H,and the control bit changes each time the buttonis pressed. It indicates to the central controlunit, whether a new command is present,or the current command is still valid.This 14 bit codeword is modulated with a 36kHz carrier and applied serially to pin 21 of 84C 122.The digital Information is expressed by thestep direction within the bit (Biphase).If the button is pressed for a long time on thereport control the codeword is repeated after114 ms.This signal is supplied to T 121 via resistorR 124, amplified and radiated via infrared diodeD 121. The transmitter diode is now nolonger covered by a dispersion window. Thismeans the current can be reduced to f 900mAss. The current can be taken directly fromthe battery, which means that no additionalElkos are necessary on the operating voltage.14 BIT - CodewordStart bitsAdress bitsCommand bitsExample:Codeword for command searchCarrier = 36kHz1,78 1,78 1,78 1,78 1,78 1,78 1,78 1,78 1,7814 BIT = 24,92 mst (ms)HH H L L L L L L H H H L HOn pins 8 and 9 of 84 C 122, the ceramic oscillatorX 111 is the component that determinesthe frequency of the pulse oscillator forthe synchronisation of the system and for theproduction of the carrier frequency (fTr = 1/12fCycle). Using the ceramic oscillator X 111means that tuning of the cycle frequency isnot needed.The circuit is functional at an operating voltageof 2.5 – 3.5 V and draws a normally energisedcircuit current of = 1 uA and an operatingcurrent of 35 mA. The transmitter therebyachieves a range of >10 m.The voltage source is two micro-alkalimanganesebatteries.Document Q 2500 64 © Loewe ProCollege

Technology of Q 2500 colour TV setAfter switching to the service mode, chassistuning is implemented with the FB transmitter.The service mode is called up by pressing thefunctional button “?“ four times, so that the“Service“ display appears, and then pressingthe “M“ button on the remote control withinone second. Then using the curser buttons,the individual tuning functions can be calledup. Tuning is also carried out using the cursorkeys. The data is initially stored in the workingmemory C 161 and is only transferred to thememory on operation of the "ok" memory button.Once returned to normal FS operation,use the "E" button to return to remote operation.Pressing the Z 1 button switches the remotecontrol processor to another mode. Thismeans that the transmitter can be used forboth a videorecorder and DVD player fromLoewe. For the videorecorder, however, controlis only possible with Korythso code, asused by Panasonic. For the DVD player weuse the RC 6 code.If the remote control is not used in the videorecorderor DVD mode for 20 sec, then itautomatically switches back to the TV mode.The video or DVD mode is displayed for Control10 by the LCD and for Control 150 by anLED on pin 2 (Y1) and pin 3 (Y0).For Control 10 the LCD is controlled fromports Y3 to Y7. Up to Y3 these are also usedto query the button matrix.The operating voltage is also monitored inControl 10 and displayed correspondingly inthe LCD. Measurement of the battery voltageis carried out by transistors Q 416, Q 414 andQ 404 on pin 5 of 84 C 122.4.1.2 Infrared receiverC8216I 8216InfraredrecieverR8216R8205R8217Q8202U5SBRC55V0VThe IR receiver on the local control unit is athick film circuit and is fully encapsulated.The IR signal from the transmitter is convertedinto an electrical signal by the receiving diode,amplified and prepared in such a way that it isavailable on the output as 2 Vss.With the next transistor Q 8202 on the localcontrol unit the signal is amplified to 5 Vss. Inthis way the IR decoder in SDA 6000 can besafely controlled via pin 5Via IC I 2716 and transistors Q 2721, Q 2731and Q 2741 the IR signal is applied to pin 8 oneach of the three Euro sockets. This allowshidden videorecorders to be remotely controlledvia the IR receiver of the television setand the AV switching voltage line (see AVoperation).Via Q 2823 the signal reaches transistor Q2862 on pin connector W 1076. Via W 1076the IR signal is supplied to a connectedonline-box.The pulse width for the RC 5 code of the remotecontrol is about. 900 µs. If a connectedMulti Media Component is operated with theControl@media IR keyboard, the data is nottransferred with the slow RC 5 code, but withan RC MM code (MM-Multi Media) designedfor fast data transfer. The pulse width for theRC MM code is 167 µs.The pulse width of 167 µs requires an IRreceiverwith a very short time constant.Therefore, in Multi Media devices a special IRreceiver is used, which for operational pur-Document Q 2500 65 © Loewe ProCollege

Technology of Q 2500 colour TV setposes cannot be replaced by one from a normalTV set.4.1.3 The SDA 6000 central control unitA Siemens SDA 6000 is used in the Q 2500chassis for control of device functions. This 16bit processor is a development of the C 166family of single chip CMOS microcontrollers. Itcombines excellent CPU characteristics of upto 8 million computation operations per secondwith high functionality, flexibility and highcapacity input and output ports. The SAD6000 has 5 Ports (Port 2 – Port 6) with a totalof 44 inputs and outputs. It was designed especiallyfor applications, where cost plays acritical role. This makes the processor suitablefor use in colour TV sets.SDA 6000CVBS1CVBS116...21Slicer1Slicer2ACQ16AMII-CacheBootRom32Instr./Data16CPU-CoreC166DataDataData1616InternalRAM2 Kbyte16ExternalBusInterface16D-Cache16X-BusInstr./DataInterrupt ControllerPECOSC(6 MHz)XTAL36 nodes (8 ext.)XRAM2 KByteGASRUFIFOD-Synch4-ChannelADC7-bitUSARTASCSPISSCGPT1T2T3T4GPT2T5T6I2C-BusRTCWatchdogOCDSJTAG3 x 6 BitDACPort 5 Port 3 Port 2 Port 4 Port 643615887HVIn the Q 2500 chassis the processor must fulfilthe following functions:- Oscillator for generation of the CPU cyclefrequency.- Generation of the clock frequency for thebus systems.- Processing of the RSIG signals and localoperation commands.- Generation of the I²C bus systems for controlof the HF/IF units, processing of pictures,video text, PIP and audio, for communicationwith the memory IC, the SATreceiver unit and the interface selection.Document Q 2500 66 © Loewe ProCollege

Technology of Q 2500 colour TV set- Control of LED’s for operating and standbydisplay.- Creation of further switching processes,e.g. ON/OFF, AV transfer, etc.- Simulation of a clock synchronised by VPSinformation.- Timer function for programmable disconnecttime and recording timer.- Code converter for IR commands for theremote control of a video recorder via theAV voltage switching line and the Dolbysurround unit.- RS 232 for communication with the onlineas well as the DVB module.- Digital Link Plus Control for the 3Euro/AV socketsIn order to fulfil the required tasks the followingcircuit components are combined in onechip:- C 16 core with CPU and interrupt controller- 2 kByte XRAM as working memory- Interface for the external ROM- Quarz controlled clock generator- Interface for the three I2C buses- Multifunctional timer- IR decoder- ON/OFF Flip-Flop- Reset circuit for internal reset- Reset circuit for external IC’s.- Ports P2 to P6 with 44 input and outputpins.Many of these functions are implemented notby the hardware of the processor, but by theLoewe-specific software.4.1.4 ResetFor correct functioning of the device, variousreset pulses are necessary. The first requiredis a reset on pin 73 for the SDA 6000, as soonas its operating voltage U3.3 is available andthe 6 MHz system cycle has run. This reset isproduced by I 2941. After this reset the SDA6000 starts to operate and implements andemits control commands.The microprocessor also has a reset on pin 8,produced by I 2946, if the circuit power supplyhas run and all IC’s have an operating voltage.This reset is retarded in SDA 6000 andthen emitted from pin 100 to the digital IC’s.RESET digital component input pin 8The reset for this input is formed by a steeppositive flank. As U3,3 is the last voltageswitched by the power supply unit, this reset iscoupled to the voltage. The reset pulse is createdin I 2946 and is present on pin 8 of themicroprocessor, if all IC’s in the chassis havean operating voltage. SDA 6000 can then begincontrolling the IC’s. In addition the processoralso reacts, if the reset is not present onpin 8 or during operation. Normally 5 V is alwaysfelt on a reset input, provided the deviceis fully switched on.RESET digital component output pin 100Via this pin the microprocessor sends the resetto the other circuits. This is coupled to inputpin 8. In this way the processor can monitorthe reset, and for transient voltage failurescan prevent, the level on the reset line collapsing.On the other hand, the circuit alsomakes it possible for the SDA 6000 to emit asoftware controlled reset on pin 50 during operationIn standby and on start up L level is initiallyfelt on pin 100. Not until the SDA 6000switches pin 100 to H level, does the L/H flankproduce the reset for the IC’s. During operationthe reset inputs must be held permanentlyat H level, otherwise the working register willbe deleted.Document Q 2500 67 © Loewe ProCollege

Technology of Q 2500 colour TV setThis reset reaches MSP 3410 /pin 21, and thetwo VCP 3230/33 /pin 15.All other IC’s either do not need a reset orgenerate it on switching on the operating voltage.4.1.5 Creation of cycle frequencyThe internal oscillator of SDA 6000 is synchronisedwith a 6 MHz quarz on pins 108 and109. The cycle frequency for the bus systemsis obtained from this frequency by internaldistribution. They are from 70 to 400 kHz respectivelyfor the I²C bus systems. The cyclefrequency is transferred under software controldepending on the current function.4.1.6 Operational commandsThe SDA 6000 receives operational commandsas serial data information by RSIGsignal on pin 9. The local operating commandsare applied to the CCU on pin 126 asvarious voltage values.Pin 126 operates as an ADC with 6 bit resolution.By various voltage dividers on the threeoperating unit buttons, various voltage levelsare produced.The voltage levels are digitised by the ADC,and based on the measured values the CCUissues the appropriate commands.The following voltages are produced by manipulationof the various buttons:•• “+“ button- 0.5 V• “-“ button- 1.1 V• “ “ button - 1.8VThe overtravel contact is connected to pin 93of the CCU.4.1.7 LED displayThe red standby LED is controlled via pin 96of the CCU. In operation the remote controlcommands in RC5 code are acknowledged bytransient illumination of the LED. For standbyoperation the pin is set to the H level andtransistor Q 2853 thereby conducts, whereuponthe LED illuminates. The ON LED iscontrolled via pin 78 with the ON/OFFcommand.When the power supply is switchedon this line is set to the L level, whereby thegreen ON LED also illuminates. SAT standbyoperation is indicated by illumination of thetwo LED’s.4.1.8 ON/OFF functionIf a switch-on command is present, the outputON/OFF, pin 78 of the CCU is set to L level.This blocks transistor Q 8111 in the standbypower supply, whereupon Q 8114 conductsand attracts the relay. The system voltage isable to reach the main power supply, whichbegins to operate.The device starts operating at the selectedprogram location. The output is once again setto H level by an off command.With an ON/OFF command the two transistorsQ 2961 and Q 2966, which form part of themute circuit, are switched, thus suppressinginput and output noises.4.1.9 Protective circuitIn order to avoid excessive high voltage, c.r.t.defects or other serious damage due to faultsin the vertical deflection, caused by excessivebeam current, the device is switched tostandby. In addition, pin 94 of the CCU is setto H level. In normal operation L level is present(see description basic board Section 5.2– 6.2).Document Q 2500 68 © Loewe ProCollege

Technology of Q 2500 colour TV setThis switching is implemented by multiplexer I2716. The IC is controlled by the CCU via theoutputs pin 15/80. According to the status, seetable, the IRIN/IROUT signal is switched tothe respective Euro/AV socket.An optional online module can be controlledby transistor Q 2862.Infrared signal pathIR-outW 1913/2R29035IR INQ2902U5R2859IR receiverU5ControlLogik andcodeconverter997IR SIR OUTQ2823D2856R2856R2826Q2856IR outW1610/4Q2862U5U5SBRC out/TVOW 1076/2I 2801SDA 60001580A B OutputL L AV3 / Pin 8H L AV1 / Pin 8L H AV2 / Pin 8R2717133I 2716215Q2741Q2721AV3 / Pin 8AV2 / Pin 8AB109Q2731AV1 / Pin 8The software for the RSIG signal switching isfitted with a load memory function. If there isno information about which socket should beused RSIG is applied to AV 1. If anothersocket is selected, the signal is then applied tothis socket. If no socket is selected, the signalis applied to the one last used. This is truealso for standby.4.1.11 SAT standbyIn order to create a situation where a videomachine can also receive signals from theSAT receiving unit, which is integrated into theunit, without the TV set needing to be in operation,the horizontal output stage in this operatingmode is switched off. This is achievedby an H level emitted via pin 79 of the CCU.This switches transistor Q 2951 and the horizontalcontrol pulse from the video/deflectionprocessor TDA 9332 is lead to earth.Document Q 2500 70 © Loewe ProCollege

Technology of Q 2500 colour TV setAs both the vertical and the RGB output stageobtain their operating voltage from the diodesplit transformer, this allows the entire c.r.t. tobe switched off and the power input in thismode to be reduced. In normal operation pin79 of the CCU is at L level and transistor Q2951 is high resistance.The c.r.t. is switched off when:a) a timed recording for a video recorder isbeing processed in the TV set.b) on switch off using the remote control, ifpreviously, via the video menu, a recorderhas been set to record.c) on switch off using the remote control, ifpreviously overplaying between the socketsof the TV has been activated.d) Radio – operation is activated (after 20sec.).In all these cases all other stages of the chassisare fully operational. Except for d) thesound in the MSP 3410 is switched off via theI²C bus.4.1.12 SAT unit controlControl of the Sat/TwinSat unit is implementedby the CCU via the I²C-Bus 2.The SAT unit VI used is also able to controlappropriately equipped switch boxes or LNCsvia DiSEqC Level 1 (Digital Satellite EquipmentControl). In this system pulse modulationof the 22 kHz signals allows data to be exchangedbetween receiver and peripheral devices.This means that the current differentLNC supply voltage switching information, 22kHz and control function will be replaced andsimplified by separate control lines.In the standard, a logical 1 is defined as 11periods of 22 kHz signals (0.5 ms) followed bya 1 ms pause (22 periods). The logical 0 isrepresented in reverse, i.e. 22 oscillations (1ms) and then a 0.5 ms pause (11 oscillations).For this, each bit requires 1.5 ms for the transfer,which corresponds to a maximum transferspeed of 666 bits per second. After eachtransferred telegram, there must be a pauseof at least 6 ms (132 periods).Control is implemented according to the SingleMaster - Single/Multi Slave principle. Masteris always the SAT receiver, and the externalcomponents (LNC multiswitch, etc.) arethe slaves. Therefore, each communicationfrom the receiver is started and the externalcomponents can only transfer data, after theyhave been requested to do so by the master.A command from the master contains a 1 byteframe, a 1 byte address, a 1 byte commandand 1 or more bytes of data. The responsesconsist of a 1 byte frame and 1 or more bytesof data. Each byte is always followed by aparity bit (P) for error checking.The frame byte determines, whether the datais sent by the master or the slave. The addressbyte contains the information that determineswhich peripheral module (switchbox,LNC ....) is addressed. The command bytedetermines which switching function is to beimplemented (selection LNC, level switching....). In the data byte additional information canbe exchanged. There is still enough freespace in the DiSEqC command set for futurerequirements. This means that the system hasbuilt in futurability.For the DiSEqC control the SDA 6000 has aninput and output respectively. Communicationwith the SAT unit in the device is via a commonline on connector W 1211, pin 7 on thebasic board and from there via W 250, pin 8on the SAT unit.Pin 90 of the CCU is used as an output for thecontrol of peripheral devices. The 22 kHzsignalon the SAT unit is switched using theH level. By switching between the L andH level the 22 kHz is switched by the SAT unitfor the required period and a command is thenissued via the coaxial cable.Document Q 2500 71 © Loewe ProCollege

Technology of Q 2500 colour TV setIf the SDA 6000 is waiting for data from a peripheraldevice, then the 22 kHz must beswitched at L level on pin 90. The device addresseddampens the 22 kHz signal for therequired period by changing the input impedance,so that the data can be transferred tothe SAT unit of the TV set. The SAT unitchanges this signal into L and H pulses of thesame duration, which are applied to connectorW 1211, pin 7 on the signal board. The signalis inverted in transistor Q 2831. The DiSEqCinformation is then made available to the SDA6000 on pin 7.4.2 Bus systems in Q 2500 chassisSeveral bus systems are used in order to implementthe large number of switching andcontrol functions of the Q 2500 chassis in areasonable time, and for error-free addressingof the ICs.For this the SDA 6000 generates three I²Cbussystems with which the memory IC, thecontrol ICs for the HF/IF component, the ICson the SAT unit, the converter for video andaudio, the building levels in the video section,for PIP and multi-sound processor are controlledThe I²C bus systems 1 and 2 on the otherhand operate with a common clock line andseparate data lines. The I²C bus system 0operates as usual with separate data andclock lines.In all I²C bus systems there is constant datatraffic. If the Bus Stop command is issued orthe device is started with the Power On command,the bus lines are then set to 5 V d.c.Document Q 2500 72 © Loewe ProCollege

Technology of Q 2500 colour TV setQ 2500/H bus systems(only with DVB)SDRAM64Mbit-H16Mbit-B/MControlV24 serviceinterfacePicture 4 - 10SoundMSP 341124 C256(EAROM 2)I2C- Bus 024 C 64(EAROM 1)27 V 322/160(Operating software)CCUSDA 6000V24 RXD/TXDI2C-Bus 2(optional)DVBModule8 pinOnlineModule(optional)(only with PIP)PIP-VideoVPC 3233Video Comb.FilterVPC 3230VideoswitchTEA 6415I2C-Bus 1I2C-BusDVBSAT-/Twin-SATunitVideo/deflec.prozessorTDA 9332ChromaswitchTEA 6415(only with PIP)PIPHF/ZFFALCONICSAA 4993µP-BUSBESICSAA 4979AudioswitchTEA 6420AudioswitchTEA 6422HF/ZF(Hyperband-Tuner)4.2.1 I²C bus systemsThe I²C bus is a two-wire bus system consistingof a DATA line and a clock line. This bussystem permits the serial and bi-directionalexchange of communication between severalmicroprocessors and peripheral ICs that possessan I²C bus interface. This means that thenumber of connections is reduced, which resultsin a simplified switching structure, andincreased reliability (fewer solder points, connections,contacts, etc.).Via pull-up resistors, both lines are in a stateof rest (i.e. no data transfer) at H level. Datatransfer starts if a clock line is "High" and anegative flank (H > L) appears on the DATAline (Start condition). Evaluation of the dataoccurs during the H level of the clock pulse.Data inputs/outputs in I2C busData inData outP 14k7P 2Data inData out+5VDocument Q 2500 73 © Loewe ProCollege

Technology of Q 2500 colour TV setThe end of data transfer (Stop condition) occurson signalisation of a positive flank (L > H)on the DATA line and concurrent H level onthe clock line.SDASCLMaster-Sender/Receiver(µC)Slave-Receiver(Display)SCL frommasterSDA signalvia transmitterSDA signalvia receiverStartSSlave-Sender/Receiver(RAM)Master-Sender(µC)1 2 8 9Slave-Sender/Receiver(E/A-Interface)9th clock bit for A• Multi-sound processor MSP 3410 to IFandVF processing.• The video processor VPC 3230, I 2271 fordigitising of input signals and processing inthe main signal path. It conducts the digitalY/UV signals to the I 491 memory.• SAA 4979 for conversion of the digital Yand C signals into analogue Y, R-Y and B-Y signals and for the control of the digital100 Hz processing with the two half picturememories and the SAA 4993.• The video/deflection processor TDA 9332for generation of the RGB control signalsfor the c.r.t. plate and for generation of thedeflection pulseUp to 400 kbit/s can be transferred via the I²Cbus interface of the SDA 6000. The data andclock impulses are switched by softwareswitching logic to the respectively requiredbus connections.The CCU operates on its I2C bus outputs witha level of 3.3 V. The other ICs and componentsoperate with TTL level. Adaptation ofthe CCU level to the TTL level is by transistorsQ 2883/86/88/91 and Q 2893.The following functions are controlled via theI²C bus systems:I²C bus 0 with SDA 0 and SCL 0Only the EAROM I 2931 is connected to theI²C bus 0. This memory contains all start valuesand customer specific values. The data isselected here on start up and when makingadjustments or writing to the EAROM on shutdown and for memory processes.If a DVB module is retro-fitted the secondEAROM I 2936 is also used. Programme datafrom 220 to 1470 is stored here.• Video processor VPC 3233, I 2151 for PIPsignal processing. The digitised Y/UVsignalsare fed to the two PIP synchronousmemories I 2161/71.The I²C bus has a maximum cycle rate of 400kHz.I²C bus 1 with SDA 1 and SCL 1Just like the I²C bus 0, fixed pins are also providedfor the I²C buses 1 and 2 in the SDA6000. Buses 1 and 2 operate with a commonclock line and separate data lines. Data isswitched to the respective line for the requiredbus in an internal transfer switch.The following are connect to the I²C bus 1:• The tuning and transfer IC’s on the receiverunits in the basic board.• The transfer IC’s for video (1 x TEA 6415)and audio (TEA 6422 and TEA 6420) forthe interface on the signal board.Document Q 2500 74 © Loewe ProCollege

Technology of Q 2500 colour TV setThe I²C bus 1 operates with a cycle frequencyof 100 kHz.I²C bus 2 with SDA 2 and SCL 1The Sat or Twin Sat unit is controlled from theSDA 6000 via the I²C-Bus 2.There are tuning ICs in the receiver unit. Generationof the tuning voltage and control of theband and standard transfer or LNC supply onthe SAT receiver.4.2.2 IC 24C64 memoryA 24C64 64 kbit memory is used. To distinguishthis EEPROM from the similarly soundingEPROM it is given the designationEAROM.In addition to system data for the digital ICsthe EAROM also contains user specific data.This is programme related location data suchas channel, reception range, standard, etc., aswell as customer specific tuning values forbrightness, volume and contrast, for example.The 24C64 has a memory capacity of 65536bits, and is organised into 8192 x 8 bits. Thememory life is at least 10 years, with morethan 1 million write and read actions guaranteed.Inputting and outputting of data is controlledby the SDA 6000 and implemented viathe I²C bus 0. For this the CCU generates an8-bit address word preceded by a start bit.The 8-bit value is composed of a 7-bit word forthe IC address and one bit, containing the onor off command.This address word is checked by the IC's connectedto the system for conformity with theaddress words they hold, and receipt is acknowledgedby an acknowledge bit from theappropriate IC. In the socket the master IC(SDA 6000) transfers the storage location address.This address consists of two 8-bitwords, receipt of which is acknowledged by anacknowledgement bit for each bit respectively.If this occurs, the 8 data bits are transferred toor from the memory IC and receipt is confirmedby the appropriate IC.Transfer of the data described is implementedvia line SDA 0 and is synchronised by theclock on line SCL 0. After transfer of the lastacknowledgement bit, the command "Input"sets the save procedure in motion. During thesave procedure the inputs SDA and SCL of24C64 are locked, in order to prevent any externalinterference with the memory during thistime.After the start up routine the system data isread from the memory by the SDA 6000 viathe I²C bus and and then the data is transferredvia the I²C bus systems to the appropriatedigital IC's.To prevent inadvertent deletion or overwritingof the memory on start up or shutdown, theWrite Protect line pin 7 of the two EAROMs isconnected via Q 2943 to the Reset line. In thestart up and shut down phase, pin 7 of bothEAROM`s is switched to the L level. Inadvertentdeletion or overwriting is thereby prevented.In the operating state H level is appliedto pin 7.4.2.3 EPROM M 27 C 322Device specific software is held in EPROM I2926 as non-volatile data.An IC with 32 Mbit memory is used. Thememory is divided into 2097152 x 16 bit areas.Data transfer from the EPROM to the computeris implemented via connections D0 toD16. The memory addresses, from which thedata is recalled, are transferred previously vialines A0 to A 20.Document Q 2500 75 © Loewe ProCollege

Technology of Q 2500 colour TV set4.2.4 SRAMData that is necessary for the functioning ofthe CCU is temporarily saved in the 64MBITDRAM I 2916. Owing to additional functions inthe EPG and DVB the internal RAM area inthe CCU is no longer sufficient to store all thedata required. Up to 3000 videotext pages arestored in this DRAM.4.2.5 Search functionsOn implementing the search function bypressing the appropriate button the SDA 6000permits the SAA 4979, via the I²C bus, to outputpermanent blank in the blank stages. Inthis way the picture is sampled and using anothercommand from the MSP, the sound aswell.The required frequency is communicated as awhole number multiple of 62.5 kHz from theSDA 6000 via the I²C bus to the tuning IC.From the tuner each set oscillator frequency ispresent as the actual value. It is sub-divided inthe IC and compared to a reference frequency.The sub-multiple ratio is determinedby C 161.Using internal UP and DOWN pulses the tuningvoltage is delayed until compatibility isreachd. The PLL engages and communicatesthis to the SDA6000 via the I²C bus. It thenrequests the VPC via the I²C bus for the availablestandardised synchronous signals. Ifsynchronous pulses are present, the permanentblank is lifted. In the event that there areno synchronous signals, the SDA 6000 communicatesto the tuning IC the next highestsub-multiple and the tuning procedure beginsanew. The search procedure only stops whena transmitter is found. The SDA 6000 determinesthis by querying the VPC about thesynchronous pulses present.On transfer from one FS band to another, thecorresponding band switching information isautomatically switched at the same time. Dependingon the device settings changing ofstandards is carried out either automatically ormanually.If no transmitter is detected in the selectedchannel on the normal frequency, the channelis searched from its lower limit in 1 MHz steps.If a transmitter is still not found, the systemjumps to the next highest channel.4.2.6 StorageIf a channel has been found and the correctstandard set by the search procedure or directinput of a channel, it can be saved to any programmelocation between 00 and 220. In addition,all tuning and switching information iswritten to the EAROM via the I²C bus.4.2.7 Programme recallFor programme recall the required programmenumber is input to the SDA 6000 via the remotecontrol. Via the I²C bus it requests theEAROM to communicate the details of thisstorage location (division ratio, fine tuning, FSstandard). This Information is passed via theI²C bus from the memory to the SDA 6000,which then passes it to the tuning IC in thetuner. The IC sets the band switching outputsto the required band and required standardand moves the tuner oscillator to the allocatedfrequency. The fine-tuning value is also consideredwith respect to the oscillator frequencyand corrected by the AFC. The tuning remainson the required frequency, even when notransmitter is available.During the search procedure the channels aresearched in ascending order within the selectedstandard. For the PAL B/G, SECAMEast, NTSC Europa and SECAM L standards,cable channels are also searched.Document Q 2500 76 © Loewe ProCollege

Technology of Q 2500 colour TV set4.2.8 System clockA realtime clock is integrated into the SDA6000 to enable timer functions for transmitterswithout videotext and timed SAT standby programming.It consists of a computer-integrated timeswitch and the associated software formingpart of the operating software. The synchronisationand setting of this internal clock is implementedby the appropriate videotext information.It is therefore necessary on starting up thedevice to select a transmitter with videotext,otherwise clock setting has to be carried outmanually.In standby operation the clock continues torun.The following logic is provided for setting thetime:• On switching on using the mains button theclock is set to 0.• On reception of a videotext transmitter theclock is set within one minute.• In operation the clock is permanently synchronisedwith the videotext time, so longas time is running in the text.• If the time deviates by + 1 or 2 hours, it isonly on selection of program locations 1, 2or 3 that it is set to the videotext time, toavoid time zone errors.NoteIf during operation the time is correctedmanually, synchronisation with videotext timeis no longer implemented. The time is thenrunning free and after a few days large deviationscould occur. Synchronisation of the clockwith the videotext can then only be implementedby re-setting the processor, i.e. afterswitching off and on the mains switch.The system clock controls the recording of aconnected videorecorder, i.e. the switch offand switch on time. For these functions it isimportant that the system clock is correctlyset. If no transmission with videotext is received,the time and date can be manuallyset.Note:The switch off timer can only be completelydeactivated with “--:--“. If “00:00“ is set, then at24.00 the device switches to standby.4.2.9 Control of signal processingThe SDA 6000 microprocessor controls andmonitors all signal processing. To do this it islinked to the signal processors via the I²C bussystem. Each processor has an integrated I²Cbus interface and a working memory. Thecontent of the working memory is deleted onshut down. This means that the data requiredby the processors must be reloaded duringthe start up routine.This data is stored ex-works in a non-volatileform in the memory IC of the EAROM 24C64.This tuning data is also already stored in replacementEAROM's and therefore only requiresminor corrections if an IC is changed.The cost is about the same as current tuningcosts after a change of chassis and can beimplemented via the FB sensor. A computercan be used for tuning, as detailed in numberof specialist magazines, but does not saveany time.On start up C 161 reads the tuning valuesfrom the memory via the I²C bus and entersthem into the working memory of the appropriateprocessors via the I²C bus. Apart fromthe static data that the system requires forfunctioning, data for the picture amplitude,picture geometry, picture width, etc. is containedin this entered information. It also includesthe customer specific tuning informationsuch as brightness, colour saturation,volume, etc. The latter can be changed at anytime by the customer, and by using the memoryfunction the changed values can be enteredinto memory in a non-volatile form.Document Q 2500 77 © Loewe ProCollege

Technology of Q 2500 colour TV setChanges to these values will be communicatedvia the I²C bus to the appropriate processorsduring the adjustment procedure andcan then be adjusted to the required values.All data read in on start up as well as datachanged by the customer during operation, ischecked during operation by continuouscommunication between the SDA 6000 andthe signal processors. If deviations occurthese are corrected immediately.This is particularly the case for timedependenttuning values such as, for example,white value, black value and c.r.t. leakagecurrent. For this reason in devices incorporatingthe Q 2500 chassis, ageing of, forexample, the c.r.t. only becomes apparentwhen the scope of control is exhausted andthe c.r.t. is totally worn out. In our chassisthese dynamic tuning values are thereforesubject to special treatment. The values forthese functions held in the memory are automaticallyupdated to the current values oneach save procedure. In this way updating ofthe current wear-determined values on startup is not necessary, which the end user willsurely notice.For control and adjustment procedures via theremote control and local operating buttons thechanges are initially made only in the workingmemories of the appropriate IC’s and in theregister of the SDA 6000. Normally the savingof values in EAROM must be implemented byan additional command (usually the OK button).If the remote control is used to switch thedevice to standby, then the data in the registerof the SDA 6000 is available when the unit isrestarted. The data within the unit, such as thelast volume level set is retained.When the unit is switched off at the mains themicroprocessor register is deleted, and on thenext start up only the EAROM data is available.So that specific settings are retained, theEAROM has an area for “Last memory“ data.On shut down the data is saved to this area(e.g. last programme location). In addition, afew seconds after programme location changethe set programme location is saved in theLast Memory data area.4.2.10 Service modeIn order to carry out chassis tuning the devicemust be placed in the required service mode.The remote control can then be used to callup all the necessary functions for chassis tuning,with a few exceptions. After successfultuning the new values must be saved.The exact functions available in the servicemode can be found in the service instructionsfor the appropriate device.4.2.11 Video textIn the 100Hz TV set system the videotextfunction and the production of overwritingOSD is now the responsibility of the CCU SDA6000.For this reason the FBAS signal is fed to pin117 of the CCU. The CCU controls full dataseparation and memory administration internally.The VT pages are then stored in theSDRAM I 2916.The VT information as also the OSD overwritingare applied to pins 112/113/114 of theCCU as RGB signals.4.2.12 Picture signal processingPicture signal processing is implemented byhighly integrated modern circuits that havebeen used for the first time by Loewe, in similarIC variants, in the Q 2300 chassis generation.The highly integrated IC’s mean that forthe two 100 Hz generation chassis Q 2100and 2200, the 100 Hz module necessary forthe signal board can be dispensed with. Allthe ICs necessary for signal generation canbe fitted without problem on the componentside of the signal board. This also providesmuch simpler faultfinding, which is also favouredby the clear signal flow.Document Q 2500 78 © Loewe ProCollege

Technology of Q 2500 colour TV setThe picture signal processing is mainly in digitalform, with ICs from different manufacturersbeing used. The video processor VPC 3230developed by Intermetall is used in the frontend. A Philips IC set is used for the 100 Hzprocessing. This IC set was reduced by higherintegration to two chips and the two half picturememories. The new SAA 4993 in theQ 2500 chassis is used for the latter. The microcontroller,the memory controller, the50/100Hz memory and the DAC are all combinedin the SAA 4979 (BESIC). In the backend of the Q 2500 chassis there is a new processorthat contains both the video and thedeflection function. The Philips TDA 9332video/deflection processor has the item numberI 2521.In addition, the Q 2500 chassis can also beoptionally equipped with picture in pictureprocessing. This enables one or three smallpictures to be inserted (see picture in picture).A split screen is also possible for the first time.4.2.13 Components for signal processingThe following is a short overview of the componentsand their functions as used for signalprocessing. The signal path, pin-assignmentsand the exact functioning is explained later.The processing is also described in detaillater.- VPC 3230Video processor8-bit ADC for FBAS and Y/C signals4-line comb filterMulti standard colour decoder for PAL/NTSC and SECAM20.25 MHz clock generatorLetterbox detectorLine compression and decompressionfor zoom modes(Falconic: Field and line rate converterwith noise reduction IC)Dynamic noise suppression set by user.Suppression of intermediate line flickeringDLC (Digital Lineflicker Reduction).Suppression of motion in horizontal movement,DMI (Digital Motion Interpolation).Suppression of motion in movies, DMM(Digital Movie Mode).Line interpolation, in order to display 576lines in all zoom functions, DLI (Digital LineInterpolation).- SAA 4979(BESIC: Back End System control IC)The integrated half picture memory is for50/100Hz conversion.Control of 100 Hz signal processingSynchronisation of 32 MHzPeaking and CTI (Colour TransientImprovement) to improve Y andchroma interfaces.Horizontal samplingDAC for Y, R-Y and B-Y- TDA 9332(Video/deflection processor)Inputs for two separate RGB signals.PAL/SECAM and NTSC matrix for productionof RGB signals.Colour saturation, brightness and contrastsettings.Automatic Cut Off and leakage current controland setting.Beam current limitation circuit.RGB output amplifier.Production of V/H deflection controlsignals- 2 x MSM SAA 4955 HLHalf picture memoryThe two half picture memories are necessaryfor the picturesignal intermediate storage andprocessing.- Philips SAA 4993Document Q 2500 79 © Loewe ProCollege

Technology of Q 2500 colour TV set4.2.14 Signal pathAll FBAS or Y/C signals delivered by the receivingunits, the three Euro/AV sockets of thefront interface, are directed via the video matrixswitch to the video processor VPC 3230.The FBAS or Y signal is led from pin 17 ofI 1711, via the impedance converter Q 1814 topin 73 of the video processor I 2271. The filterin the Y/FBAS path consisting of L 2259/57and the associated capacitors has low passcharacteristics. Frequency components over 7MHz are efficiently suppressed by the filter.This prevents floating effects in the video signal,that may arise from the cycle rate of theADC and residual signals from neighbouringchannel. For Y/C operation the chroma signalmoves from pin 14 of I 1721, via the emitterfollower of Q 1824 to filter L/C 2266, whichsuppresses noise components, and then tochroma input pin 72 of 2271.VPC 3230 is also equipped with two RGB inputinterfaces.Pins 1-3 of I 2271 are connected directly tothe Euro/AV socket 2 via the correspondinginput filter. The associated fast-blank signal isapplied to I 2271 on pin 79.Q 2226 prevents the FB voltage exceeding2.2 V and thereby damaging the videoprocessor.RGB operation via the Euro/Avc socket 2is therefore also fast blank compatible. Y/U/Voperation is also possible from the secondRGB input from pin 4 of I 2271 , 5 and 6. TheRGB signals are fed from the optimum DVBmodule or from the Euro/A socket 3 via thisinput. The same goes for the Y/U/V signals ofthe Euro/AV socket 3. The inputs 4, 5 and 6from I 2271 are not fast blank compatible.The video processor VPC 3230 digitises andfully processes the FBAS analogue input signalsor Y/C signal. On the output there is adigital 8-bit wide luminance and an 8-bit widedemodulated chroma signal with its U/V components.The luminance and chroma signalsare transferred in multiplex procedures viaeight LM0-7 lines. The amplitude on the linesis 3.3 Vss. The associated cycle frequency is27 MHz and is output from pin 27 on I 2271.In SAA 4979 the luminance and chroma signalsare led to a demultiplexer and read intothe internal half picture memory. Selectionresults with the 100 Hz cycle rate of 32 MHz.With 3 Mbit, slightly more than a half picturecan be stored in intermediate memory, whichpermits continuous single and dual selection.The next IC in the signal path, SAA 4993, isresponsible for noise suppression and variousinterpolations. Noise suppression is implementedby signal from the output, which hasalready been processed, being delayed for ahalf picture by the second half picture memoryand then mixed with the currently applied signal.In addition, this IC suppresses the intermediateline shimmer. Line interpolation also occurs,so that 576 lines can be displayed in allzoom functions. Movements between the picturesare also interpolated, to ensure a continuousmovement process over all half pictures.SAA 4979, which is the next IC in the signalpath, is used mainly as a DAC and for thecontrol of the digital 100 Hz video processingin the circuit.In the chroma branch there is a circuit for improvingcolour transitions. It is used to increasethe slope of the colour transition flanksin the differentiation and adder stages.Document Q 2500 80 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500/H video signal pathCh. HDR/DVD W1512-86Ch. SAT/DVB1 W1506-8Ch. FRONT W1521-83Ch. DVB2 W1416-8Y/CVBS AV2-19Y/CVBS AV1-19Ch. AV2-15Ch. AV1-158Ch. AV3-15Ch. AV1-7Ch. AV1-15Ch. AV2-712133Y/CVBS AV2 - 20Y/CVBS AV1 - 20CVBS-TUNER W1211-1Y/CVBS-SAT/DVB1 W1506-6Y/CVBS-FRONT W1521-6201110552010 1186CVBS-PIP W1211-13 ( *)5Y/CVBS-DVD/HDR W1512-63I1731TEA6415VIDEO MATRIX SWITCHCHROMAI1771/4053CHROMAAV1/2 Pin 7/15144I1711TEA6415VIDEO MATRIX SWITCHCVBS/Y(*) for TwinSat Jumper B2 removed!CVBS W1416-61Y/CVBS AV3 - 201813171416 14 13 17 1815FBAS121ChromaCVBS/YAV2R G B FBFAY0-7FAC0-7R G BV Y U1LC0-7 1LC0-7I2311SAA4979HBESICI16314053RGB/YUVI2151VPC3233PIPI2451SAA4955I2421SAA4993FALCONIC72732L0-72C0-7LS0-7793C0-31I2461SAA49552I2461SAA495536 5 4D0-16I2801CCUI2916SDRAM16MBI2271VPC3230MAIN3Y0-7H-Synch/VGA75V-Synch/VGA74105112 113 114R G B FB35 36 37 38Y/Pin28U/PIN27V/PIN26R32 31 30B G4 6 8 10 12W1011/VGAH-SynchV-Synch4Y0-74C0-36C0-36Y0-75Y0-75C0-3AV3 - 15AV3 - 11AV3 - 7Synch auf YW1611 DVB2 4 6R G B R G B3 1 13 5 2 12910114 15 14R G BVY UH = DVBL = AV36 FBAS/Y8Chr.73 72 Chr.TVO W1531H-Link W1541FBAS/Y3 YChr.7174117HD 103VD 102LM0-744 Cut offVD55HD454W1051RGB4041427L0-77C0-7R/ AV2 - 15G/ AV2 - 11B/ AV2 - 7FB/ AV2 - 167L0-77C0-7HD 24VD 23I2461SAA49551 V-I2521TDA9332HOP444648W15112 V+3 EW8 H-outFP4 43 BLCVFLBHFLB13 9Document Q 2500 81 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500/M video signal pathCh. HDR/DVD W1512-8Ch. SAT/DVB1 W1506-8Ch. FRONT W1521-83Ch. DVB2 W1416-8Y/CVBS AV2-19Y/CVBS AV1-198Ch. AV3-15Y/CVBS AV2 - 20Y/CVBS AV1 - 20CVBS-TUNER W1211-1Y/CVBS-SAT/DVB1 W1506-6Y/CVBS-FRONT W1521-65Y/CVBS-DVD/HDR W1512-6CVBS-PIP W1211-13 ( *)FB/ AV2 - 16B/ AV2 - 7G/ AV2 - 11R/ AV2 - 15AV3 - 7AV3 - 11AV3 - 15Ch. AV2-15Ch. AV1-15Ch. AV1-7Ch. AV1-15Ch. AV2-7201110652010 11863I1731TEA6415VIDEO MATRIX SWITCHCHROMAI1771/4053CHROMAAV1/2 Pin 7/15I1711TEA6415VIDEO MATRIX SWITCHCVBS/Y(*)for TwinSat Jumper B2 removed!CVBS W1416-61Y/CVBS AV3 - 20W1611 DVB2 4 6121335R G B R G B3 1 13 5 2 12I16314053RGB/YUV914410111813171416 14 13 17 18154 15 14R G BL = AV34Y UVH = DVBFBASAV2121ChromaCVBS/YR G B FBR G BV Y UI2801CCU6 5 4 3 2 1 79 73 7275H-Synch/VGAI2916D0-1617SDRAM74I2271VPC3230V-Synch/VGA16MB1 YMAINHD 103ChromaCVBS/YVD 102Synch auf YChroma3W1531 TVO112 113 114 105CVBSLM0-728R G BFBI2501SDA9488PIP2624YChroma3C0-33Y0-735 36 37 38R G B30 31 321LC0-7 1LC0-744 Cut Off13 12 11B G R3 433FBRG4Y0-7W1051I2451SAA4955B404142VDHD54 HD55 VDI2521TDA9232HOPI2311SAA4979HBESICFAY0-7FAC0-7I2421SAA4994RAVEN4C0-31 V-Y/Pin28U/PIN27V/PIN264446487L0-77C0-7W15112 V+3 EW8 H-outYUVFP4 43 BLCVFLBHFLB13 924 23V-SynchH-Synch2L0-77L0-7VDHDB G R4 6 8 10 12W1011/VGA2C0-77C0-7Document Q 2500 82 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500/B video signal pathCh. AV2-15Ch. AV1-15Ch. SAT/DVB1 W1506-8Ch. FRONT W1521-8201165I1731TEA6415VIDEO MATRIX SWITCHCHROMA18131714FBAS1211LC0-7I2311SAA4979HBESIC1LC0-7I2271VPC3230MAIND0-16I2801CCU112 113 114 105R G BFB35 36 37 38R G B30 31 32I2521TDA9232HOPY/Pin28U/PIN27V/PIN26Y/CVBS AV2-19Y/CVBS AV1-19Y/CVBS AV2 - 20Y/CVBS AV1 - 20CVBS-TUNER W1211-1Y/CVBS-SAT/DVB1 W1506-6Y/CVBS-FRONT W1521-6CVBS-PIP W1211-13 ( *)2010 11863I1771/4053CHROMAAV1/2 Pin 7/15I1711TEA6415VIDEO MATRIX SWITCHFBAS/Y16 14 13 17 1815I2916SDRAM16MBFBAS/YChroma(*)for TwinSat Jumper B2 removed!CVBS W1416-674W1611 DVB2 4 6R G BR G BV Y U6 5 47372R/ AV2 - 15G/ AV2 - 11B/ AV2 - 7FB/ AV2 - 16W1511W1051HD 103VD 10244 Cut OffRGB40414233FB1 V-2 V+3 EW8 H-outFP4 43 BLCVFLBHFLBCh. AV1-7Ch. AV1-15Ch. AV2-7R G B FB32179121335144LM0-713 924 23VDHDCVBS/Y ChromaCVBS28I2501SDA9488PIP2423HDVDHDVD5455444648Document Q 2500 83 © Loewe ProCollege

Technology of Q 2500 colour TV setHalfpic. A.Halfpic. B50HzSampling rate13.5 MHz.100 Hz principleHalfpicturememory,3.5 MbitHalfpic. A.Halfpic. A100Hz.Halfpic. BSampling rate 27 MHz.Halfpic. B.The following integrated modules are responsiblefor colour saturation, brightness and contrastsetting. Control is via the I²C bus fromthe CCU. The same is true for the white andblack value setting. An automatic black valuesetting is also available. With this cutoff control,signs of ageing, e.g. the c.r.t, are corrected(see description of the RGB outputstages).In the Y signal path there is a peaking circuit.It is used to produce black/white edges onovershoots, which increases the sharpness ofthe picture. The height of the overshoot canbe adjusted with the "Sharpness" operatingfunction.With three output side DACs analogue Y-, R-Y- and B-Y- signals are produced, which arethen output on pins 44, 46 and 48.Finally the Y- and colour difference signals arefed through low-pass filters to filter out interferencepulses and the residue of digitisation.The last IC is the TDA 9332 for the 100 Hzcolour signal processing. It controls the RGBpower output stages to the c.r.t plate.The Y-, R-Y- and B-Y signals output on pins26, 27 and 28 produce RGB signals usinganalogue matrix circuits.The IC carries out further processing of analogueRGB signals (twice), CCU signals(once) and signals from the optional VGA interfaceor online module. Depending on theassociated blank information, both the internallyproduced and the two RGB signals froma selection circuit are switched.The signals reach pins 40, 41 and 42 via theRGB output amplifier and are held there at 4Vss for control of the speed modulator and theRGB output stages.4.2.15 IC functionsThe following paragraphs give a more detaileddescription of the functions of the ICs used forpicture processing.In the descriptions, the processes are shownin a much-simplified form. The operationsnecessary for the execution of the functionsare inevitably much more complex.4.3 VPC 3230Video processorThe VPC 3230 is a recently developed videoprocessor from Intermetall in 0.8 µ CMOStechnology.The functions are contained in an80 pin PLCC housing.Document Q 2500 84 © Loewe ProCollege

Technology of Q 2500 colour TV setVPC 3230 block diagramAV2AV3DVBChroma73CVBS/YAV3/Synch74auf YH-SynchVGA72751BG2R 3FB29U/B45Y/GV/R 6InputinterfaceAGC2 x ADCRGB/YUVInputinterface4 x ADCY/GU/BV/RFB4 linecombfilterNTSCPALRGB/YUV - InterfaceMatrixMultistandardcolourdecoderNTSCPALSECAMYCrCbFBYCrCbMixerYCrCbLinecompress./decompress.LetterboxdetectorI 2 C BusClockGen.I 2271VPC 3230OutputFormatterMemoryControlSynch+ClockGeneration83285457LM0-7FIFOCNTLLL ClockH SynchV Synch62 63 1720.25 MHzI 2 C BusV SynchVGAThe functions in the VPC 3230 can be roughlysummarised into 9 blocks:- Input interface with signal selectionand two precision 8 bit A/D converters- 20.25 MHz clock generator- high quality, adaptive 4 linecomb filter- Multistandard colour decoder for PAL,NTSC and SECAM- Letterbox detector- Output format conversion(Output formatter)- I²C bus interface- Synchronisation block4.3.1 Input interfaceOn signal board Q 2500, the input multiplexeris switched in such a way that a choice can bemade between two pairs of signals. If anFBAS signal, for example, is supplied by areceiver unit or a Y/C signal is fed to an interface,pin 73 for the FBAS/Y signal and pin 72for the chroma signal are switched.So that the signals from the ADC can be correctlydigitised, two conditions must be fulfilled.The d.c. level and the amplitude of thesignals must be adapted to the ADC . The d.c.level is defined by a signal clamp. For thisthere is a clamp circuit in the FBAS/Y paththat clamps the signal to the rear black shoulder.- RGB/YUV interfaceDocument Q 2500 85 © Loewe ProCollege

Technology of Q 2500 colour TV setBlock diagram, VPC 3230 input interfaceAGC+6/-4,5 dBChroma72ClampADCDigital CVBSor Y signalCVBS/YAV3/Synch on Y7374InputmultiplexerAmplificationH-Synch/VGA75ClampADCdigital ChromaSystem ClockI 2271VPC 3230ReferencegenerationFrequencyDVCO150ppm78 59 62 63C 473/48920,25 MHzU5SBThe chroma signal is clamped to its middlevalue. The following automatic amplifier controlin the FBAS/Y path has a control range of-4.5 dB to +6 dB and ensures that even fordifferent input levels the FBAS/Y signal is alwaysoptimally adapted to the ADC. In thechroma branch a fixed amplification is sufficient.The FBAS/Y signal, as also the chroma signalfor Y/C operation are digitised at a cycle rateof 20.25 MHz. The resolution of the two ADCsis 8-bit. Therefore, at the output of the inputinterface there is an 8-bit wide FBAS or Y datastream and for Y/C operation also an 8 bitwide chroma data stream. Both ADCs need acorresponding reference value. This is producedinternally in the reference generationand stored externally on pin 78 by C 488/489.4.3.2 20.25 MHz clock generatorThe frequency determining 20.25 MHz QuarzX 2283 is connected to pin 62/63 of VPC3230. The clock generator is controlled fromthe synchronisation block. In normal operationthe clock generator is line frequency coupled.In the VCR mode, the line frequency couplingis switched off.Document Q 2500 86 © Loewe ProCollege

Technology of Q 2500 colour TV set255CVBS/YChroma217192If the colour carrier is in one of these energygaps, then all sideband frequencies are in thegap as well. For this the picture and colourcarrier frequencies must be firmly coupled.The product of these two frequencies is anoverlapping frequency. The sine waves causelight and dark pixels on the screen, whichhave a fixed position from line to line, so thaton the screen these form a vertically placedlight-dark pattern. The higher the colour carwhite2281928-bit resolution128VideoClamplevel128Burst100%Chroma75%Chroma6832black=Klemmpegelsych.8032A/D changer area for CVBS/Y and Chroma signal4.3.3 Comb filterIn this area of VPC the normally unavoidableCross Colour and Cross Luminance interferencesin the PAL system are eliminated.In addition, the use of a comb filter even forcolour transmissions permits the full 5 MHz Yresolution to be achieved. Without a combfilter it would be limited to approx. 3.8 MHz bythe chroma trap, which would otherwise berequired.This function can be switched off, as it is thecase that for all receiver-side circuits for pictureimprovement, even using a comb filter,there are some rare picture presentationswhich are not good. Switching off is implementedautomatically via the analysis circuit.As this has error-free functioning, the userdoes not need to worry about switching off.• Function of a comb filterLet us consider the transfer method of thePAL signal. The brightness information determinesthat the full video bandwidth is not occupiedfor all frequencies, but only in specificareas. The colour information is inserted intothese energy gaps.BTFTDocument Q 2500 87 © Loewe ProCollege

Technology of Q 2500 colour TV setrier frequency the less pronounced the Moirébecomes.In order to keep interference with the pictureas low as possible, the phase position of thecolour carrier frequency from line to line isshifted forward by 90°. In this way, bright anddark pixels only overlap after four lines. Atnormal distances the eye cannot detect thisinterference.This compensation is known as "Fourth LineOffset Procedure".If one subtracts the two signals from one another,the brightness information is eliminatedand the colour information is present at doublethe amplitude on the output of the circuit.CVBS(PALsignal)2 Hdelay14122 Hdelay14+-Y+1. ZeileChrominancebandpassC1Y2. Zeile12 3 4 5f1Chroma3. Zeile12 3 MHz 5f4. ZeileThis fourth line offset now permits the filteringout of colour components from brightness information,and the reverse. The phase shiftfrom line to line causes a counter phasing ofthe colour carrier every two lines.If a two-line delay line is inserted into the circuitand the direct and delayed signals areadded together, the colour information is removedand the brightness information is presenton the output at double the amplitude.Theoretically this circuit supplies error freeresults. A condition for this, however, is thephase and amplitude equality of the chromasignal over 3 lines, which is only the case forthe same and equally saturated colours. Inpractical terms picture joining can occur, inwhich cross colour and cross luminance interferencecannot be removed by the comb filter.Therefore, another circuit is integrated, inwhich three lines in sequence, from the pointof view of both phase and amplitude, arecompared.If a deviation is detected that goes beyond aspecific difference, the comb filter function isautomatically switched off and the separationof the two components is implemented traditionallywith chroma trap and band pass.Document Q 2500 88 © Loewe ProCollege

Technology of Q 2500 colour TV setAs VPC 3230 requires four lines to determinewhether the comb filter is to be switched off,the filter operates more efficiently and morefrequently than for a two line comb filter.The vertical correction of the signal isachieved by the line interpolation in SAA4991.4.3.4 Multi-standard colour decoderLine compression/decompressionWrite to52 sThis block executes demodulation for all TVstandards - PAL, NTSC and SECAM. Additionalexternal components are no longer required.On the output of the colour decoderthere is an 8 bit wide luminance and chrominancesignal respectively in 4:2:2 format.Read from forCinema / ZoomWrite toRead from for4:3 / Panoramaon 16:9 c.r.t.s52 sThe VPC monitors the Auto S-VHS detectionby means of the colour decoder for the separatechroma line of the colour burst. If signalsare fed in from a VHS video recorder, then noburst is present on a separate chroma line.This is in turn communicated to the CCU. TheCCU switches to VHS operation. If an S-VHSrecorder is connected then a colour burst ismeasured on the chroma line on playback andthe CCU switches the VPC to S-VHS operationvia the I²C bus.4.3.5 Line compression and decompressionTo reproduce 4:3 pictures on a 16:9 c.r.t., andalso for the various zoom modes, the videosignal must be lengthened, or stretched, horizontally.For this the VPC 3230 has a linememory. Selection occurs at a slower speed,with the line beginning and end not being read(zoom, cinema)However, quicker selection is also possible.For this the start is delayed with respect to thedeflection and the selection is ended beforethe line end of the deflection (4:3 and Panoramafor the 16:9 c.r.t).Letterbox detectorFor Cinemascope or other film standards upperand lower black bars of various thicknessare visible. These black bands can be removedby various zoom functions or at leastreduced. Devices with 16:9 c.r.t.’s are alsofitted with an automatic format conversion.Depending on the thickness of the black barsthis automatic movie detection - AMD –switches between three different zoommodes. For this the Letterbox detector measuresthe luminance and chrominance componentsin the upper and lower area.If, within defined lines, luminance and chrominancevalues of less than 10% are measured,the CCU switches the deflection controller andthe display processor to the appropriate geometricalformat. As programme logos are oftenplaced on the right and left of the blackbars, no measurement takes place in thisarea.Automatic format conversion for 16:9 devices.Document Q 2500 89 © Loewe ProCollege

Technology of Q 2500 colour TV setBefore the digital video signal reaches thehorizontal and vertical synchronous separationstage, it passes through a 1 MHz lowpass.With the low-pass, video and noisecomponents >1 MHz are suppressed. All signalsthat are required for the various processingsteps in the VPC are controlled via an internalPLL stage and counter.ZoomCinemaPanorama4 : 30 14 20 28 34 40 Number of linesin lower and upper areaLuminance /Chroma

Technology of Q 2500 colour TV setSAA4955HL block diagramY0-7 C0-3WERSTWSWCKIEInput bufferWrite controller4.4.1 Storage spaceThe IC is organised into in 256 k words eachof 12 bit. Two independent clock signals forwriting and reading allow these functions to becarried out concurrently and independently.DatenDatenOutput bufferY0-7C0-3Write registerDataMemory256k x 12 bitDatenRead registerOEAdress blockwritereadrefreshRead registerRE SWCKRSTRA total of 3 072 000 bits can be stored, whichcorresponds to a little more than one half picture.This comprises the following:Sampling rate 16 MHz at a line frequency of15.625 kHz16 MHz----------------- = 1024 sampling values15.625 kHz per lineAs the synchronous pulse and the front andrear black shoulder are not required, there are832 sampling values per line for the actualpicture signal. A sample value corresponds toone displayed pixel on the screen.The sampling gap is not required in the verticaldirection either. There are therefore 290lines per half picture.The picture memory in SAA 4979 is for theactual 100 Hz function in the circuit, whereaspicture memories 2 and 3 I 2451/ I 2461 facilitatenoise suppression, the suppression of linequivering, interpolation and a full line freezeframe by a delay of 1 half picture.Data writing and reading for the two memoriestake place completely independently of eachother.Inputting and outputting for a single memory isalso separately controlled. Data is thereforewritten to one area of the memory, whilst it isread from another area.832 pixels x 290 lines = 241 280 pixelsTherefore for each half picture 241 280 pixelsmust be stored. At a resolution of 8 bit Y and 4bit chroma241,280 pixels x 12 bit = 2,895,360 bitare required for half picture storage capacity.The 3 Mbit is sufficient for the separate, continualinputting and outputting of this function.Document Q 2500 91 © Loewe ProCollege

Technology of Q 2500 colour TV set50/100Hz write/read cycle50HzIndicatorCentre ofpicture1. Half picture 2. Half picture 2. Half picture100Hz Indicator 50Hz Indicator100Hz Indicator100Hz Indicator50%1.Half pictureStart1st Halfpictureread2. HalfpicturepicturestartMemory content1. Half picture1. Half picture2.x read from50Hz Indicator50%2. Half picture50%1. Half pictureStart2.Half picture1.x read from50HzIndicator100%1. Half picture100Hz Indicator50HzIndicator50%2. Half picture50%1. Half picture50HzIndicator100%2. Halbbild100HzIndicator1.Half picture1x read from100Hz Indicator1.Half picture2x read from2.Half picture1x read from4.4.2 Conversion of signals in 100 Hz inmemory 1Frequency doubling takes place in the halfpicture memory 1 (in I 2311), as it is read atdouble speed. This means it is possible toread the memory twice, whilst it is only writtento once. The first reading of a half picture alwaysstarts when a little over half the pictureis in memory. Due to the double speed, writingto and reading out end at about the sametime. As the return times at 100 Hz are alsotwice as fast, reading out starts before writingto. The picture is therefore read out for thesecond time and during this time up to half ofthe next half picture is written to memory.4.4.3 Half picture memory 2 and 3In this half picture writing to and reading out ofmemory take place at the same speed. Thehalf picture is read to memory a second timeand so delayed by a half picture. This meansthat half picture A can be written to and readfrom memory, whilst the same is happening inmemory 1 for half picture B.4.4.4 Control pulsesThe memory is controlled by the followingpulses:pin 22: SWCK (Serial Write Clock)Cycle for reading in the Y/C signals to thememory.pin 23: RSTW (Reset Write)The address counter for writing at the start ofthe memory area is set at H level.Document Q 2500 92 © Loewe ProCollege

Technology of Q 2500 colour TV setpin 24: WE (Write Enable)So long as H level is present, the addresscounter continues counting to write with WCK.pin 25: IE (Input Enable)Data inputs for Y/C signals are released at Hlevel.pin 30: OE (Output Enable)Data outputs for Y/C signals are released at Hlevel.pin 21: RE (Read Enable)So long as H level is present, the addresscounter continues counting to read with RCK.pin 32: RSTR (Reset Read)H level sets the address counter to read at thestart of the memory area.pin 33: RCK (Read Clock)Cycle for reading the Y/C signals from thememory.Document Q 2500 93 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500/H memorycontrol8I2271VPC3230MAIN1LC0-7 1LM0-718532721Y/C Output EnableInterlace Output - 0=Field 1/1=Field 2RSTR27MHz/Clock2 4 316/28Halbbildspeicher3,5MbitI2311SAA4979H +BESIC5455HDVDData DataHalf picturememoryoutputI2171SAA4955HLOEREinputI2151VPC3233PIP272123222425RSTWSWCKWEIERSTRSRCK3031323353 202322Data DataHalf picturememoryinputoutput2425RSTWSWCKWEIEI2161SAA4955HLOERERSTRSRCK3031323332MHz/ClockData Data13625HDVD79I2421SAA4993FALCONICData Half picture DatamemoryIE 2.9Mbit25 IEOEU3.3 Bus A25OEU3.324 23WE RSTW I2461SAA4955HLRERSTR31 32RE14106 2423WE RSTWI2451SAA4955HLRERSTR313222 SWCKSRCK3322SWCKSRCK3353608184inputoutput146140134inputoutput32MHz/Clock6Read EnableOutputInput EnableInterlace Output/PIP0=Field 1/1=Field 2Clock/27MHzRSTR1LS0-71LM0-7Write EnableInterlace Output - 0=Field 1/1=Field 23Y0-7/3C0-36Y0-7/6C0-3Read Enable Output Bus AIE836232MHz/ClockReset Read/WriteRead EnableWrite EnableHorizontal Referenz InputBus BBus E4Y0-7/4C0-3 Bus C Bus D 5Y0-7/5C0-37L0-7/7C0-32L0-7/2C0-31LM0-7Half picturememory2.9MbitFAY0-7 / FAC0-37Y0-7/7C0-3Document Q 2500 94 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500/M memorycontrol5455HDVDData Half picturememoryData25 IE2.9MbitOEU3.324 23WE RSTW I2461SAA4955HLRERSTR313222 SWCKSRCK3313625HDVD14I2421SAA4994RAVEN53608184I2271VPC3230MAINinputoutput14614013432MHz/Clock32MHz/Clock7932MHz/ClockIE8362212753182 4 3Input EnableRead EnableOutputInterlace Output/PIP0=Field 1/1=Field 216/28RSTR27MHz/ClockInterlace Output - 0=Field 1/1=Field 2Y/C Output EnableRead Enable Output Bus AFAY0-7 / FAC0-3Reset Read/WriteRead Enable7Y0-7/7C0-31LC0-7 1LM0-7Horizontal Referenz InputWrite Enable3Y0-7/3C0-34Y0-7/4C0-3REBus BBus EBus C Bus DBus A2L0-7/2C0-3I2311SAA4979H +BESICHalf picturememory3,5Mbit7L0-7/7C0-3Document Q 2500 95 © Loewe ProCollege

Technology of Q 2500 colour TV setQ2500/B memorycontrolI2271VPC3230MAIN21 27 53 182 4 3RSTR16/2827MHz/ClockInterlace Output - 0=Field 1/1=Field 2Y/C Output Enable1LC0-7 1LM0-7I2311SAA4979H +BESICHalf picturememory3.5 Mbit4.5 Falconic module SAA 4993With the conversion of a picture signal to aline coupled sampling and level adaptation at3.3 V, 100 Hz is achievable with a 3 Mbit picturememory and a memory controllerAs doubling of the picture change frequency,depending on picture quality and picture presentation,can lead to undesired side effects, anumber other features are provided on the Q2500 chassis. This means that the side effectscan be compensated for.4.5.1 Noise reductionTogether with a second picture memory, SAA4993 is able to eliminate some of the picturenoise that occurs owing to an inadequate antennasignal.Internally the IC has two separate signalpaths, one for the Y and one for the chromasignals. Functionally they are both identical. Inthe chroma path is a demultiplexer on the inputand a multiplexer before the output.Document Q 2500 96 © Loewe ProCollege

Technology of Q 2500 colour TV setSAA 4993 block diagramFM2FM3*YBYC YD YEVADNRCompress.Decompr.SequencermuxmuxPDAPCLPInterfaceControlLeft MPRAMDeinterlagerVec.SPM TPMESMPix-PeakRight MPRAMVert. PeakingVert.ZoomYFYGMotion EstimatorVec.Unconversion* (SAA 4994 does not controlFM3)Principle noise suppressionSimply expressed the noise suppression systemconsists of the current half picture signal,in which components of the previous signalare mixed. The composition of the output signal,that is the number of components of thedirect and the number of components of thedelayed half picture, are determined by theso-called K factor. This K factor is determinedby integrated automation.YSettingDNR YK+When using the automation the K factor isdependent on the movement between the halfpictures. If there is a lot of movement, noisesuppression is not very effective.K factor1- KPicturememory2Document Q 2500 97 © Loewe ProCollege

Technology of Q 2500 colour TV setKfactor10,750,500,250K factor0 > 0 NoiselevelIn the other extreme case K = 0, only the delayedsignal would be switched, which wouldcorrespond to a freeze frame. To avoid thisthe K factor in our TV sets can never be 0.Otherwise it would only be programmes with aweak signal that would be incapable of beingdisplayed.4.5.2 Line interpolationInformation about the size of movement isprovided by the movement detection. Thisoccurs only in the Y branch, with which the Kfactor is set simultaneously for chroma and Y.The drawing shows the DNR principle for theY path. As already mentioned the circuit in thechroma path is identical. The K factor canhave a value from 0 to 1. At K = 1, 100% ofthe direct signal and 0% of the delayed signalis switched to the following "And". No noisesuppression is therefore available.The line interpolations circuits allow a situationto be achieved in which a full-line picture iswritten for PALplus signals . The advantagewith respect to a PALplus decoder is that evenwithout a PALplus signal, the interpolation inall zoom modes delivers a full-line picture.This function is explained in the followingparagraphs for PALplus, in the zoom functionsthe circuit operates similarly only with otherfactors.Standard PAL signalPALplus signalPALplus signal on 16:9-c.r.t. with line interpolation72 lines black bar576 linesvisible picture432 linesvisible pictureInterpolation576 linesvisible picture72 lines black barA standard PAL signal consists of 576 visiblelines. For PALplus, 144 of the lines are darksampled and only 432 lines are transferred asa visible picture. In 16:9 c.r.t’s these signalsare shown in the ZOOM mode. In order todisplay 576 lines the information for 4 linesmust be determined by 3 lines respectively.This computer operation is verycomplicated and will therefore not be explainedhere.Line interpolation must be carried out both inchroma as in the Y branch.Document Q 2500 98 © Loewe ProCollege

Technology of Q 2500 colour TV set4.5.3 Movement detectorIn the Y branch there is a movement detector.Here current and previous half pictures arecompared with each other. An assessment ismade of whether it is a question of full picturesin Cinema Scope format. The CCU receivesthis information via the microprocessor for theAutomatic Movie Detection (AMD). Themovement detector is also responsible for thesetting of the noise suppression K factor.In addition, using the movement from the previousto the current half picture an assessmentis made of how the movement betweenthe two half pictures could behave. In thisway, in the movement compensation stageimmediately following a new half picture canbe calculated. At the same time it must betaken into account that the two half pictures,contain the intermediate lines for the other halfpicture respectively. In this way a continuousprocess of movement over all half pictures isachieved, both for horizontal as well as verticalmovements. The DMI (Digital Moving Interpolation)function is active for both full picturepresentation and for standard video signals.The operation of this switch is largely errorfree. Nevertheless, under unfavourable conditionsnegative effects can occur, therefore theDMI function can be switched off. Instead, theDLC (Digital Lineflicker Control) function isswitched on.4.5.4 Memory controlControl of the SAA 4993 is implemented viathe µP interface from I 2311. The µP bus isassigned to pins 26 (DA) and 27 (Cl). In additionit is here in conjunction with the MemoryController that writing to the 2nd picture memoryand reading from the two memories is determined.4.6 SAA 4979 (BESIC)The next IC in the signal path, the SAA 4974,is designed for the following functions.- Demultiplexer for luminance/chroma separation- 3.5Mbit memory for 50/100Hz conversion- Cycle rate converter from 27MHz to32MHZ− Two signal paths for the separate processingof the Y and chroma signals− Demultiplexer for the chroma signals− Band width doubling and digital CTI circuitfor improved colour transfer− Peaking circuit Y branch to increase picturesharpness− Three blank stages for dark sampling− Three 10 bit DACs for the generation ofanalogue R-Y-, B-Y- and Y-signals,I²C bus interface and timing control for thecontrol of the individual processes throughthe microprocessor.− Microprocessor bus for the control of theSAA 4993.− Control of write and read processes in thehalf picture memory, as well as the totaldigital 100 Hz video signal processing.− Generation of a 32 MHz cycle.− Generation of H and V synchronous pulsesfor the TDA9332 video/deflection processor.Document Q 2500 99 © Loewe ProCollege

Technology of Q 2500 colour TV set27 MHzDNCmovementBlack BardeterminationdeterminationI2311SAA4979HLM0-7Main Channel8/ 168ITU 656 // Decoder 1ITU 656Decoder 216/8/Fast Switch16/DynamicNoiceReduction16/FieldMemory3,5 MBitSub Channel16/Sample RateConversion27 to 32 MHzDownSamplingBypass2L0-72C0-3I2C-BusBypassUPSampling7L0-77C0-3SpeichersteuerungSystemcontrolµP - InterfaceSourceSelectµP-BusPanoramicZoom32 MHzLuminanceY10/Y-DelayPeakingYTripleDACUV10Bit10/10/ChrominaceDigital colouredgesharpeningDemultiplexerbandwidthdoublin4:4:4U/V4.6.1 Chroma branchIn the design of the colour television transmissionthe compatibility with normal black/whitesystems must be observed, in order for colourtransmissions to be received by black andwhite sets. For this reason the colour informationmust be integrated into the available frequencyspectrum used for the brightness information.Secondly, to prevent interference the bandwidthfor the colour signal must be kept asnarrow as possible. For this reason a bandwidthof only 1.2 MHz was selected and thecarrier frequency set at 4.43 MHz.Document Q 2500 100 © Loewe ProCollege

Technology of Q 2500 colour TV setOwing to the narrow bandwidth the rise timesfor colour change are very long, which appearson the screen as "washed out" transitions.a)Uin,Vinb)t4.6.2 Band width doublingIn order to increase the effectiveness of thecolour flank increase on the supply side, adoubling of the bandwidth from 4:1:1 to 4:2:2is implemented.Using a linear phase interpolation filter additionalsampling values are calculated from theavailable chroma sampling values.These calculated sampling values are insertedrespectively between two available values, bywhich means the bandwidth is doubled. In thisway, steep flanks can be transmitted moreeasily.Ampl.c)Ampl.t4.6.3 Colour flank sharpeningAn improvement of the colour transition isachieved by a dual differentiation of the originalchroma signal and the ensuing subtractionof the derived correction signal of the chromasignal.d)Uout,Voutta) U, V input of SAAb) U, V Correction signalc) U, V input + Correction signald) sharpend and limited U, VTo compensate for this deficiency, two circuitcomponents are incorporated into the SAA4979, with which short rise times can beachieved artificially, thereby improving thecolour transitions.In the circuit before these components is ademultiplexer, with which 8-bit wide parallel R-Y- and B-Y signals respectively are derivedfrom the supplied signals.tThe changes in these signals are evaluated inseparate circuits for U and V, and if a thresholdvalue specified by the software is exceededa correction value is calculated. Afterthe two derived correction signals have beencleaned of noise components, they are subtractedfrom the available chroma signals Uand V. The subtraction is implemented by inversionof the correction signals and subsequentaddition with the original signal.To avoid colour phase errors by the overshooter,it must be blocked by limiter stages.Here analogue signals are produced from therespective 8-bit wide digital R-Y and B-Y signals,which are then output at 1.8 Vss on pins46 and 48.4.6.4 Y signal pathThe peaking circuit is not used. The signal isled directly to the sampling stage. This operatesin the same way as the sampling stage inthe chroma branch.Document Q 2500 101 © Loewe ProCollege

Technology of Q 2500 colour TV setVia the sampling circuit, the digital Y signal,which is now 9-bits wide, reaches a DAC,which generates an analogue signal. This isthen output on pin 44 at 1.5 Vss.4.6.5 Microprocessor interfaceAll processes in the SAA 4979 are controlledby SDA6000 via the I²C bus 0 (pin 1 = SDA,pin 2 = SCL). In addition, information for theSAA 4993 and the memory control is alsotransferred.The SAA 4993 is controlled by the BESIC viathe microprocessor bus to pins 108 (µP DA)and 107 (µP CL).Switching outputs 4 are used for the switchingof the VGA synchronisation. If a switch ismade to the VGA programme location, thenpin 4 is switched from I 2311 to L level. Withthis logic state the vertical synchronous pulseof the VGA interface W 1011 pin 4 is switcheddirectly to the video/deflector controller I 2521via the four Nand gates I 2361 A/B/C and D.The VGA synchronous pulse is, in addition,monitored by I 2271 on its pin 17. If no synchronisationor false synchronisation is detected,I 2311 resets its output on pin 4 andthereby switches over to internal V synchronisation.4.6.6 Control of the 100 Hz processing(Display)This stage synchronises the read out from thehalf pictures and the writing to memory in thesecond memory. As the signals in the SAA4993 are written to and read out, it has directcontrol and is only synchronised by theBESIC.Furthermore, the display stage gives a horizontalpulse on pin 54 and a vertical synchronouspulse on pin 55 for the synchronisationof the deflection in TDA9332. At the sametime, the vertical pulse VD acts as a reset forthe Falconic and the half picture memories, forresetting the address counter on reading fromthe memory and for writing to the secondmemory.4.7 Video/deflection processor TDA9332/Range Video/RGB pathThe last IC for picture signal processing, apartfrom the RGB output stages, is the TDA 9332.It also controls the deflection stage.Inputs for analogue R-Y, B-Y and Y signals:- Two RGB inputs for analogue signals fromthe CCU and the VGA interface and/or picturein picture generation- Matrix circuits for RGB generation from thedifference signals- Signal selection for the switching of therequired RGB signals- Y and colour difference matrix for the generationof Y and difference signals from theselected RGB signal- Hue control for NTSC operation andgamma correction in the Y branch- Saturation, contrast and brightness settingVia pulse RE (pin 84) the Falconic modulecontrols the reading from both half picturememories and the writing to the second memory.With pulse IE (pin 83) SAA 4979 controls thedata inputs in the second half picture memory.With L level a switch can be made to freezeframe, for example.Document Q 2500 102 © Loewe ProCollege

Technology of Q 2500 colour TV set- RGB driver stages- Beam current limiter circuit- Automatic cut off control- I²C bus interface and control register- DAC for programmable d.c. voltage− PLL for generation of cycle frequency− Control block for the synchronisation of theoutput stages− DAC for O/W, V control and H output stage− Beam current dependent correction of thevertical and horizontal amplitude and beamcurrent dependent H phase correction.− I²C bus interface4.7.1 Matrix circuits and signalselectionThe R-Y, B-Y and the Y signals are fed to theIC via pins 26, 27 and 28. The green componentis recovered and the RGB signals producedusing two matrix circuits, one after theother.These RGB signals are fed to a selection circuit,to which the RGB signals from the CCUvia pins 2, 3 and 4 and from the VGA-interfacevia pins 35, 36 and 137 are also fed. With thiscircuit the required signal is selected or twosignals mixed together.− Horizontal start up controlDocument Q 2500 103 © Loewe ProCollege

Technology of Q 2500 colour TV setBL1 RI2 GI2 BI2 BL2FBCSOPWL33 35 36 37 3834 29YINUINVIN282726YUVSATURATIONCONTROLCOLOURDIFFERENCEMATRIXRGBCONTRASTCONTROLRGBRGBINSERTIONRGGBWHITE POINTANDBRIGHTNESSCONTROLRBOUTPUTAMPLIFIERANDBUFFERBLUE STRETCH23V D1 24 3GEOMETRY CONTROLSWITCHY U V SAT CONTRBRI whitepoint30PWLRI1AND31CONTINUOUSRGB-YUVBLACKGI1BEAMCATHODEMATRIX32STRETCHTDA9332CURRENTCALIBRATIONBI1I2521LIMITERV P2 39V P1 17DEC VD 7DEC BG 18SUPPLYSOFTGND1 6START/STOP19 ´ 6-BIT DACsI 2 C-BUSLOW-POWERH/V DIVIDER2 ´ 4-BIT DACs TRANSCEIVERGND2 19H-SHIFTSTART-UP24H DCLOCKGENERATIONPHASE-2HORIZONTALRAMPVERTICALE-WANDGEOMETRY12LOOPOUTPUTGENERATORGEOMETRYHSEL1st LOOP20 21 9 13 14 5822 15 16XTALI XTALO SCO HFBVSC I ref12MHzDPCFLASH HOUT LPSUVDOA VDOB EHTINEWO4041424443251011MGR445ROGOBOBLKINBCLDACOUTSCLSDADocument Q 2500 104 © Loewe ProCollege

Technology of Q 2500 colour TV setAccording to the operating mode selection iseither with H level on blank on pins 38 and 33or controlled from the computer via the I²Cbus.In the following section of the circuit Y andcolour difference signals are generated fromthe RGB signals.4.7.2 Control stagesIn the Y path the first component is a circuitfor gamma correction and in the colour differencebranch the colour saturation settingstage.After RGB has been generated again from thedifference signals and the Y signal, the settingstages for contrast and brightness arereached.The control stages for contrast and coloursaturation in the other IC's are set to maximumand have no function. There is, in addition,in each channel, a setting stage for thewhite value, and the black value is set with theamplifier stages that follow.The white value and the basic setting of theblack value are determined in the two correspondingpositions of the service mode. Infurther a operation the black value is determinedby the cut off control.The RGB signals are output at a maximum of3.5 Vss via pins 40, 41 and 42.The measured values for cut off and leakagecurrent are fed to the IC on pin 44. With theevaluation circuits for leakage current and cutoff, together with the computer, subsequentadjustment is carried out via the output amplifier,in order to keep the picture impressionstable independently of aging.Pin 43 is connected to the base of the diodesplit transformer. The circuit integrated intothe IC thereby receives information about thebeam current flowing into the c.r.t.If the maximum permissible value is exceededthere, the circuit reduces the contrast and thebrightness with the corresponding controlstages. (see basic board “Beam current limitation“).4.7.3 I²C bus interface and raster correctionAll control processes such as brightness, contrast,etc are controlled via pins 10 and 11 ofthe I²C bus interface. In addition, a DAC canalso be controlled via the I²C bus. For this,TDA 9332 on pin 25 outputs an adjustablevoltage. This is fed to the rotation panel on pin3 of connector W 1021. At this point an additionalcoil on the tube turns the deflectionraster, thus providing compensation of theearth’s magnetic field at the installation site ofthe device. The value of the raster correctioncan set in both service mode and in the menufor picture functions.If the device is turned, the influence of theearth’s magnetic field changes. The plannedrotatable rack takes this into account. Therack is controlled from the chassis, with therotation angle being determined by the TVsoftware. Raster correction can also be determined,in that on rotation the voltage on pin26 of TDA 9332 is changed.The influence of the rotation angle on theraster displacement is almost linear. On installationof the device, it is sufficient for correctfunctioning of the correction to input a valuefor raster correction into the EAROM for thecentre and the two end stops.4.8 Picture in pictureOn the signal board an optional picture in picturecircuit is possible. This circuit consists ofthe video processorDocument Q 2500 105 © Loewe ProCollege

Technology of Q 2500 colour TV setVPC 3233 /I 2151 and the PIP memory I2161/71 The video processor PIP is the sameIC type as the main video processor I 2271.With the VPC 3233 various PIP representationsare possible. Our device controls support3 PIP representations.Split ScreenThe screen is split into two halves. On the leftside the half picture is displayed and on theright side the picture of the PIP electronics.Both pictures are the same size and quality. Inthe horizontal level, sections of a picture onthe left and right are naturally cut off. The corearea, however, is correctly displayed.PIP smallThe picture in picture, which is reduced to 1/9of its normal size, can be positioned in any ofthe four corners.PIP largeThe same is true as for PIP small, only thesize is 1/4 of the normal picture.For 4:3 devices Split Screen is not possible.For small and large PIP display the PIP picturemust be correspondingly compressed.This occurs at the vertical level by the interpolationof picture lines. For the small setting, 3lines are compressed and for large setting 2lines, and for each a new line is calculated byinterpolation. In the horizontal level these linesare then compressed accordingly. The writingof the picture in picture data to the PIP memoryis controlled completely by the PIP-VPC.Reading from memory is controlled fully fromthe main VPC.Writing to and reading from memory is thereforeindependent. There is no synchronisationbetween the two VPC’s.The PIP processor processes FBAS as wellas Y/C signals. The video transfer applies theFBAS/Y signal to pin 73 and the associatedchroma signal to pin 72. All possible signalsources can therefore be displayed as PIP.If an online module is integrated into the TVset, the picture can also be displayed by theonline module as PIP. The Y/C signal from theonline module reaches the pin connector W1531 on the signal board. The TVO/Y signal isapplied to pin 74, and the associated chromasignal to pin 71 of I 2151.For the basic and medium signal board variantsa single chip PIP processor SDA 9488 isused.Document Q 2500 106 © Loewe ProCollege

Technology of Q 2500 colour TV setSDA 9488x / PiP-ProzessorQ2500M/BTripleDACRGBMatrixPeakingOversamplingInsertionDEMUXMUXIN1IN2VDDA2VSSA2VDD VSSVDDA1 VSSA122 23 19 20Skewcomp.H/V ScalerDecimationTRIPLEADC3x 8bit 1)3x7bit11eDRAM12FrameGenerationIN3FSWOUT1OUT2OUT3SELDUV/DCHRDCVBS/DY1314512kbitColorDecoderPAL/ SECAM/ NTSCFastRGB/YUVSwitchInputSelectClampGainDisplayControllerMemoryControllerInsetSyncProcessingY/C andSyncSep.VREFHVREFMVREFLParentSyncProcessingClockSynthesizerData SlicerAcquisitionControllerCVBS1CVBS2CVBS32710SCL SDA I2CINTRXIN XQ HSP VSPXTAL20.25 MHz212528262418171615Document Q 2500 107 © Loewe ProCollege

Technology of Q 2500 colour TV setWith this module the PIP function can be usedwith our devices. Split screen and Multi PIPare not used.This processor does not form part of the digitalsignal processing. As you can see from thecircuit diagram, the RGB signals from SDA9488 pins 15/16 and 17 are fed directly toTDA 9332 (pins 30/31/32).SDA 9488 receives the FBAS or Y/C signal tobe processed on pins 26/28 from the videoconversionIC.The necessary 100 Hz V/H synchronous signalsare fed to pins 4 and 3.For our medium devices as for our high varianta VGA interface can be retro-fitted. TheVGA RGB signals are not, however, fed directlyinto the TDA 9332, as in the high-enddevice, but for VGA operation are loopedthrough the SDA 9488 to the TDA 9332.From the VGA interface the RGB signals areled to pins 11/12 and 13 of SDA 9488.4.9 Video/deflection controllerTDA9332 (deflection area)The Philips TDA 9332 video/deflection controllercan be used in standard TV’s as well as indevices with double picture and line frequency.The video/deflection controller is switched inthe Q 2500 chassis in such a way that it candrive the H/V deflection with double the frequency.4.9.1 Clock generation/Phase 2 loopAll the necessary cycle and synchronous signalsnecessary for internal signal processingare derived from this block.The synchronous signals generated by SAA4979 are fed to pin 24 (H synchronous signal)and to pin 23 (V synchronous signal) of thecontroller. The cycle frequency for the video/deflection processor is produced with an external12 MHz quartz on pins 20 and 21. Thiscycle is synchronised by a PLL that operateswith the horizontal synchronous pulse HA.4.9.2 DAC for OW/V controland H output stageThe DACs for the two vertical -VD+ controlsignals contain all vertical correction information.The VD+ control signals are output topins 1/2 and are fed via R 1032 and R 1033 topins 2/3 of W 1511. In this way the V outputstage on the basic board is controlled by d.c.The vertical frequency E/W parabola also containsall correction information. The controlsignal is output by I 2521 on pin 3 and is fedvia W 1511 pin 6 to the basic board. In thisway the E/W output stage on the basic boardis controlled.The horizontal output is programmed in sucha way that on pin 8 a rectangular signal with13 µs H and 19 µs L level for control of the H-output stage on the basic board is output. Thesignal reaches Q 2556 and Q 2561 on pin 13of pin connector W 1511 via two inverterstages and controls H output stage Q 534 onthe basic board via H driver stage Q 526.In the SAT standby, for SAT radio and foroverwriting in standby, the c.r.t. must beswitched off. For this the horizontal pulse isswitched off via transistor Q 2951. The controlof Q 2951 is implemented via pin 79 of theSDA 6000 microprocessor. The c.r.t. isswitched off here with H level.4.9.3 Beam current dependent correctionthe vertical/horizontalamplitude and the H phaseAs we know the high voltage at the anodeconnection of the c.r.t diminishes at highbeam currents, owing to the internal resistanceof the high voltage generation. Thelower high voltage means that the beam ofelectrons is not so strongly accelerated andcan be deflected outwards again by the V/Hmagnetic deflection fields. The picture becomeslarger.If the beam current decreases (darker picturecontent) the picture becomes smaller again.Appropriate corrective measures are neces-Document Q 2500 108 © Loewe ProCollege

Technology of Q 2500 colour TV setsary to prevent this video pumping or at leastto reduce it. To do this beam current dependentcorrection information is applied to pins 4and 14 of the deflection controller . The OWand V amplitude are influenced via pin 4 andthe H phase via pin 14.The beam current dependent informationtaken from the base of the diode split transformerand output by W 1511 via resistancesand the two transistors Q 2639/Q 2638 is fedto pin 4 and pin 14 of TDA 9332. Switching viathese two transistors ensures that the basevoltage is adapted in an optimum way toI2521. pin 4/14 of I 2521 requires a voltagefrom 1.2 V to 2.8 V. The vertical amplitudecompensation is defined firmly in I 2521 and isthe same for all types of c.r.t. The horizontalamplitude compensation is influenced via internalregisters by I 2521. Various values areheld in EAROM for the various c.r.t types.Dependent on the measured values the picturewidth and, if necessary, the V amplitudeare influenced by the E/W output. Delay of thecontrol is about the duration of 10 lines. A lateralglitch at bright picture settings cannot beavoided but can be reduced to some extent.Due to the varying load on the line outputstage, the line flyback pulse is also affected.This means that beam current changes alsoinfluence the H phase. The correction informationon pin 14 of TDA 9332 opposes this viathe internal phase correction.Document Q 2500 109 © Loewe ProCollege

Technology of Q 2500 colour TV set5 Audio signal processing5.1 Audio-Signal pathBlock diagram Q 2500 H/M and BAV3 Pin3AV3 Pin1DVB/Sat/W1506/2DVB/Sat/W1506/4Front/W1521/2Front/W1521/4AV2 Pin 2AV2 Pin 6AV1 Pin 2AV1 Pin 6(DVB2 W1416/4)(DVB2 W1416/2)AV3 Pin6Q2500/H/Maudio signalpathLRR3R2 L225410 19 9 20 11 18 6 235 2462352442520 9MSP Pin34MSP Pin33I1871TEA6422DI1851TEA6420D17 16R3 L312 15 14L1 R2 L213R113 14 15 16 11 12I2091/C# C2092L57 56 54 53 33 34W2091/12W2071/6I2S-WS5SPDIF outW2071/8I2S - DA out16W2091/14SPDIF in1AC3 moduleW2071/8I2S - DA in17LC W2091/6I2051MSP3411W2091/11RC W2091/730W2091/128W2091/8W2091/3W2091/22725#L#I2091/BC2082LC2084RAV1 Pin1AV1 Pin3AV2 Pin1AV2 Pin3Q1441/46AV3 Pin2W1421/4 / TVOW1421/2 / TVOW1411/3 / Audio anlogW1411/1 / Audio anlogLW1610/1 Basic-B. W1610/2CLSRSLFERC LCRR24KHL47485051W1211/11 IF tuner 67W1211/12 IF earth 68W1416/4 IF Twin_Sat 69W1211/10 Secam/L Mono 601011W1521Q1461/66KH8642RLRSLS4 2 H-LinkW1541SPDIF in2W2091/10SPDIF inDVB int.W1251/2DVB-int.RW1431/HF transmitterHeadphonesL1R1L3I2091/D #37 36C2091W2091/4 W2091/5 RR L R L R L L R#Notequippedwith AC3#C2074Document Q 2500 110 © Loewe ProCollege

Technology of Q 2500 colour TV setDVB/Sat/W1506/2DVB/Sat/W1506/4Front/W1521/2Front/W1521/4AV2 Pin 2AV2 Pin 6AV1 Pin 2AV1 Pin 6(DVB2 W1416/4)(DVB2 W1416/2)AV2 Pin1AV2 Pin3AV1 Pin1AV1 Pin3Q2500/Baudio signalpath25410 19 9 20 11 18 6 235 24MSP Pin34MSP Pin33I1871TEA6422D15 14 17 16 13 12LR L R L L RI2091/DFront LS54 53 33 34 37 36RI2051MSP341128C2082L27C2084W1211/11 IF tuner67LRW1211/12 IF earthW1610/1 Basic-B. W1610/2RC LC68W1416/4 IF Twin_Sat 69W1211/10 Secam/L Mono 60Q1461/662410RKH11 W1521Headphones Q1441/4625L1R1I2091/CKHR2 L2 R3 L3Document Q 2500 111 © Loewe ProCollege

Technology of Q 2500 colour TV setIn the Q 2500 chassis a family of multistandardsound processors is used, whichcontain all the modules for digital sound/IFprocessing,FM/Nicam signal demodulation,Nicam decoding and audio base band. Themulti-standard MSP 3411 sound processor ismanufactured in 1.0 µm CMOS technologyand incorporated into the Q 2500 chassis in a80 pin PLCC housing.For devices without NICAM an MSP 3400 or3401 is used, which cannot process theseNICAM signals. The MSP 3401 and MSP3411 also support virtual surround. Otherwisethere is no difference between these threetypes.The multi-standard sound processor can beroughly divided into a demodulator-decoderblockand into an area that is responsible forthe digital audio base band processing - DFP.The following functions are integrated into thetwo blocks.5.2 Demodulator/Decoder-Block− Automatic amplification control (AGC) forthe selected sound/IF signal− A/D converter for the sound/IF signal− Two internal sound/IF channels, e.g. forstereo with sound carrier 5.5 MHz /5.74MHz− FM demodulation− Decoder for Nicam signals18,432 MHzSDA SCL3 2 71 72MSP 3411 internal circuitsTunerSATRESETfrom audiointerfaceswitchI 185121RESETI 2051 MSP 3410S1...4 12SL/R 12SL/R676869605354TonZF 1ZFGNDTonZF 2AMTon 1A in LA in R51 KH RAudio analogue50 KH LI2C-BusInterfaceClockGenerat.DemodulatorDecoderIDENTA / DA / DS/Bus InterfaceFM 1FM 2NICAM ANICAM BIDENTSCART LSCART RLoudspeaker LLoudspeaker RHeadphones LHeadphones RDFPSCART LSCART RSCART switching interfaceD / AD / AD / AD / AD / AI2S InterfaceA out RA out LA out RA out LSC outRSC outLRL272830242533343638to loudspeakeroutput phase onBasic board− Two selectable inputs for the sound/IF signalSubwooferToheadphonesto audiointerfaceswitchI 1871To Cinchsockets/AV3Document Q 2500 112 © Loewe ProCollege

Technology of Q 2500 colour TV set5.2.1 Audio baseband processing− Flexible selection of the sound source to beprocessed, e.g. demodulator or Scartsocket− Selectable de-emphasis− Pre-amplifier for Nicam/FM and Scart signal− Independent volume adjustment for loudspeakerand headphones− Adjustment of bass, level, loudness,stereoscopic sound and balance in theloudspeaker branch and virtual surround− Stereo matrixDemodulator/Decoder blockQPSKDecoderNicamDecoderNicam / ANicam / BIntercarriersignalfromtunerIF signalfrom SAT tunerIF1IF2IF channel 2AGC A / DOscillatormixerFilterDemodulatorStereoZweitonDetectionStereoDetectionRegisterFM 2to audio base band processor (DFB)IF channel 1OszillatorMischerFilterDemodulatorFM 15.2.2 Demodulator/decoder blockThe sound/IF inter-carrier signal output by thetuner passes via a band-pass consisting ofL/C 2032, R/C 2033 and C 2036, to thesound/IF input1, pin 67 of MSP 3411. Theband-pass suppresses frequency componentsbelow 4.5 MHz and above 10 MHz. In this waysound interference that could be caused bythe colour carrier or the neighbouring picturecarrier is prevented. If the Twin-SAT unit isused a SAT sound/IF reaches the sound/IFinput2 on pin 69 of MSP via pin connector W1416 /pin 4 and the band-pass, consisting ofL/C 2037, R/C 2038 and C 2009.The analogue sound/IF signal is passed internallyfrom pin 67 (Hyperband tuner) or 69(SAT unit) to a transfer switch that is able toswitch between the two IF inputs of the MSPunder software control. The analogue IF signalis then adapted optimally by an automaticamplifier control, which can control input signalsfrom 0.14 to 3 Vss, to the ADC. The ADCchanges the sound/IF signal into an 8-bit datastream. The sampling rate is 18.432 MHz.This is produced by the internal clock generator.The frequency determining 18.432 MHzquartz is connected to pins 71/72 of MSP3411. This 18.432 MHz clock is also used forall digital processes in the MSP.The digital sound/IF signal is now processedin a multi-standard sound processor by twoindependently operating sound/IF channels.This is necessary, for example, in order toprocess stereo transmissions with carrier fre-Document Q 2500 113 © Loewe ProCollege

Technology of Q 2500 colour TV setquencies of 5.5 /5.74 MHz or even othersound transmission standards. These two IFchannels can be programmed by the operatingsoftware to different sound carrier frequencies.For the digitally filtered sound/IFcarrier full modulation is carried out in bothchannels. The digital sound signals are felt onthe output of the demodulator/decoder block.In the second sound/IF channel decoding ofthe pilot sound carrier takes place with soundtransmission by the two carrier frequencies5.5 /5.74 MHz. In addition to the FM modulatedVF signal, the 5.74 MHz carrier is modulatedwith an AM modulated 54,7 kHz pilotsound carrier. The pilot sound carrier is variouslymodulated depending on the transmittedVF signals (mono, stereo or two-tone).The name "Nicam" is an abbreviation andstands for "Near instantaneously compoundedaudio multiplex".In this system the digital audio information ismodulated by an additional sound carrier.The signal gets its name QPSK signal from"Quadrature phase shift keying" from the typeof modulation, which is quadrature modulationwith rotating phase,Owing to the various television standards twodifferent sound carrier frequencies are usedfor the Nicam transmission. For PAL-I thesound carrier is 6.552 MHz and for PAL-B/G itis 5.85 MHz.5.2.4 Audio signals from the interfaceswitchingModulation type from pilot sound carrierOperating typeMonoStereoTwo toneNatural frequencyunmodulated117.5 Hz274.1 HzDetection of the pilot sound carrier is carriedout in the second IF channel, in which the5.74 MHz sound carrier processing takesplace, The result of the continuous pilot soundcarrier evaluation is written to the "Stereo DetectionRegister" of the MSP. This register isread cyclically by the CCU via the I²C bus,and depending on the operating mode set theCCU communicates to the MSP via the I²Cbus the type of de-matricising that must beswitched on.5.2.3 Nicam processingNicam is a sound transmission system designedfor terrestrial transmission. It was developedin the United Kingdom for stereo TVtransmission and is now used in a number ofother European countries.If audio signals are fed to the Scart sockets,the selected VF signal pair is applied directlyto pins 53/54 of the multi-standard soundprocessor via the audio interface switch (seeAudio Signal Path). If the signal board is fittedwith 3 AV sockets the audio signal is output bythe AV3 socket directly to pins 56/57 of theMSP. The audio signal passes via an internalswitch to two ADCs. The audio signal is digitisedby the two ADCs for further processingand then led internally to the audio base bandprocessor.5.2.5 AM audio signals at L standardIf AM signals are processed in the device, theIF preparation and demodulation is carried outin the HF/IF block.The VF signal comes from pin 23 of the cabletuner to pin 60 of the MSP 3411. Furthermore,the signal path is the same as the signals thatcome from the interface transfer to pins 53, 54of the MSP.Document Q 2500 114 © Loewe ProCollege

Technology of Q 2500 colour TV set5.2.6 Audio base band processorIn the DFP there is a pre-amplifier for all threedigital VF signal pairs; Nicam A/B, FM 1/2 andScart L/R. The adjustment of the pre-amplifierfor each VF input pair is independent and isdetermined by the software. This means thatfor further processing nearly the same digitalVF level is available.For the FM 1/2 and Nicam A/B signal pairs thepre-amplifier is followed by the necessary deemphasis.The FM 1/2 VF signal pair is fedonward to the FM matrix. For an FM stereotransmission the stereo L and R signals arere-constituted from the L+R/2 signal of FM 1and the R signal of FM 2 in the FM matrix.The FM matrix is controlled by SDA 6000 viathe I²C bus according to the selected operatingmode - stereo or mono. In the followingchannel selection, after the selected operatingmode, the selected VF signal is switched tothe VF output branches in the MSP, which arecontrolled independently of one another, forloudspeaker, headphones and interface selection.MonoAudio Base Processor (DFP)Loudspeaker branchScart / LScart / RFM 1FM 2DeemphasisMatrixChannel selectionMatrixMatrixBassTrebleLoudnessbase widthHeadphones branchVolumeBalance2xD/ABeeper2xD/ALRLRNicam / ANicam / BDeemphasisMatrixInterface out.2xD/ALR5.2.7 Loudspeaker branchAfter channel selection the two VF channelsare led to the digital filter and control stages,which are all controlled from the CCU via theI²C bus. As the processing for both channelsis identical, the following description will dealwith one channel only.louder than deeper or higher frequencies. Thefilter coefficient necessary for the reduction isdetermined and is applied in varying strengthsto the signal, depending on the volume.5.2.8 LoudnessThe signal comes from the matrix and is fedinitially to a filter with which an ‘as heard’loudspeaker control (Loudness) is implemented.Depending on the loudspeaker settingfrequencies around 1 kHz are reduced, asfor same sound pressure the human earsenses these frequencies as being a lot5.2.9 Sound settingThe sound control stage consists of two separatefilters for the height and bass settings.The control range for the two filters is +12 dB.Document Q 2500 115 © Loewe ProCollege

Technology of Q 2500 colour TV set5.2.11 DAC5.2.10 Loudspeaker control and AVC(Automatic Volume Control)The signal then passes through the loudspeakercontrol stage. The control rangecomprises 64 stages. In MSP 3411 eachchannel has a second control stage for thebalance setting.In addition, the MSP offers the facility ofmeasuring the level at the input. This is usedas the AVC function. This means that it ispossible to select different volumes for transmittersduring breaks for advertisements orbetween different transmitters. Therefore, thedesign does not provide for a programme locationrelated volume correction.The actual value on the input determined bythe MSP is communicated to SDA 6000 viathe I 2 C bus. In the operating software a preciselydefined amplification is assigned via thevolume value. If the measured value deviatesfrom the required value, the volume is decreasedor increased via the I 2 C bus until therequired value is reached.VF leveltransmitterBreak foradvertisementsA DAC is controlled with the signal set by thedigital controller. The analogue signal is outputfor the right and left channels on pin27/28. The signal is then fed via transistors Q2081 and Q 2083, which are switched as animpedance converter. Via the coupling capacitorsC 2082/84 the signal then arrives at W1610, pins 1 and 2, and from there is fed tothe basic board on the two output stages.5.2.12 Headphone branchIn the headphone branch there is an independentvolume setting, that can be changedindependently of the loudspeaker volume,also in 64 stages.The digital/analogue converted audio signalsfor the headphones are output to pins 24/25.The W 1494 audio Cinch sockets are suppliedwith level by pins 36/37 of the MSP. In orderto deliver sufficient output level to these Cinchsockets the Q 2500 chassis has in this branchtwo amplifier stages, consisting of the operationalamplifier I 2091C and D. The amplifiersamplify the signal by a factor of 2. For the setting“Sound via HiFi unit“ the output level canbe set from 0 Vss to 3.5 Vss.If “Sound via TV“ is set, then there is a standardlevel on the Cinch sockets.VF leveloutputMSP30-70msca 10sThis means that various control constants areused. Loud passages are toned down within30 to 70 ms. An increase in soft passages onthe other hand occurs with a delay of about 10s, to avoid an unwanted increase in volumeduring the transmission. In addition, the AVCcan be switched off within the sound menu.5.2.13 Interface branchThe audio level for the interface is set by theoperating software and cannot be changed.The digital, analogue-converted VF signals forthe interface connection are applied to pins33/34.5.2.14 Deadline volumeDuring operation, a kind of awakening functioncan be programmed into the Q 2500 chassisas a deadline time. In addition, there is anawakening tone, with an adjustable volume.Document Q 2500 116 © Loewe ProCollege

Technology of Q 2500 colour TV setVia the I 2 C bus it is also possible for MSP3411 to switch off the sound in the loudspeakerand headphone branch. At the sametime an internally generated 1 kHz rectangularsignal is applied to these channels. In theheadphone branch the level is dependent onthe headphone volume. In the loudspeakerbranch the level can be set, independently ofother volume, in 39 stages in the “Time services“menu .5.2.15 Mute circuitAs the only additional switching measurethere is an active mute circuit parallel to theoutput amplifier inputs with transistors Q 1581and Q 1586. It is controlled by transistors Q2966 and Q 2961 from the ON/OFF commandof the CCU, or via transistor Q 2027 from pin77 of MSP 3410 .Noise associated with switching on and off, aswell as any crackling when switching over issuppressed.Mute stages are also incorporated for theheadphone branch and the Cinch sockets. Ifan AC3 module is incorporated it also generatesa mute if necessary e.g. if the sound decoderis switched.On start up the L level of the ON informationof the CCU of transistor Q 2961 is blocked.The voltage taken from the conversion transformerand rectified by D 491 is able to chargeElko´s C 2967/68 very quickly via diode D381. The charge process from C 2963 flowsvia R 2963 extremely slowly, as D 2964 isnow blocked. Not until Elko C 2963 is chargedto almost the same potential as C 2967/68does transistor Q 2966 conduct. A positivevoltage is felt on the base of transistors Q1581/Q 1586 whereby this switches and theVF lines are at earth potential.Not until C 2963 is charged and Q 2966, Q1581 and Q 1586 are blocked, can the VFreach the output stage without hindrance.At the point of switching off the voltage fromthe power supply falls off relatively quickly.Transistor Q 2961 is switched by the H levelof the OFF information of the CCU . Thismeans the charge from C 2963 can flow toearth. Q 2966 becomes conductive, wherebythe charge from C 2967/68 controls transistorsQ 1581 and Q 1586 and the VF lines are atearth potential.The mute information that is active on start upand shut down activates all the mute levels.In the initialisation phase pin 77 is set to Llevel by MSP 3411. With L level transistor Q2027 switches. Via its emitter-collector pathU5 also reaches the mute line and all mutestages are active.To prevent the VF mute stages themselvesproducing interference during the switchingphase, they are d.c. decoupled and fitted withdischarge resistors.If a Dolby Digital Module is incorporated theLFE channel from the mute function is controlledsilently via transistors Q 1551 and Q1552/56.The Dolby Digital Module receives the mutefunction from the signal board on contact connectorW 2091 /pin 13.Document Q 2500 117 © Loewe ProCollege

Technology of Q 2500 colour TV setC1584C1589LS-R LS-LLS-L28C2081W2091/6 AC3 LCR2961R2962R1584R1589L1571C2967C2084R2084W1610/5C1571# #Q2083Q2966R2966 R2082R2967R2964Q2081C2082C2083R2963R1581R1582R1587 R1586Q1586Q1581R2081R2083U5UMD2967D2964C2968C2963Q2961W1610/1W1610/2R2028R1497R1489R1493R1492Q1453Q1473R1473Q1433R2027MSP/77R2026C2027Sound mute switchR1556Q2027rotW1494LweissQ1498R1498R1488Q1483 R1496 R1491RR1495R1483Q1496Q1491C1495R1490C1490U12LS-R27MSPR1453R1554RS C041 R077 RS LSR080MuteSurroundQ007R078Q006R079LS C037 R069Q005R072Q004Q008R088Q010C049C050Q009LRMute Headphonesto W1521/10/11HF transmitterW1431/2/4R1433MuteQ1556Q1551R1552R1551Q1552MuteStereooutput stage/BBMute LFEW1551/8Mute Front L/RRR1499R1494Q1493LW2091/4/5MSP Pin 36/37LFE W2091/1 MSP Pin 30W2091/7 AC3 RC(# not used with AC 3)On/OffCCU Pin 78R093R071R070AC3 module/Dolby DigitalR092R089 R090R091I01/Pin 30U12MuteSignal boardDocument Q 2500 118 © Loewe ProCollege

Technology of Q 2500 colour TV setOn the Dolby Digital Module the two surroundchannels are muted via transistors Q 8/Q 4/5and Q 6/7. If a data error is detected on theDolby Digital Module during digital sound signalprocessing, pin 30 on I 01 outputs H level.Via the two transistors Q 9 and Q 10 the mutefunction is then activated. For the mute functionthe Dolby Digital Module represents bothinput and output.As you can see from the mute circuit, somesounds have an output line, as, for example,for the LFE channel Q1552/56, two transistorsare used. This measure improves the mutebehaviour and the error rate of these stages.5.2.16 Headphone amplifierAs in previous models the front panel of thedevice has a connector for headphones. Asfor the loudspeaker branch the signals arealso generated in the MSP 3411. As alreadydescribed, the loudspeaker control for theheadphone control is also implemented in it.These signals are output in pulse width modulatedform on pins 24 and 26 of the MSP andintegrated with external RC components intoan VF signal at up to 1.2 Vss. They are fedrespectively to an amplifier stage, consistingof 2 transistors Q 1441/46 and Q 1461/66.This stage amplifies them to 9 Vss and outputsthem via a decoupling through C 1448/68to the headphones socket and pin 2/4 on pinconnector W 1431 for the HF transmitter.The headphones volume can be controlled in63 stages and the setting displayed on thescreen.Document Q 2500 119 © Loewe ProCollege

Technology of Q 2500 colour TV setHeadphones amplifierW1550/11LW1550/10HeadphonesRW1431/4W1431/2 HF transmitterMSP Pin 24U12SR1432C1432Q1432R1478 R1476R1477R1462C1461R1461C1463R1463R1457R1456R1458R1442R1466Q1461R1446C1468C1469Q1466R1467C1448C1449R1449R1468R1469C1471R1448MSP Pin 26R1441Q1446C1451C1441C1443Q1441R1443R1447Q1453R1453Q1473R1473MuteDocument Q 2500 120 © Loewe ProCollege

Technology of Q 2500 colour TV set5.3 AC3 module (Dolby Digital)5.3.1 Block diagram, AC3 moduleAC3 modulSOUNDTABLELS12VMC34063DC-DCConverter-12VAT27LV020AROMRSLCLCLSRSI²S2AUDIO OSZ.I²C1SP-DIF INCS 492505Multi ChannelDigital AudioDecoder3 X I²SRESETRESETI²C1CS 4226D/A-Converter6 X 20 bitLFERLCCLRSSM2404SHEF 4053SpeakerConfigurationMatrixCLRCLRSP-DIF IN 1SP-DIF IN 2SP-DIF IN 3NJM2234P16P17I²C1PCF857516 bit I²CExpanderP3P4P5P6P7P0P1P2P10P11P12P13LFELFERCLFERCSP-DIF5.3.2 AC 3 signal processingA Dolby Digital Module can also be incorporatedinto the signal board variants Q 2500/Hand Q 2500/M. If a signal board is fitted withthe AC 3 module, the essential sound signalprocessing takes place on the AC 3 module.The AC 3 module supports:- Dolby Pro Logic- Dolby Digital 5.1- Circle SurroundDolby Digital 5.1 and Circle Surround cansupply up to 6 sound channels.- 2 channels for Front left and right- 2 channels for Surround left and right- 1 Centre channel- 1 deep sound channel (LFE low frequencyeffects)The Dolby Digital 5.1 Decoder is only active,when a correct AC 3 audio digital signal issupplied from a signal source.- PCM StereoDocument Q 2500 121 © Loewe ProCollege

Technology of Q 2500 colour TV setThe Circle Surround Decoder operates with anormal stereo signal. From this stereo signalthe decoder decodes the 6 sound channels.This function has the advantage that for thegreat majority of stereo transmitters a 5.1 surroundsignal can already be used.Dolby Pro Logic supports four sound channels.2 channels for front left and right1 centre channel1 mono surround channelDeepsoundchannelLFE7KHznoDolby Pro Logic also operates with a stereosignal, this must, however, also be coded withthe Dolby Pro Logic standard. If this is not thecase then no Center/Surround Signal is produced.NF bandwidth of the sound channelsDolbyProDolbyDigitalCircleSurroundLogic 5.12 channelsFront L/R20Hz-20KHz20Hz-20KHz20Hz-20KHz2 channelsSurroundno 20Hz-20KHz20Hz-20KHzMono 100- no noSurround 7kHzCenter 20Hz- 20Hz- 20Hz-20KHz20Hz-100Hz20KHz20Hz-100HzThe AC 3 modules can receive digital audiosignals via three paths.• I 2 S bus data supplied from MSP 341x onthe signal board.• SPDIF audio data from the two digital AudioCinch input sockets.• SPDIF audio data form the internal DVBi 2Decoder (deliverable end 2002, not usedin all device variants).The AC 3 module cannot process any analoguesound signals directly. The analoguesound signals from internal – e.g. Sat unit,tuner or DB module – as also from external –e.g. video recorder – sound signal sources,must first be converted into digital sound busdata (I 2 S bus). This task is implemented bythe Multi Sound Processor MSP 341x, whichis incorporated into the signal board.The digital I 2 S bus data is emitted by MSP I2051 on pins 4/5 and 6 and are fed to the AC3 module via pins 5/6/7 of contact connectorW 2071. All analogue sound output signals tothe AV sockets and the headphones amplifierare delivered by the MSP. The AC 3 modulehas no influence on these output signals. TheAC 3 module does not deliver any I 2 S busdata back to the MSP. This also means thatno sound signals are delivered to the AVsockets and the headphones amplifier, if signalsare supplied only via the SPDIF Cinchsockets.The SPDIF signals (SPDIF Sony Philips DigitalInterFace, level 0.7 Vss-1 Vss to 75 Ohm)are supplied by the Cinch sockets to the contactstrip W 2091 pin 14 SPDIF in1 and pin 11SPDIF in2.SPDIF data from DVBi 2 module is supplied toW 2091 pin 10.The SPDIF signals reach the AC 3 module onchangeover switch I 18. This is controlled bythe I 2 C bus expander I 11 via pin 2/4. TheSPDIF signal selected for processing is outputto pin 7 of I 18. The selected signal is alsoreturned to the SPDIF Cinch outputs via pin12 of Q 11 and W 301.I 2 converts the SPDIF signal – input pin 42 –of the I 2 S bus data – I 2 pins 1/43/44 - fromMSP in the I 2 S bus data for the I 1 (DSP -Digital Sound Processor). I 1 processes thisaudio data according to the prescribed standard.For this the respective software requiredis loaded from I 5 memory. The memory isorganised into 8 blocks, each of 32 kByte. ForCircle Surround, Doby Pro Logic and DolbyDigital a 32 kByte block respectively is required.If, for example, Circle Surround isswitched to Dolby Surround, the CCU controlsExpander I 11 via the I 2 C bus in such a waythat the address switching lines I 11 pin9/10/11 of the memory block in I 5 for DolbySurround can be selected. DSP I 1 receivesan interrupt from CCU pin 77 via pin 14 of W321.Document Q 2500 122 © Loewe ProCollege

Technology of Q 2500 colour TV setThe interrupt causes I 2 to load new softwarefrom the memory. Due to the block preselectionfrom the the I2C bus expander, theDSP now loads the software for Dolby ProLogic.The DSP processes the I 2 S bus data accordingto the appropriate instructions. The overwhelmingnumber of sound parameters to beset also occur in the DSP.The DSP feeds the digital sound bus databack to the converter I 2, where the digital/analogueconversion takes place. The 6sound output channels of I 2 reach W 301 viathe operational amplifier and the loudspeakermatrix – consisting of I 6/9/14.- pin 1 LFE/SUB (deep sound channel)- pin 2 RS (Surround right)- pin 3 LS (Surround left)- pin 4 R (Front right)- pin 5 L (Front left)- pin 6 LC (Center left)- pin 7 RC (Center right)- pin 8 C (Center channel)5.3.3 AC 3 IC functionsCS 4925-01 (I 1)Multi Channel Digital Audio Decoder.- Processes according to the operatingmode, - Circle Surround, Dolby ProLogic Dolby, Digital 5.1 - digital Soundbus-data.- Implements all sound settings, such asheight and depth settings.CS 4226 (I 2)DAC- Converts SPDIF signals into I 2 S bus datafor I 1 .- Converts the I 2 S bus data processed by I1 into analogue signals for the loudspeakermatrix.6 Interface switchingInterface switching is via Q 2500 on the signalboard. Switching of the various on and off signalsis implemented essentially by six ICs; twoTEA 6415, two CD 4053 for the video signals,a TEA 6422 and a TEA 6420 for the audiosignal switching. Control is directly from I²Cbus system 3 via SDA 6000. An exception isCD 4053 I 1631 and I 1771.I 1631 switches between the RGB lines of theAV3 socket and the RGB signals of the DVBdecoder. I 1631 is controlled from a freeswitch output in MSP, which itself is activatedby the CCU via the I2C bus. If the output onpin 78 of the MSP is switched to H level, thenL level is felt on pins 9/10/11 of I 1631 via inverterQ 1637. With L level on, its control inputI1631 switches to AV3 operation, at H levelthe RGB signals from the DVB decoder areswitched through to the signal processing.I 1771 is used for chroma signal switching if aDigital Link Plus SVHS video recorder is connected.During SVHS operation a chroma signal isexpected from SVHS Digital Link Plus videorecorders on pin 7 of the AV socket. For VHSvideo recorders it is pin 15.If the device control detects a SVHS DigitalLink Plus VCR, the chroma signal is switchedto pin 7 of the AV1 or AV2 socket on overplayand during a DVB recording. I 1771 isswitched from two switch outputs on pin115/116 I 2311. This in turn is controlled bythe CCU.As the two TEA 6415 must be addressed differentlyfor picture signal switching, pin 7 of I1116 is earthed and I 1181 is at the operatingvoltage.The exact signal flow for the video and audiosignals can be obtained from the appropriateflow diagrams.Document Q 2500 123 © Loewe ProCollege