1. Introduction - Laboratory for Reliable Computing
1. Introduction - Laboratory for Reliable Computing 1. Introduction - Laboratory for Reliable Computing
from larc.ee.nthu.edu.tw
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11.07.2015
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MUX ScanxCombinationalLogicCTSIM D M D M DSO1. Switch to SR mode and check SR operation2. Initialize SR---load the first pattern3. Return to normal mode and apply test pattern4. Switch to SR mode and shift out the final state whilesetting the starting state for the next test. Go to 3m01intro7.02 Cheng-Wen Wu, NTHU 24
xLFSRCircular BISTMuxSISOCombinationalLogicMISRzMISRm01intro7.02 Cheng-Wen Wu, NTHU 25
- Page 2 and 3: • IntroductionOutline• RAM func
- Page 4 and 5: • Scope of testingOutline• Defe
- Page 6 and 7: • Economics!− Product quality
- Page 8 and 9: Test Cost9080706050403020100Test co
- Page 10 and 11: Scope of Testing• Engineering Tes
- Page 12 and 13: Fault Model and Error• Fault mode
- Page 14 and 15: Testing and Fault Coverage• Testi
- Page 16 and 17: Defect Level and Fault CoverageRequ
- Page 18 and 19: Logic Fault Modeling: Stuck-at Faul
- Page 20 and 21: Fault Diagnosis• Fault detection:
- Page 22 and 23: Design for Testability (DFT)• A f
- Page 26 and 27: Scan-Based PS-BIST with Test Points
- Page 28 and 29: Embedded Memory Testing• Embedded
- Page 30: Off-Line Testing of RAM• Parametr
xLFSRCircular BISTMuxSISOCombinationalLogicMISRzMISRm01intro7.02 Cheng-Wen Wu, NTHU 25
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