1. Introduction - Laboratory for Reliable Computing
1. Introduction - Laboratory for Reliable Computing 1. Introduction - Laboratory for Reliable Computing
• IntroductionOutline• RAM functional fault models & test algorithms• RAM fault-coverage analysis & test generation• Testing word-oriented & multi-port memories• Memory built-in self-test (BIST) & built-in self-diagnosis(BISD)• Memory redundancy analysis and built-in self-repair(BISR)• Memory failure analysis• RAM on-line testing• Testing non-volatile memoriesm01intro7.02 Cheng-Wen Wu, NTHU 2
Chapter 1: IntroductionCheng-Wen Wu 吳 誠 文Lab for Reliable ComputingDept. Electrical EngineeringNational Tsing Hua University
- Page 4 and 5: • Scope of testingOutline• Defe
- Page 6 and 7: • Economics!− Product quality
- Page 8 and 9: Test Cost9080706050403020100Test co
- Page 10 and 11: Scope of Testing• Engineering Tes
- Page 12 and 13: Fault Model and Error• Fault mode
- Page 14 and 15: Testing and Fault Coverage• Testi
- Page 16 and 17: Defect Level and Fault CoverageRequ
- Page 18 and 19: Logic Fault Modeling: Stuck-at Faul
- Page 20 and 21: Fault Diagnosis• Fault detection:
- Page 22 and 23: Design for Testability (DFT)• A f
- Page 24 and 25: MUX ScanxCombinationalLogicCTSIM D
- Page 26 and 27: Scan-Based PS-BIST with Test Points
- Page 28 and 29: Embedded Memory Testing• Embedded
- Page 30: Off-Line Testing of RAM• Parametr
• <strong>Introduction</strong>Outline• RAM functional fault models & test algorithms• RAM fault-coverage analysis & test generation• Testing word-oriented & multi-port memories• Memory built-in self-test (BIST) & built-in self-diagnosis(BISD)• Memory redundancy analysis and built-in self-repair(BISR)• Memory failure analysis• RAM on-line testing• Testing non-volatile memoriesm01intro7.02 Cheng-Wen Wu, NTHU 2
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