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Understanding Smart Sensors - Nomads.usp

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114 <strong>Understanding</strong> <strong>Smart</strong> <strong>Sensors</strong>inclusion of any output-drive capabilities required by the specific sensing andcontrol application onto the MCU. This type of power integration could havebeen accomplished in level III except that standard production MCUs withexternal drivers could have been more effectively used at the lower levels. Atlevel IV, there is a definite transition from standard-product MCUs into customizationfor a specific application or market. Therefore, all aspects of thetotal system should be considered for integration at this level to maximize thebenefits of the added design and development investment.Table 5.3 shows the implications of different process defectivities (defectsper unit area) on the net cost of a combined solution at one point in time [7].Recent industry MOS fabrication processes have typically between 0.5 to 1.0defects/cm 2 with the best in class at 0.2 defect/cm 2 . To demonstrate the costs ofcombining a sensor with an MCU, consider a small 0.100-inch by 0.100-inchMCU processed at 0.8 defect/cm 2 and a 0.100-inch by 0.100-inch sensor processedat 4.0 defect/cm 2 . The example MCU will have a relative cost of 1.05 versusa 0.100-inch by 0.100-inch device processed with zero defects. The sensorwill have a relative cost of about 1.29. That gives a combined two-chip relativecost of 2.34. If the sensor and the MCU are combined on a single die using asensor process that creates 4.0 defects/cm 2 , the resulting die would be about0.128 inch by 0.128 inch and have a relative cost of 2.50. That cost increase ofonly 1.07 times the combined die cost may be less significant than the addedassembly and test costs of two separate devices.The cost tradeoff changes dramatically as the MCU die size increases. Ifthe same 0.100-inch by 0.100-inch sensor is combined with a larger 0.300-inchby 0.300-inch MCU with relative cost of 15.15, the relative cost of thecombined two-chip set rises to 16.44. Combining the two chips into an equivalentdie size of 0.311 inch by 0.311 inch and processing at the higher defectivitysensor process will yield a relative cost of 75.28, or 4.58 times thetwo-chip solution. A more recent (1998) analysis that took into account processingimprovements still yielded a 4× cost impact to integrating a bulkmicromachined sensor with an MCU. Integrating a (typically) higher defectivitysensor process onto another chip becomes increasingly more costly asthe total die size increases. In all cases, adding a sensor to another silicon devicewill add some cost due to the added silicon area for a fixed batch size (waferdiameter). However, the cost penalty of adding a sensor on a chip decreasesif the defectivity of the sensor process decreases. Typically, MCUs use largerwafer size and a higher density process than the sensor, adding to lower yieldexpectations and higher cost for a combination of the two approaches. Asimprovements in processing technology occur, the added cost can be traded offagainst packaging and assembly costs for the two-chip approach.

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