section 7 - Index of

Saturation Arithmetic .................... 3-9SBC ............................... A-270Scaling .............................. 3-10Scaling Bit ....................... 5-11, A-16Scaling Mode Bits ...................... 5-12SD Bit ............. " ................ 7-38Short Jump ........................... 6-14Short Word ............................ 6-5Sign Extension ......................... 3-8Simulator Features ..................... 11-5Software Debug Occurrence Bit .......... 10-11. Software Interrupt Sources ............... 7-17illegal instruction (III) ................ 7-18SWI ............................. 7-17SP .............................. 5-5,5-15SS ......................... '" ... " .. 5-5Stack Pointer (SP) Register .............. 5-15restrictions . . . . . . . . . . . . . . . . . . . . . . . . 7-10Stack Pointer Register (SP) ............... 5-5Status Register (SR) ................. 5-5, 5-9condition code register ............... 5-9mode register ...................... 5-9Stop Cycles .......................... 7 -3~Stop Delay Bit ......................... 7-38STOP Instruction ................ 7-37, A-274Stop Processing State .................. 7-37debug request during .............. 10-15PLL and ...................... 7-41,9-13SUB ............................... A-276SUBL .............................. A-278SUBR .............................. A-280Support . . . . . . . . . . .................... 11-3SWllnstruction ....................... A-282Syntax ................................ 6-3System Stack (SS) .............. 5-3, 5-5, 5-14system stack high (SSH) ............. 5-14system stack high (SSH) restrictions ... 7-10system stack low (SSL) . . . . . . . . . . . . . . 5-14system stack low (SSL) restrictions .... 7-10Tcc ................................ A-284Tech nical Assistance .................. 11-16TFR .... " .......................... A-288Timing Calculations ................... A-294Timing Skew ........................... 9-3Trace Mode Bit .................. 5-13,10-10Trace Occurrence Bit .................. 10-11TracingOnCE trace logic .................. 1 0-13Tracing (DSP56000/56001 only) ........... 7-22Training ............................. 11-17TST ............................... A-290Unary Operators ....................... A-7Unnormalized Bit .................. 5-10, A-17User Support .......................... 11-3V-bit ................................ A-17Voltage Controlled Oscillator (VCO) ......... 9-5WAIT Instruction ................. 7-36, A-292Wait Processing State ................... 7-36debug request during ............... 10-15PLL and .......................... 9-14Wordlength of ........................... 6-5operation .......................... 6-3optional effective address extension ..... 6-3X Address Bus (XAB) .................... 2-4X Data Bus (XDB) ....................... 2-3Y Address Bus (YAB) .................... 2-4Y Data Bus (YDB) ....................... 2-3-5--T--u--v--w--x--y--z-Zero Bit ......................... 5-1 0, A-17