section 7 - Index of

zero (bit 2) .................... 5-10, A-17 memory expansion port (port A) ..... 2-6Condition Codes ........................ A-3 on-chip emulator (OnCE) .......... 2-6Convergent Rounding .................... 3-6phase-locked loop (PLL)based clocking ............ 2-6program control unit .............. 2-5-0--E-DataALUdouble precision multiply mode ........ 3-16MAC ............................ 3-13 Edge Sensitive ........................ 7-16MAC and logic unit .................. 3-6 Edge Triggered ......................... 5-6programming model ................ 3-19 Electronic Bulletin Board ................. 11-7summary ......................... 3-19 Encodings .......................... A-311Data ALU Accumulator Registers ........... 3-7 condition code and address .......... A-315Data ALU components ................... 3-3 double-bit register ................. A-312Data ALU Registers ................. 3-3,6-6 effective addressing mode ........... A-315input registers ...................... 3-5 five-bit register .................... A-314operands table ..................... A-5 four-bit register ................... A-313Data Arithmetic Logic Unit (see Data ALU) ... 3-3 memory space bit ................. A-314Data Bus Move Field .................... 6-5 no parallel move .................. A-318Data Bus Signals (00-015) ........... 8-3, 8-5 nonmultiply instruction .............. A-332Data Buses ............................ 2-3 parallel instruction opcode ........... A-330Data Conversion ....................... 3-11 parallel move ..................... A-316Data Organization ................... 6-6, 6-9 program control unit registers ........ A-315Data Shifter/Limiter ...................... 3-9 single-bit register .................. A-312DEBUG .............................. A-76 six-bit register .................... A-314Debug Mode triple bit register ................... A-313entering . . . . . . . . . . . . . . . . . . . . . . . .. 10-14 write control . . . . . . . . . . . . . . . . . . . . .. A-314Debug Request Input (DR) ............... 10-6 ENDDO ............................. A-98Debug Serial Output (DSO) .............. 10-5 ENDDO Instruction Restrictions ............ 7-9DEBUGcc ............................ A-78 EOR .............................. A-100DEC ................................ A-80 Exception (Interrupt) Priorities ............. 7-12Design Verification Support .............. 11-3 Exception Processing State .............. 7-10DFO-DF3 ............................ 9-12 EXTALDIV ................................. A-82 synch w/CKOUT ................... 9-14DO ................................. A-88 Extension Bit ..................... 5-11 , A-16DO Instruction Restrictions ................ 7-8 External Interrupt Request Pins ............ 5-6DO loop control ......................... 2-5Double Precision Multiply Mode ........... 3-16algorithm examples ................. 3-16-F-Double Precision Multiply Mode Bit ........ 5-13Fast Interrupt ..................... 7-10,7-12Dr. BuB .............................. 11-7Fast Interrupt Execution ................. 7-26DSP Applications ....................... 1-7FFT Code ......................;..... B-3DSP Functions ......................... 1-7FIR Filter ............................. B-3DSP News .......................... 11-16Frequency Multiplication .................. 9-3DSP56K Central ArchitectureFrequency Multiplier ..................... 9-5central components . . . . . . . . . . . . . . . . . . 2-3address buses .................. 2-4address generation unit ........... 2-5-GdataALU . . . . . . . . . . . . . . . . . . . . . . . 2-5data buses ..................... 2-3 Global Data Bus (GOB) ................... 2-3