section 7 - Index of

!---LOWADDRESS ALU -----I~.j.I.....---HIGH ADDRESS ALU----jXAB VAB PABGLOBAL DATA BUSFigure 4-2 AG U Block Diagram--16bits_24 bitsicant bytes, and the most significant byte on the GOB is zero extended. When a registeris written, only the least significant 16 bits of the GOB are used; the upper portion is truncated.4.2.3 Modifier Register Files (Mn)Each of the two modifier register files shown in Figure 4-2 consists of four 16-bit registers.The two files contain modifier registers MO - M3 and M4 - M7, which specify the type ofarithmetic used during address register update calculations or contain data. Each modifierregister can be read or written by the GOB. When read by the GOB, the contents of a registerare placed in the two least significant bytes, and the most significant byte on the GOBis zero extended. When a register is written, only the least Significant 16 bits of the GOBare used; the upper portion is truncated. Each modifier register is preset to $FFFF duringa processor reset.4.2.4 Address ALUThe two address ALUs are identical (see Figure 4-2) in that each contains a 16-bit fulladder (called an offset adder), which can add 1) plus one, 2) minus one, 3) the contentsof the respective offset register N, or 4) the twos complement of N to the contents of theselected address register. A second full adder (called a modulo adder) adds the summed