section 7 - Index of
section 7 - Index of section 7 - Index of
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B.1 INTRODUCTIONTable 8-1 provides benchmark numbers for 18 common DSP programs implemented onthe 27-MHz DSP56001.The four code examples shown in Figures 8-1 to B-4 represent the benchmark programsshown in Table B-1.B.2 BENCHMARK PROGRAMSFigure 8-1 is the code for the 20-tap FIR filter shown in Table 8-1. Figure B-2 is the codefor an FFT using a triple nested DO LOOP. Although this code is easier to understandand very compact, it is not as fast as the code used for the benchmarks shown in Table8-1, which are highly optimized using the symmetry of the FFT and the parallelism of theDSP. Figure B-3 is the code for the 8-pole cascaded canonic biquad IIR filter, which usesfour coefficients (see Table B-1). Figure 8-4 is the code for a 2N delayed least meansquare (LMS) FIR adaptive filter, which is useful for echo cancelation and other adaptivefiltering applications.Thecode example shown in Figure 8-5 represents the Real FFTcode for the DSP56002, based on the Glenn Bergland algorithm.The code for these and other programs is free and available through the Dr. 8uB electronicbulletin board.
- Page 529 and 530: TFR Transfer Data ALU Register TFRC
- Page 531 and 532: TSTTest AccumulatorTSTInstruction F
- Page 533 and 534: WAIT Wait for Interrupt WAITConditi
- Page 535 and 536: including the number of words per i
- Page 537 and 538: 5. Compute final results.Thus, base
- Page 539 and 540: JLC (R2+N2)will requireand will exe
- Page 541 and 542: Table A-6 Instruction Timing Summar
- Page 543 and 544: Note that the "ap" term in Table A-
- Page 545 and 546: Table A-14 Memory Access Timing Sum
- Page 547 and 548: Other RestrictionsDO SSH,xxxxJSR to
- Page 549 and 550: Immediately before MOVEC from SSH o
- Page 551 and 552: A.9.S REP RestrictionsThe REP instr
- Page 553 and 554: Table A-18 Triple-Bit Register Enco
- Page 555 and 556: Table A-24 Program Control Unit Reg
- Page 557 and 558: R: Register to Register Parallel Da
- Page 559 and 560: JSSETJSSET#n,X:pp,XXXX#n,Y:pp,xxxx2
- Page 561 and 562: JSSET#n,S,xxxx23 16 15 87 000001011
- Page 563 and 564: BCHGBCHG#n,X:aa#n,Y:aa23 16 15 87 0
- Page 565 and 566: MOVE(M)MOVE(M)S,P:aaP:aa,DREP #XXXR
- Page 567 and 568: LUAea,O23 16 15 87 0I 0 0 0 0 0 1 0
- Page 569 and 570: ENDDO23 16 15 87 00 0 0 0 0 0 0 o 1
- Page 571 and 572: Table A-28 Operation Code QQQ Decod
- Page 573 and 574: Table A-30 Special Case #10 P E R C
- Page 575 and 576: NEGD23 87 43 0DATA BUS MOVE FIELDLS
- Page 577: ADDRS,D23 87 43 oDATA BUS MOVE FIEL
- Page 582 and 583: Table 8-1 27-MHz Benchmark Results
- Page 584 and 585: .*._---*-----*-------**-------....
- Page 586 and 587: ;Latest Revision - September 30, 19
- Page 588 and 589: All coefficients are divided by 2:w
- Page 590 and 591: Real input FFT based on Glenn Bergl
- Page 592 and 593: countountcountcountorg y:coefset 0d
- Page 594 and 595: ; Real-Valued FFT for MOTOROLA DSP5
- Page 596 and 597: ; first group in the last passmove
- Page 599 and 600: A Accumulator ....... ' ...........
- Page 601 and 602: -H- fast ..........................
- Page 603 and 604: PGND ..............................
- Page 605 and 606: DSP56K FAMILY INTRODUCTIONDSP56K CE
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