section 7 - Index of
section 7 - Index of section 7 - Index of
ILLEGALRTINOP23 16 15 87 0I 0 0 0 0 0 0 0 o I 0 0 0 0 0 0 0 01 0 0 0 0 0 1 0 123 16 15 87 0I 0 0 0 0 0 0 0 o I 0 0 0 0 0 0 0 o I 0 0 0 0 0 1 0 o I23 16 15 87 0I 0 0 0 0 0 0 0 o I 0 0 0 0 0 0 0 01 0 0 0 0 0 0 0 o IA.10.4 Parallel Instruction Encoding of the Operation CodeThe operation code encoding for the instructions which allow parallel moves is dividedinto the multiply and non multiply instruction encodings shown in the following subsection.Multiply Instruction EncodingThe a-bit operation code for multiply instructions allowing parallel moves has differentfields than the nonmultiply instruction's operation code.The a-bit operation code=1 aaa dkkk whereQQQ=selects the inputs to the multiplierkkk = three unencoded bits k2, k1, kOd = destination accumulatord=O-+Ad=1-+BTable A-27 Operation Code KO-2 DecodeCode k2 k1 kO-0 positive mpyonly don't round1 negative mpy and ace round
Table A-28 Operation Code QQQ DecodeMACR 851 ,52,0MACR 52,51,0Q Q Q S1 S20 0 0 xo xo0 0 1 YO YO0 1 0 X1 xo0 1 1 Y1 YO1 0 0 XO Y11 0 1 YO XO1 1 0 X1 YO1 1 1 Y1 X1NOTE: S1 and S2 are the inputs to the multiplier.23 87 43 0MAC B 51,82,0MAC 52,51,0DATA BUS MOVE FIELD23 87 43 0MPYR B 51,52,0MPYR 52,81,0DATA BUS MOVE FIELD23 87 43 0DATA BUS MOVE FIELDMPY () 51,52,0MPY () 82,51,023 87 43 0DATA BUS MOVE FIELD-
- Page 519 and 520: SUBL Shift Left and Subtract Accumu
- Page 521 and 522: SUBR Shift Right and Subtract Accum
- Page 523 and 524: SWISoftware InterruptSWICondition C
- Page 525 and 526: Tee Transfer Conditionally Teetion
- Page 527 and 528: Tee Transfer Conditionally TeeInstr
- Page 529 and 530: TFR Transfer Data ALU Register TFRC
- Page 531 and 532: TSTTest AccumulatorTSTInstruction F
- Page 533 and 534: WAIT Wait for Interrupt WAITConditi
- Page 535 and 536: including the number of words per i
- Page 537 and 538: 5. Compute final results.Thus, base
- Page 539 and 540: JLC (R2+N2)will requireand will exe
- Page 541 and 542: Table A-6 Instruction Timing Summar
- Page 543 and 544: Note that the "ap" term in Table A-
- Page 545 and 546: Table A-14 Memory Access Timing Sum
- Page 547 and 548: Other RestrictionsDO SSH,xxxxJSR to
- Page 549 and 550: Immediately before MOVEC from SSH o
- Page 551 and 552: A.9.S REP RestrictionsThe REP instr
- Page 553 and 554: Table A-18 Triple-Bit Register Enco
- Page 555 and 556: Table A-24 Program Control Unit Reg
- Page 557 and 558: R: Register to Register Parallel Da
- Page 559 and 560: JSSETJSSET#n,X:pp,XXXX#n,Y:pp,xxxx2
- Page 561 and 562: JSSET#n,S,xxxx23 16 15 87 000001011
- Page 563 and 564: BCHGBCHG#n,X:aa#n,Y:aa23 16 15 87 0
- Page 565 and 566: MOVE(M)MOVE(M)S,P:aaP:aa,DREP #XXXR
- Page 567 and 568: LUAea,O23 16 15 87 0I 0 0 0 0 0 1 0
- Page 569: ENDDO23 16 15 87 00 0 0 0 0 0 0 o 1
- Page 573 and 574: Table A-30 Special Case #10 P E R C
- Page 575 and 576: NEGD23 87 43 0DATA BUS MOVE FIELDLS
- Page 577: ADDRS,D23 87 43 oDATA BUS MOVE FIEL
- Page 580 and 581: lEI
- Page 582 and 583: Table 8-1 27-MHz Benchmark Results
- Page 584 and 585: .*._---*-----*-------**-------....
- Page 586 and 587: ;Latest Revision - September 30, 19
- Page 588 and 589: All coefficients are divided by 2:w
- Page 590 and 591: Real input FFT based on Glenn Bergl
- Page 592 and 593: countountcountcountorg y:coefset 0d
- Page 594 and 595: ; Real-Valued FFT for MOTOROLA DSP5
- Page 596 and 597: ; first group in the last passmove
- Page 599 and 600: A Accumulator ....... ' ...........
- Page 601 and 602: -H- fast ..........................
- Page 603 and 604: PGND ..............................
- Page 605 and 606: DSP56K FAMILY INTRODUCTIONDSP56K CE
Table A-28 Operation Code QQQ DecodeMACR 851 ,52,0MACR 52,51,0Q Q Q S1 S20 0 0 xo xo0 0 1 YO YO0 1 0 X1 xo0 1 1 Y1 YO1 0 0 XO Y11 0 1 YO XO1 1 0 X1 YO1 1 1 Y1 X1NOTE: S1 and S2 are the inputs to the multiplier.23 87 43 0MAC B 51,82,0MAC 52,51,0DATA BUS MOVE FIELD23 87 43 0MPYR B 51,52,0MPYR 52,81,0DATA BUS MOVE FIELD23 87 43 0DATA BUS MOVE FIELDMPY () 51,52,0MPY () 82,51,023 87 43 0DATA BUS MOVE FIELD-
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