section 7 - Index of

SUBL Shift Left and Subtract Accumulators SUBLCondition Codes:I LF I OM I T I·· I S1 I SO I 1115 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0I 10 I s I L I E I u I N I z~ MR ~~ CCRS_- Computed according to the definition in A.5 CONDITION CODE COMPUTATIONL - Set if limiting (parallel move) or overflow has occurred in resultE - Set if the signed integer portion of A or B result is in useU - Set if A or B result is unnormalizedN - Set if bit 55 of A or B result is setZ - Set if A or B result equals zeroV - Set if overflow has occurred in A or B result or if the MS bit of the destinationoperand is changed as a result of the instruction's left shiftC - Set if a carry (or borrow) occurs from bit 55 of A or B resultNote: The definitions of the E and U bits vary according to the scaling mode being used.Refer to Section A.5 CONDITION CODE COMPUTATION for complete details.Instruction Format:SUBL S,DOpcode:23 8 7 4 3DATA BUS MOVE FIELD I 0 0 o 1 I dooOPTIONAL EFFECTIVE ADDRESS EXTENSIONInstruction Fields:S,D dB,A 0A,BTiming: 2+mv oscillator clock cyclesMemory: 1 +mv program words