section 7 - Index of

section 7 - Index of section 7 - Index of

11.07.2015 Views

ROR Rotate Right ROROperation: c:c~ .....I-----·-b47 24(parallelmove)Assembler Syntax:ROR D (parallel move)Description: Rotate bits 47-24 of the destination operand D one bit to the right andstore the result in the destination accumulator. Prior to instruction execution, bit 24 of Dis shifted into the carry bit C, and, prior to instruction execution, the value in the carry bitC is shifted into bit 47 of the destination accumulator D. This instruction is a 24-bit operation.The remaining bits of the destination operand D are not affected.Example:ROR B1 #$1234,R2;rotate B1 right one bit, update R2B ~I __Before Execution$0_0:_00_00_0_1:2_~_2_~_~SR 1 ....._____$_03_00_---'After ExecutionB ~I __ $_O_o:o_o_oo_oo_:~_~_~ __-,-,SRI ....._____$0_3_05_~Explanation of Example: Prior to execution, the 56-bit B accumulator contains thevalue $00:000001 :222222. The execution of the ROR B instruction shifts the 24-bit valuein the B1 register one bit to the right, shifting bit 24 into the carry bit C, rotating the carrybit C into bit 47, and storing the result back in the B1 register.

ROR Rotate Right RORCondition Codes:I LF I OM I T I ** I 81 I 80 I 11 10 Is I L E I U N Z15 14 13 12 11 10 9 8 7 6 5 4 3 2 o.. MR --".*'-~!---- CCRS -L -N -Z -V -C -Computed according to the definition in A.S CONDITION CODE COMPUTATIONSet if data limiting has occurred during parallel moveSet if bit 47 of A or B result is setSet if bits 47-24 of A or B result are zeroAlways clearedSet if bit 24 of A or B was set prior to instruction execution.Instruction Format:ROR DOpcode:23 8 7DATA BUS MOVE FIELD 1 0 0OPTIONAL EFFECTIVE ADDRESS EXTENSION4 3o IdoInstruction Fields:o dA 0BTiming: 2+mv oscillator clock cyclesMemory: 1 +mv program words

ROR Rotate Right ROROperation: c:c~ .....I-----·-b47 24(parallelmove)Assembler Syntax:ROR D (parallel move)Description: Rotate bits 47-24 <strong>of</strong> the destination operand D one bit to the right andstore the result in the destination accumulator. Prior to instruction execution, bit 24 <strong>of</strong> Dis shifted into the carry bit C, and, prior to instruction execution, the value in the carry bitC is shifted into bit 47 <strong>of</strong> the destination accumulator D. This instruction is a 24-bit operation.The remaining bits <strong>of</strong> the destination operand D are not affected.Example:ROR B1 #$1234,R2;rotate B1 right one bit, update R2B ~I __Before Execution$0_0:_00_00_0_1:2_~_2_~_~SR 1 ....._____$_03_00_---'After ExecutionB ~I __ $_O_o:o_o_oo_oo_:~_~_~ __-,-,SRI ....._____$0_3_05_~Explanation <strong>of</strong> Example: Prior to execution, the 56-bit B accumulator contains thevalue $00:000001 :222222. The execution <strong>of</strong> the ROR B instruction shifts the 24-bit valuein the B1 register one bit to the right, shifting bit 24 into the carry bit C, rotating the carrybit C into bit 47, and storing the result back in the B1 register.

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