section 7 - Index of
section 7 - Index of section 7 - Index of
RESETReset On-Chip Peripheral DevicesRESETOperation:Reset the interrupt priority registerand all on-chip, peripheralsAssembler Syntax:RESETDescription: Reset the interrupt priority register and all on-chip peripherals. This is asoftware reset which is NOT equivalent to a hardware reset since only on-chip peripheralsand the interrupt structure are affected. The processor state is not affected, and executioncontinues with the next instruction. All interrupt sources are disabl,ed except forthe trace, stack error, NMI, illegal instruction, and hardware reset interrupts.Restrictions: A RESET instruction cannot be the last instruction in a DO loop (at LA).Example:RESET;reset all on-chip peripherals and IPRExplanation of Example: The execution of the RESET instruction resets all on-chipperipherals and the interrupt priority register (IPR).Condition Codes:I: I DM I T 1** JR 81 I 80 I 11 I :1.8 I liE I u 1 N15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0The condition codes are not affected by this instructionI z I v I ~I
RESETReset On-Chip Peripheral DevicesRESETInstruction Format:RESETOpcode:23 16 15 8 7la a a a a a a ala a a a a a a al1aa a a a 1 a alInstruction Fields:NoneTiming: 4 oscillator clock cyclesMemory: 1 program word
- Page 445 and 446: X: Y: xv Memory Data Move X: Y:S1 D
- Page 447 and 448: MOVEC Move Control Register MOVECst
- Page 449 and 450: MOVEC Move Control Register MOVECCo
- Page 451 and 452: MOVECMove Control RegisterMOVECInst
- Page 453 and 454: MOVEC Move Control Register MOVECTi
- Page 455 and 456: MOVEM Move Program Memory MOVEMoper
- Page 457 and 458: MOVEM Move Program Memory MOVEMInst
- Page 459 and 460: MOVEMMove Program MemoryMOVEMInstru
- Page 461 and 462: MOVEP Move Peripheral Data MOVEPist
- Page 463 and 464: MOVEP Move Peripheral Data MOVEPCon
- Page 465 and 466: MOVEP Move Peripheral Data MOVEPIns
- Page 467 and 468: MOVEP Move Peripheral Data MOVEPIns
- Page 469 and 470: MPY Signed Multiply MPYExplanation
- Page 471 and 472: MPY Signed Multiply MPYInstruction
- Page 473 and 474: MPYR Signed Multiply and Round MPYR
- Page 475 and 476: MPYR Signed Multiply and Round MPYR
- Page 477 and 478: NEGNegate AccumulatorNEGInstruction
- Page 479 and 480: NOPNo OperationNOPInstruction Forma
- Page 481 and 482: NORM Normalize Accumulator Iteratio
- Page 483 and 484: NOTLogical ComplementNOTInstruction
- Page 485 and 486: ORLogical Inclusive ORORInstruction
- Page 487 and 488: ORI OR Immediate with Control Regis
- Page 489 and 490: REP Repeat Next Instruction REPRest
- Page 491 and 492: REPRepeat Next InstructionREPInstru
- Page 493 and 494: REPRepeat Next InstructionREPInstru
- Page 495: REP Repeat Next Instruction REPNote
- Page 499 and 500: RND Round Accumulator RNDConvergent
- Page 501 and 502: RNDRound AccumulatorRNDInstruction
- Page 503 and 504: ROL Rotate Left ROLCondition Codes:
- Page 505 and 506: ROR Rotate Right RORCondition Codes
- Page 507 and 508: RTIReturn from InterruptRTIConditio
- Page 509 and 510: RTSReturn from SubroutineRTSInstruc
- Page 511 and 512: sec Subtract Long with Carry secExp
- Page 513 and 514: secSubtract Long with CarrysecInstr
- Page 515 and 516: STOPStop Instruction ProcessingSTOP
- Page 517 and 518: SUB Subtract SUBCondition Codes:S -
- Page 519 and 520: SUBL Shift Left and Subtract Accumu
- Page 521 and 522: SUBR Shift Right and Subtract Accum
- Page 523 and 524: SWISoftware InterruptSWICondition C
- Page 525 and 526: Tee Transfer Conditionally Teetion
- Page 527 and 528: Tee Transfer Conditionally TeeInstr
- Page 529 and 530: TFR Transfer Data ALU Register TFRC
- Page 531 and 532: TSTTest AccumulatorTSTInstruction F
- Page 533 and 534: WAIT Wait for Interrupt WAITConditi
- Page 535 and 536: including the number of words per i
- Page 537 and 538: 5. Compute final results.Thus, base
- Page 539 and 540: JLC (R2+N2)will requireand will exe
- Page 541 and 542: Table A-6 Instruction Timing Summar
- Page 543 and 544: Note that the "ap" term in Table A-
- Page 545 and 546: Table A-14 Memory Access Timing Sum
RESETReset On-Chip Peripheral DevicesRESETOperation:Reset the interrupt priority registerand all on-chip, peripheralsAssembler Syntax:RESETDescription: Reset the interrupt priority register and all on-chip peripherals. This is as<strong>of</strong>tware reset which is NOT equivalent to a hardware reset since only on-chip peripheralsand the interrupt structure are affected. The processor state is not affected, and executioncontinues with the next instruction. All interrupt sources are disabl,ed except forthe trace, stack error, NMI, illegal instruction, and hardware reset interrupts.Restrictions: A RESET instruction cannot be the last instruction in a DO loop (at LA).Example:RESET;reset all on-chip peripherals and IPRExplanation <strong>of</strong> Example: The execution <strong>of</strong> the RESET instruction resets all on-chipperipherals and the interrupt priority register (IPR).Condition Codes:I: I DM I T 1** JR 81 I 80 I 11 I :1.8 I liE I u 1 N15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0The condition codes are not affected by this instructionI z I v I ~I