section 7 - Index of

section 7 - Index of section 7 - Index of

11.07.2015 Views

REP Repeat Next Instruction REPExplanation of Example: Prior to execution, the 24-bit XO register contains the value$000100, and the 16-bit loop counter (LC) register contains the value $0000. The executionof the REP XO instruction takes the 24-bit value in the XO register, truncates the MS8 bits, and stores the 16 LS bits in the 16-bit loop counter (LC) register. Thus, the singlewordMAC instruction immediately following the REP instruction is repeated $100 times.Condition Codes:15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0I LF I OM 1 T 1** 1 S1 1 so 1 11 1 10 I S 1 L 1 E 1 U N 1 z~ MR ~ ~ . CCRFor source operand A or B:S - Computed according to the definition. See Notes on page A-255.L - Set if data limiting occurred. See Notes on page A-255.For other source operands:The condition code bits are not affected.v 1 ~I

REPRepeat Next InstructionREPInstruction Format:REP X:eaREP Y:eaOpcode:2310 0 0 0 0 1 116 15 8 7o I 0 1 M M M R R Rioos 1 0 0 0 0 01Instruction Fields:ea=6-bit Effective Address=MMMRRR,EffectiveAddressing Mode(Rn)-Nn(Rn)+Nn(Rn)-(Rn)+(Rn)(Rn+Nn)-(Rn)MMMRRRo 0 0 r r0 1 r1 0 r ro 1 1 r r1 0 0 r r101rrr1 1 1 r r rMemory Space sX Memory 0Y Memory 1where "rrr" refers to an address register RO-R7Timing: 4+mv oscillator clock cyclesMemory: 1 program word-

REPRepeat Next InstructionREPInstruction Format:REP X:eaREP Y:eaOpcode:2310 0 0 0 0 1 116 15 8 7o I 0 1 M M M R R Rioos 1 0 0 0 0 01Instruction Fields:ea=6-bit Effective Address=MMMRRR,EffectiveAddressing Mode(Rn)-Nn(Rn)+Nn(Rn)-(Rn)+(Rn)(Rn+Nn)-(Rn)MMMRRRo 0 0 r r0 1 r1 0 r ro 1 1 r r1 0 0 r r101rrr1 1 1 r r rMemory Space sX Memory 0Y Memory 1where "rrr" refers to an address register RO-R7Timing: 4+mv oscillator clock cyclesMemory: 1 program word-

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