section 7 - Index of

NORM Normalize Accumulator Iteration NORMOperation:If E. U • Z=1, then ASL 0 and Rn-1~Rnelse if E=1, then ASR 0 and Rn+ 1 ~Rnelse NOPwhere E denotes the logical complement of E, andwhere • denotes the logical AND operatorAssembler Syntax:NORM Rn,ODescription: Perform one normalization iteration on the specified destination operand 0,update the specified address register Rn based upon the results of that iteration, andstore the result back in the destination accumulator. This is a 56-bit operation. If theaccumulator extension is not in use, the accumulator is un normalized, and the accumulatoris not zero, the destination operand is arithmetically shifted one bit to the left, and thespecified address register is decremented by 1. If the accumulator extension register isin use, the destination operand is arithmetically shifted one bit to the right, and the specifiedaddress register is incremented by 1. If the accumulator is normalized or zero, aNOP is executed and the specified address register is not affected. Since the operationof the NORM instruction depends on the E, U, and Z condition code register bits, thesebits must correctly reflect the current state of the destination accumulator prior to executingthe NORM instruction. Note that the L and V bits in the condition code register will becleared unless they have been improperly set up prior to executing the NORM instruction.Example:REP #$2FNORM R3,A;maximum number of iterations needed;perform 1 normalization iterationBefore ExecutionA 1,-_$_0_0:0_0_00_00_:0_00_00_1_--,R31~ _____ $0_O_OO_~After ExecutionAI~ ____ $_00_:4_00_0_00_:0_00_oo_0_~R31~ ______ $_FF_D_2 __ ~Explanation of Example: Prior to execution, the 56-bit A accumulator contains thevalue $00:000000:000001, and the 16-bit R3 address register contains the value $0000.The repetition of the NORM R3,A instruction normalizes the value in the 56-bit accumulatorand stores the resulting number of shifts performed during that normalization pro-