section 7 - Index of
section 7 - Index of section 7 - Index of
MOVEM Move Program Memory MOVEMExample:MOVEM P:(R5+N5), LC:move P :(R5+N5) into the loop counter (LC)Before ExecutionAfter ExecutionP:(R5 + N5) L-I ___ $_00_0_11_6 __----' P:(R5 + N5) 1 ......___$_00_0_116 ___--'~I ......____$O_OO_O ___ ~LC I$0116~-----------~Explanation of Example: Prior to execution, the 16-bit loop counter (LC) register containsthe value $0000, and the 24-bit program (P) memory location P:(R5+N5) containsthe value $000116. The execution of the MOVEM P:(R5+N5), LC instruction moves the16 LS bits of the 24-bit program (P) memory location P:(R5+N5) into the 16-bit LC register.Condition Codes:I LF I DM I T I ** I 81 I 80 I 11I 10 I s I L I E I u15 14 13 12 11 10 9 8 7 6 5 4.... MR ~ lilli( CCR3 2N I z°For D=SR operand:S - Set according to bit 7 of the source operandL.- Set according to bit 6 of the source operandE - Set according to bit 5 of the source operandU - Set according to bit 4 of the source operandN - Set according to bit 3 of the source operandZ - Set according to bit 2 of the source operandV - Set according to bit 1 of the source operandC - Set according to bit 0 of the source operand-For D*SR operand:S - Computed according to the definition in A.5 CONDITION CODE COMPUTATIONL - Set if data limiting has occurred during the move
MOVEM Move Program Memory MOVEMInstruction Format:MOVE(M) S,P:eaMOVE(M) P:ea,DOpcode:23000001116 15 8 7 01 Iw 1 M M M R R RI1 0 d d d d d dInstruction Fields:ea=6-bit Effective Address=MMMRRROPTIONAL EFFECTIVE ADDRESS EXTENSIONEffectiveRegisterW Addressing Mode M M M R R RReadS 0 (Rn)-Nn 0 o 0 r rWrite 0 1 (Rn)+Nn 0 0 1 r r(Rn)- 0 1 0 r r(Rn)+ 0 1 1 r r(Rn) 1 o 0 r r(Rn+Nn) 1 0 1 r r r-(Rn) 1 1 1 r r rAbsolute address 1 1 0 0 0 0where "rrr" refers to an address register RO-R7-
- Page 405 and 406: I Immediate Short Data Move IExampl
- Page 407 and 408: I Immediate Short Data Move IDDD d
- Page 409 and 410: R Register to Register Data Move RE
- Page 411 and 412: R Register to Register Data Move RI
- Page 413 and 414: uAddress Register UpdateuInstructio
- Page 415 and 416: X: X Memory Data Move X:Note:Due to
- Page 417 and 418: X: X Memory Data Move X:S D DS,D d
- Page 419 and 420: X: X Memory Data Move X:S D DS,D d
- Page 421 and 422: X:R X Memory and Register Data Move
- Page 423 and 424: X:R X Memory and Register Data Move
- Page 425 and 426: X:R X Memory and Register Data Move
- Page 427 and 428: Y: Y Memory Data Move Y:Note: This
- Page 429 and 430: Y: Y Memory Data Move Y:S D DS,D d
- Page 431 and 432: Y: Y Memory Data Move Y:S D DS,D d
- Page 433 and 434: R:V Register and V Memory Data Move
- Page 435 and 436: R:V Register and Y Memory Data Move
- Page 437 and 438: R:V Register and Y Memory Data Move
- Page 439 and 440: L: Long Memory Data Move L:Example:
- Page 441 and 442: L: Long Memory Data Move L:Instruct
- Page 443 and 444: X: Y: xv Memory Data Move X: Y:Exam
- Page 445 and 446: X: Y: xv Memory Data Move X: Y:S1 D
- Page 447 and 448: MOVEC Move Control Register MOVECst
- Page 449 and 450: MOVEC Move Control Register MOVECCo
- Page 451 and 452: MOVECMove Control RegisterMOVECInst
- Page 453 and 454: MOVEC Move Control Register MOVECTi
- Page 455: MOVEM Move Program Memory MOVEMoper
- Page 459 and 460: MOVEMMove Program MemoryMOVEMInstru
- Page 461 and 462: MOVEP Move Peripheral Data MOVEPist
- Page 463 and 464: MOVEP Move Peripheral Data MOVEPCon
- Page 465 and 466: MOVEP Move Peripheral Data MOVEPIns
- Page 467 and 468: MOVEP Move Peripheral Data MOVEPIns
- Page 469 and 470: MPY Signed Multiply MPYExplanation
- Page 471 and 472: MPY Signed Multiply MPYInstruction
- Page 473 and 474: MPYR Signed Multiply and Round MPYR
- Page 475 and 476: MPYR Signed Multiply and Round MPYR
- Page 477 and 478: NEGNegate AccumulatorNEGInstruction
- Page 479 and 480: NOPNo OperationNOPInstruction Forma
- Page 481 and 482: NORM Normalize Accumulator Iteratio
- Page 483 and 484: NOTLogical ComplementNOTInstruction
- Page 485 and 486: ORLogical Inclusive ORORInstruction
- Page 487 and 488: ORI OR Immediate with Control Regis
- Page 489 and 490: REP Repeat Next Instruction REPRest
- Page 491 and 492: REPRepeat Next InstructionREPInstru
- Page 493 and 494: REPRepeat Next InstructionREPInstru
- Page 495 and 496: REP Repeat Next Instruction REPNote
- Page 497 and 498: RESETReset On-Chip Peripheral Devic
- Page 499 and 500: RND Round Accumulator RNDConvergent
- Page 501 and 502: RNDRound AccumulatorRNDInstruction
- Page 503 and 504: ROL Rotate Left ROLCondition Codes:
- Page 505 and 506: ROR Rotate Right RORCondition Codes
MOVEM Move Program Memory MOVEMInstruction Format:MOVE(M) S,P:eaMOVE(M) P:ea,DOpcode:23000001116 15 8 7 01 Iw 1 M M M R R RI1 0 d d d d d dInstruction Fields:ea=6-bit Effective Address=MMMRRROPTIONAL EFFECTIVE ADDRESS EXTENSIONEffectiveRegisterW Addressing Mode M M M R R RReadS 0 (Rn)-Nn 0 o 0 r rWrite 0 1 (Rn)+Nn 0 0 1 r r(Rn)- 0 1 0 r r(Rn)+ 0 1 1 r r(Rn) 1 o 0 r r(Rn+Nn) 1 0 1 r r r-(Rn) 1 1 1 r r rAbsolute address 1 1 0 0 0 0where "rrr" refers to an address register RO-R7-
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