section 7 - Index of

section 7 - Index of section 7 - Index of

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MOVEC Move Control Register MOVECOperation:Assembler Syntax:X:ea-401 MOVE(C) X:ea,01X:aa-401 MOVE(C) X:aa,01S1-4X:ea MOVE(C) 81,X:ea81-4X:aa MOVE(C) 81,X:aaY:ea-401 MOVE(C) Y:ea,01Y:aa-401 MOVE(C) Y:aa,01S1-4Y:ea MOVE(C) 81,Y:ea81-4Y:aa MOVE(C) 81,Y:aa81-402 MOVE(C) 81,0282-401 MOVE(C) 82,01#xxxx-401 MOVE(C) #xxxx,01#xx-401 MOVE(C) #xx,01Description: Move the contents of the specified source control register 81 or 82 to thespecified destination or move the specified source to the specified destination controlregister 01 or 02. The control registers 81 and 01 are a subset of the S2 and 02 registerset and consist of the address ALU modifier registers and the program controller registers.These registers may be moved to or from any other register or memory space. AImemory addressing modes, as well as an immediate short addressing mode, may beused.If the system stack register 88H is specified as a source operand, the system stackpointer (8P) is postdecremented by 1 after 88H has been read. If the system stack register88H is specified as a destination operand, the system stack pOinter (SP) is preincrementedby 1 before 88H is written. This allows the system stack to be efficientlyextended using software stack pointer operations.When a 56-bit accumulator (A or B) is specified as a source operand, the accumulatorvalue is optionally shifted according to the scaling mode bits 80 and S1 in the system

MOVEC Move Control Register MOVECstatus register (SR). If the data out of the shifter indicates that the accumulator extensionregister is in use, and the data is to be moved into a 24-bit destination, the value stored inthe destination is limited to a maximum positive or negative saturation constant to minimizetruncation error. If the data is to be moved into a 16-bit destination and the accumulatorextension register is in use, the value is limited to a maximum positive or negativesaturation constant whose LS 16 bits are then stored in the 16-bit destination register.Limiting does not occur if an individual 24-bit accumulator register (A 1, AD, 81, or 80) isspecified as a source operand instead of the full 56-bit accumulator (A or 8). This limitingfeature allows block floating-point operations to be performed with error detection sincethe L bit in the condition code register is latched.When a 56-bit accumulator (A or 8) is specified as a destination operand, any 24-bitsource data to be moved into that accumulator is automatically extended to 56 bits bysign extending the MS bit of the source operand (bit 23) and appending the source operandwith 24 LS zeros. Whenever a 16-bit source operand is to be moved into a 24-bitdestination, the 16-bit value is stored in the LS 16 bits of the 24-bit destination, and theMS 8 bits of that destination are zeroed. Similarly, whenever a 16-bit source operand isto be moved into a 56-bit accumulator, the 16-bit value is moved into the LS 16 bits of theMSP portion of the accumulator (A1 or 81), the MS 8 bits of the MSP portion of thataccumulator are zeroed, and the resulting 24-bit value is extended to 56 bits by signextending the MS bit and appending the result with 24 LS zeros. Note that for 24-bitsource operands both the automatic sign-extension and zeroing features may be disabledby specifying the destination register to be one of the individual 24-bit accumulatorregisters (A 1 or 81 ).Note: Due to instruction pipelining, if an AGU register (Mn, Nn, or Rn) is directly changedwith this instruction, the new contents may not be available for use until the second followinginstruction. See the restrictions discussed in A.9.6 - R, N, and M Register Restrictionson page A-31 O.Restrictions: The following restrictions represent very unusual operations which probablywould never be used but are listed only for completeness.-A MOVEC instruction used within a DO loop which specifies SSH as the source operandor LA, LC, SR, SP, SSH, or SSL as the destination operand cannot begin at theaddress LA - 2, LA - 1, or LA within that DO loop.

MOVEC Move Control Register MOVECstatus register (SR). If the data out <strong>of</strong> the shifter indicates that the accumulator extensionregister is in use, and the data is to be moved into a 24-bit destination, the value stored inthe destination is limited to a maximum positive or negative saturation constant to minimizetruncation error. If the data is to be moved into a 16-bit destination and the accumulatorextension register is in use, the value is limited to a maximum positive or negativesaturation constant whose LS 16 bits are then stored in the 16-bit destination register.Limiting does not occur if an individual 24-bit accumulator register (A 1, AD, 81, or 80) isspecified as a source operand instead <strong>of</strong> the full 56-bit accumulator (A or 8). This limitingfeature allows block floating-point operations to be performed with error detection sincethe L bit in the condition code register is latched.When a 56-bit accumulator (A or 8) is specified as a destination operand, any 24-bitsource data to be moved into that accumulator is automatically extended to 56 bits bysign extending the MS bit <strong>of</strong> the source operand (bit 23) and appending the source operandwith 24 LS zeros. Whenever a 16-bit source operand is to be moved into a 24-bitdestination, the 16-bit value is stored in the LS 16 bits <strong>of</strong> the 24-bit destination, and theMS 8 bits <strong>of</strong> that destination are zeroed. Similarly, whenever a 16-bit source operand isto be moved into a 56-bit accumulator, the 16-bit value is moved into the LS 16 bits <strong>of</strong> theMSP portion <strong>of</strong> the accumulator (A1 or 81), the MS 8 bits <strong>of</strong> the MSP portion <strong>of</strong> thataccumulator are zeroed, and the resulting 24-bit value is extended to 56 bits by signextending the MS bit and appending the result with 24 LS zeros. Note that for 24-bitsource operands both the automatic sign-extension and zeroing features may be disabledby specifying the destination register to be one <strong>of</strong> the individual 24-bit accumulatorregisters (A 1 or 81 ).Note: Due to instruction pipelining, if an AGU register (Mn, Nn, or Rn) is directly changedwith this instruction, the new contents may not be available for use until the second followinginstruction. See the restrictions discussed in A.9.6 - R, N, and M Register Restrictionson page A-31 O.Restrictions: The following restrictions represent very unusual operations which probablywould never be used but are listed only for completeness.-A MOVEC instruction used within a DO loop which specifies SSH as the source operandor LA, LC, SR, SP, SSH, or SSL as the destination operand cannot begin at theaddress LA - 2, LA - 1, or LA within that DO loop.

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