section 7 - Index of

section 7 - Index of section 7 - Index of

11.07.2015 Views

X:RX Memory and Register Data MoveX:ROperation:Class I( ..... ); X:ea ..... 01; 82 ..... 02( ..... ); 81 ..... X:ea; 82 ..... 02( ..... ); #xxxxxx ..... 01; 82 ..... 02Assembler Syntax:Class I( ..... ) X:ea,01 52,02( ..... ) S1 ,X:ea S2,02( ..... ) #xxxxxx,01 S2,02Class II( ..... ); A ..... X:ea; XO ..... A( ..... ); B ..... X:ea; XO ..... BClass II( ..... ) A,X:ea( ..... ) B,X:eaXO,AXO,Bwhere ( ..... ) refers to any arithmetic or logical instruction which allows parallel moves.Description: Class I: Move a one-word operand from/to X memory and move anotherword operand from an accumulator (S2) to an input register (02). All memory addressingmodes, including absolute addressing and 24-bit immediate data, may be used. The registerto register move (82,02) allows a data ALU accumulator to be moved to a data ALUinput register for use as a data ALU operand in the following instruction.Class II: Move one-word operand from a data ALU accumulator to X memory and onewordoperand from data ALU register XO to a data ALU accumulator. One effectiveaddress is specified. All memory addressing modes, excluding long absolute addressingand long immediate data, may be used.For both Class I and Class II X:R parallel data moves, if the arithmetic or logical opcodeoperandportion of the instruction specifies a given destination accumulator, that sameaccumulator or portion of that accumulator may not be specified as a destination 01 inthe parallel data bus move operation. Thus, if the opcode-operand portion of the instructionspecifies the 56-bit A accumulator as its destination, the parallel data bus move portionof the instruction may not specify AO, A1, A2, or A as its destination 01. Similarly, ifthe opcode-operand portion of the instruction specifies the 56-bit Baccumulator as itsdestination, the parallel data bus move portion of the instruction may not specify BO, B1,B2, or B as its destination 01. That is, duplicate destinations are NOT allowed withinthe same Instruction.

X:R X Memory and Register Data Move X:RIf the opcode-operand portion of the instruction specifies a given source or destinationregister, that same register or portion of that register may be used as a source 81 and/or82 in the parallel data bus move operation. This allows data to be moved in the sameinstruction in which it is being used as a source operand by a data ALU operation. Thatis, duplicate sources are allowed within the same instruction. Note that 81 and 82may specify the same register.Class I Example:CMPM VO,A A,X:$1234 A,VO;compare A,VO mag., save A, update VOBefore ExecutionA 1~ _____ $0_0:_80_00_0_0:0_0_00_00 __ ~After ExecutionA 1~ _____ $0_0_:80_0_00_0:_00_00_0_0~X:$1234I$000000 X:$12341~ __________ $7_FF_F_FF __.......J~--------------~yol~ ________ $_O_OO_OO_O __ ~YOI~ ________ $_7F_F_FF_F __.......JExplanation of the Class I Example: Prior to execution, the 56-bit A accumulator containsthe value $00:800000:000000, the 24-bit X memory location X:$1234 contains thevalue $000000, and the 24-bit VO register contains the value $000000. The execution ofthe parallel move portion of the instruction, A,X:$1234 A,VO, moves the 24-bit limitedpositive saturation constant $7FFFFF into both the X:$1234 memory location and the VOregister since the signed portion of the A accumulator was in use.-

X:R X Memory and Register Data Move X:RIf the opcode-operand portion <strong>of</strong> the instruction specifies a given source or destinationregister, that same register or portion <strong>of</strong> that register may be used as a source 81 and/or82 in the parallel data bus move operation. This allows data to be moved in the sameinstruction in which it is being used as a source operand by a data ALU operation. Thatis, duplicate sources are allowed within the same instruction. Note that 81 and 82may specify the same register.Class I Example:CMPM VO,A A,X:$1234 A,VO;compare A,VO mag., save A, update VOBefore ExecutionA 1~ _____ $0_0:_80_00_0_0:0_0_00_00 __ ~After ExecutionA 1~ _____ $0_0_:80_0_00_0:_00_00_0_0~X:$1234I$000000 X:$12341~ __________ $7_FF_F_FF __.......J~--------------~yol~ ________ $_O_OO_OO_O __ ~YOI~ ________ $_7F_F_FF_F __.......JExplanation <strong>of</strong> the Class I Example: Prior to execution, the 56-bit A accumulator containsthe value $00:800000:000000, the 24-bit X memory location X:$1234 contains thevalue $000000, and the 24-bit VO register contains the value $000000. The execution <strong>of</strong>the parallel move portion <strong>of</strong> the instruction, A,X:$1234 A,VO, moves the 24-bit limitedpositive saturation constant $7FFFFF into both the X:$1234 memory location and the VOregister since the signed portion <strong>of</strong> the A accumulator was in use.-

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