section 7 - Index of
section 7 - Index of section 7 - Index of
DO Start Hardware Loop DOInstruction Format:DO S, exprOpcode:23 20 19 16 15 8 7 0o 0 0 01 0 1 1 o 11 1 D DID D D DID 0 0 01 0 o 0 0ABSOLUTE ADDRESS EXTENSIONInstruction Fields:S=6-bit Source operand = 000000,expr=16-bit Absolute Address in 24-bit extension wordSSource D D D D D D S/L Source D D D D D DXO 0 0 0 1 0 0 no SR 1 1 1 0 0 1X1 0 0 0 1 0 1 no OMR 1 1 1 0 1 0YO 0 0 0 1 1 0 no SP* 1 1 1 0 1 1Y1 0 0 0 1 1 1 no SSL** 1 1 1 1 0 1AO 0 0 1 0 0 0 no LA 1 1 1 1 1 0BO 0 0 1 0 0 1 no LC 1 1 1 1 1 1A2 0 0 1 0 1 0 no RO-R7 0 1 0 r r rB2 0 0 1 1 0 0 no NO-N7 0 1 1 n n nA1 0 0 1 1 0 1 no MO-M7 1 0 0 m m mA 0 0 1 1 1 0 yes [see Notes on page A-97]B 0 0 1 1 1 1 yes [see Notes on page A-97]where rrr=Rn registerwhere nnn=Nn registerwhere mmm=Mn register-*For DO SP, expr The actual value that will be loaded into the loop counter (LC) isthe value of the stack pointer (SP) before the execution of theDO instruction, incremented by 1.Thus, if SP=3, the execution of the DO SP,expr instruction will load the loopcounter (LC) with the value LC=4.**For DO SSL, expr The loop counter (LC) will be loaded with its previous valuewhich was saved on the stack by the DO instruction itself.
DO Start Hardware Loop DONotes: If A or B is specified as the destination operand, the following sequence of eventstakes place:1. The S bit is computed according to its definition (See Section A.S)2. The accumulator value is scaled according to the scaling mode bits SOand S1 in the status register (SR).3. If the accumulator extension is in use, the output of the shifter is limitedto the maximum positive or negative saturation constant, and the L bit isset.4. The LS 16 bits of the resulting 24 bit value is loaded into the loopcounter (LC). The original contents of A or B are not changed.Timing: 6+mv oscillator clock cyclesMemory: 2 program words-
- Page 285 and 286: BCHGBit Test and ChangeBCHGInstruct
- Page 287 and 288: BCHG Bit Test and Change BCHGNotes:
- Page 289 and 290: BCLR Bit Test and Clear BCLRExplana
- Page 291 and 292: BClRBit Test and ClearBClRInstructi
- Page 293 and 294: BClRBit Test and ClearBClRInstructi
- Page 295 and 296: BClR Bit Test and Clear BClRNotes:
- Page 297 and 298: BSET Bit Test and Set BSETExplanati
- Page 299 and 300: BSETBit Test and SetBSETInstruction
- Page 301 and 302: BSETBit Test and SetBSETInstruction
- Page 303 and 304: BSET Bit Test and Set BSETNotes: If
- Page 305 and 306: BTSTBit TestBTSTCondition Codes:115
- Page 307 and 308: 8TSTBit Test8TSTInstruction Format:
- Page 309 and 310: 8TSTBit Test8TSTInstruction Format:
- Page 311 and 312: CLRClear AccumulatorCLRInstruction
- Page 313 and 314: CMP Compare CMPCondition Codes:15 1
- Page 315 and 316: CMPM Compare Magnitude CMPMConditio
- Page 317 and 318: DEBUGEnter Debug ModeDEBUGOpcode:23
- Page 319 and 320: DEBUGcc Enter Debug Mode Conditiona
- Page 321 and 322: DEC Decrement by One DECInstruction
- Page 323 and 324: DIV Divide Interation DIVThe DIV in
- Page 325 and 326: DIV Divide Interation DIVNote that
- Page 327 and 328: DIVInstruction Format:DIV S,DDivide
- Page 329 and 330: DO Start Hardware Loop DOexecuted 6
- Page 331 and 332: DOStart Hardware LoopDOAt LAOther R
- Page 333 and 334: DOStart Hardware LoopDOInstruction
- Page 335: DOStart Hardware LoopDOInstruction
- Page 339 and 340: ENDDO End Current DO Loop ENDDOExpl
- Page 341 and 342: EOR Logical Exclusive OR EORInstruc
- Page 343 and 344: ILLEGALIllegal Instruction Interrup
- Page 345 and 346: INC Increment by One INCInstruction
- Page 347 and 348: Jcc Jump Conditionally JccRestricti
- Page 349 and 350: JccJump ConditionallyJccEffectiveAd
- Page 351 and 352: JCLR Jump If Bit Clear JCLRRestrict
- Page 353 and 354: JCLRJump If Bit ClearJCLRInstructio
- Page 355 and 356: JCLR Jump If Bit Clear JCLRInstruct
- Page 357 and 358: JMPJumpJMPInstruction Fields:xxx=12
- Page 359 and 360: JSccJump to Subroutine Conditionall
- Page 361 and 362: JScc Jump to Subroutine Conditional
- Page 363 and 364: JSCLR Jump to Subroutine if Bit Cle
- Page 365 and 366: JSCLRJump to Subroutine If Bit Clea
- Page 367 and 368: JSCLRJump to Subroutine If Bit Clea
- Page 369 and 370: JSCLR Jump to Subroutine If Bit Cle
- Page 371 and 372: JSET Jump if Bit Set JSETRestrictio
- Page 373 and 374: JSETJump if Bit SetJSETInstruction
- Page 375 and 376: JSET Jump If Bit Set JSETInstructio
- Page 377 and 378: JSR Jump to Subroutine JSRInstructi
- Page 379 and 380: JSSET Jump to Subroutine if Bit Set
- Page 381 and 382: JSSETJump to Subroutine if Bit SetJ
- Page 383 and 384: JSSET Jump to Subroutine if Bit Set
- Page 385 and 386: LSL Logical Shift Left LSLCondition
DO Start Hardware Loop DONotes: If A or B is specified as the destination operand, the following sequence <strong>of</strong> eventstakes place:1. The S bit is computed according to its definition (See Section A.S)2. The accumulator value is scaled according to the scaling mode bits SOand S1 in the status register (SR).3. If the accumulator extension is in use, the output <strong>of</strong> the shifter is limitedto the maximum positive or negative saturation constant, and the L bit isset.4. The LS 16 bits <strong>of</strong> the resulting 24 bit value is loaded into the loopcounter (LC). The original contents <strong>of</strong> A or B are not changed.Timing: 6+mv oscillator clock cyclesMemory: 2 program words-
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