section 7 - Index of
section 7 - Index of section 7 - Index of
DOStart Hardware LoopDOExample:DO #cnt1, END1DO #cnt2, END2;begin outer DO loop;begin inner DO loopMOVE A,X:(RO)+END2ADD A,S X:(R1 )+,XOEND1;Iast instruction in inner loop;(in outer loop);Iast instruction in outer loop;first instruction after outer loopExplanation of Example: This example illustrates a nested DO loop. The outer DO loopwill be executed "cnt1" times while the inner DO loop will be executed ("cnt1" * "cnt2")times. Note that the labels END1 and END2 are located at the first instruction past the endof the DO loop, as mentioned above, and are nested properly.Condition Codes:15 14 13 12 11 10 9 8 7 6 5 4 3 2I LF I DM I T I ** I 81 I 80 I 11 I 10 I s I L E I u N I zCCRoFor source operand A or S:LF - Set when a DO loop is in progressS -L -Computed according to the definition. See Notes on page A-97.Set if data limiting occurred. See Notes on page A-97.For other source operands:-LF -Set when a DO loop is in progress
DOStart Hardware LoopDOInstruction Format:DO X:ea, exprDO Y:ea, exprOpcode:23 20 19 16 15 8 7o 0 0 010 1 1 o I 0 1oSO 010000ABSOLUTE ADDRESS EXTENSIONInstruction Fields:ea=6-bit Effective Address=MMMRRR,expr=16-bit Absolute Address in 24-bit extension wordEffectiveAddressing Mode MMMRRR Memory SpaceS(Rn)-Nn o 0 o r r r X Memory(Rn)+Nn 0 1 r r r Y Memory(Rn)-1 o r r r(Rn)+o 1 1 r r r(Rn)1 0 o r r r(Rn+Nn)1 0 1 r r r-(Rn)1 1 1 r r rwhere "rrr" refers to an address register RO-R?Timing: 6+mv oscillator clock cyclesMemory: 2 program words01-
- Page 281 and 282: BCHG Bit Test and Change BCHGExplan
- Page 283 and 284: BCHGBit Test and ChangeBCHGInstruct
- Page 285 and 286: BCHGBit Test and ChangeBCHGInstruct
- Page 287 and 288: BCHG Bit Test and Change BCHGNotes:
- Page 289 and 290: BCLR Bit Test and Clear BCLRExplana
- Page 291 and 292: BClRBit Test and ClearBClRInstructi
- Page 293 and 294: BClRBit Test and ClearBClRInstructi
- Page 295 and 296: BClR Bit Test and Clear BClRNotes:
- Page 297 and 298: BSET Bit Test and Set BSETExplanati
- Page 299 and 300: BSETBit Test and SetBSETInstruction
- Page 301 and 302: BSETBit Test and SetBSETInstruction
- Page 303 and 304: BSET Bit Test and Set BSETNotes: If
- Page 305 and 306: BTSTBit TestBTSTCondition Codes:115
- Page 307 and 308: 8TSTBit Test8TSTInstruction Format:
- Page 309 and 310: 8TSTBit Test8TSTInstruction Format:
- Page 311 and 312: CLRClear AccumulatorCLRInstruction
- Page 313 and 314: CMP Compare CMPCondition Codes:15 1
- Page 315 and 316: CMPM Compare Magnitude CMPMConditio
- Page 317 and 318: DEBUGEnter Debug ModeDEBUGOpcode:23
- Page 319 and 320: DEBUGcc Enter Debug Mode Conditiona
- Page 321 and 322: DEC Decrement by One DECInstruction
- Page 323 and 324: DIV Divide Interation DIVThe DIV in
- Page 325 and 326: DIV Divide Interation DIVNote that
- Page 327 and 328: DIVInstruction Format:DIV S,DDivide
- Page 329 and 330: DO Start Hardware Loop DOexecuted 6
- Page 331: DOStart Hardware LoopDOAt LAOther R
- Page 335 and 336: DOStart Hardware LoopDOInstruction
- Page 337 and 338: DO Start Hardware Loop DONotes: If
- Page 339 and 340: ENDDO End Current DO Loop ENDDOExpl
- Page 341 and 342: EOR Logical Exclusive OR EORInstruc
- Page 343 and 344: ILLEGALIllegal Instruction Interrup
- Page 345 and 346: INC Increment by One INCInstruction
- Page 347 and 348: Jcc Jump Conditionally JccRestricti
- Page 349 and 350: JccJump ConditionallyJccEffectiveAd
- Page 351 and 352: JCLR Jump If Bit Clear JCLRRestrict
- Page 353 and 354: JCLRJump If Bit ClearJCLRInstructio
- Page 355 and 356: JCLR Jump If Bit Clear JCLRInstruct
- Page 357 and 358: JMPJumpJMPInstruction Fields:xxx=12
- Page 359 and 360: JSccJump to Subroutine Conditionall
- Page 361 and 362: JScc Jump to Subroutine Conditional
- Page 363 and 364: JSCLR Jump to Subroutine if Bit Cle
- Page 365 and 366: JSCLRJump to Subroutine If Bit Clea
- Page 367 and 368: JSCLRJump to Subroutine If Bit Clea
- Page 369 and 370: JSCLR Jump to Subroutine If Bit Cle
- Page 371 and 372: JSET Jump if Bit Set JSETRestrictio
- Page 373 and 374: JSETJump if Bit SetJSETInstruction
- Page 375 and 376: JSET Jump If Bit Set JSETInstructio
- Page 377 and 378: JSR Jump to Subroutine JSRInstructi
- Page 379 and 380: JSSET Jump to Subroutine if Bit Set
- Page 381 and 382: JSSETJump to Subroutine if Bit SetJ
DOStart Hardware LoopDOInstruction Format:DO X:ea, exprDO Y:ea, exprOpcode:23 20 19 16 15 8 7o 0 0 010 1 1 o I 0 1oSO 010000ABSOLUTE ADDRESS EXTENSIONInstruction Fields:ea=6-bit Effective Address=MMMRRR,expr=16-bit Absolute Address in 24-bit extension wordEffectiveAddressing Mode MMMRRR Memory SpaceS(Rn)-Nn o 0 o r r r X Memory(Rn)+Nn 0 1 r r r Y Memory(Rn)-1 o r r r(Rn)+o 1 1 r r r(Rn)1 0 o r r r(Rn+Nn)1 0 1 r r r-(Rn)1 1 1 r r rwhere "rrr" refers to an address register RO-R?Timing: 6+mv oscillator clock cyclesMemory: 2 program words01-
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