section 7 - Index of

PABCIRCULARBUFFERPOINTERDSCKDSOFigure 10-9 OnCE PAB FIFO10.7.1 Program Data Bus Register (OPDBR)The OPDBR is a 24-bit latch that stores the value of the program data bus which was generatedby the last program memory access before the chip entered the debug mode.OPDBR can be read or written through the OnCE serial interface. It is affected by the operationsperformed during the debug mode and must be restored by the external commandcontroller when the chip returns to normal mode.-10.7.2 Pipeline Instruction Latch Register (OPILR)The OPILR is a 24-bit latch that stores the value of the instruction latch before the debugmode is entered. OPILR can only be read through the OnCE serial interface. This registeris affected by the operations performed during the debug mode and must be restored by