section 7 - Index of

23 87 0L...-I ___-'-I_---'I BUS~ LSBOFREGISTER A2, B2 USED NOT USED WORDAS A DESTINATION23 87 0REGISTER A2, B2USED AS A SOURCEI '-__NO_T_U_S_ED_-,-I_A_2--,' REGISTER A2, B2!23 87 0SIGN EXTENSION ICONTENT~ BUSOF A2 _ OFA2 JFigure 6-4 Reading and Writing the ALU Extension Registers23 0II BUS-ADDRESS ALU REGISTERS'--v--'LSBOFAS A DESTINATION NOT USED WORDADDRESS ALU REGISTERSAS A SOURCE15 0I I ADDRESSALUREGISTERS~ ~23 1615 0IZEROFILLI, BUSFigure 6-5 Reading and Writing the Address ALU Registers6.3.2.2 AGU RegistersThe 24 AGU registers_ are 16 bits wide. They may be accessed as word operands foraddress, address modifier, and data storage. When used as a source operand, these registersoccupy the low-order portion of the 24-bit word; the high-order portion is read aszeros (see Figure 6-5). When used as a destination operand, these registers receive thelow-order portion of the word; the high-order portion is not used. The notation "Rn" designatesone of the eight address registers, RO-R7; the notation "Nn" designates one of theeight address offset registers, NO-N7; and the notation "Mn" designates one of the eightaddress modifier registers, MO-M7.