Simulation of Circuit Reliability with RelXpert

Simulation of Circuit Reliabilitywith RelXpertPresenter:Keith Green 1Additional Authors:Fuchen Mu 2 , Gautam Kapila 1 , and Vijay Reddy 11Texas Instruments2CadenceSeptember 22, 2005

Outline• MOSFET Reliability Kinetics:– Hot-Carrier Injection (HCI)– Negative Bias Temperature Instability (NBTI)– Gate Oxide Integrity (GOI)• Not included in RelXpert• RelXpert Modeling• RelXpert Simulation Flow• Circuit Example• SummarySeptember 22, 2005Slide 4

• For NMOS and PMOS, charges in the channelcurrent passing through the high-electric fieldregion near the drain can cause:– Impact Ionization• increased drain current• body current– Hot Carrier Injection (HCI) into Oxide• threshold voltage shifts and mobility degrades• oxide damage• gate current• Conventional SPICE models, e.g., BSIM4, includeimpact ionization current, but do not include HCIeffects.• RelXpert provides simulations of the HCI-inducedthreshold voltage shift and mobility degradation.Reliability Kinetics – Hot Carrier Injection(HCI)Sn+n+P-wellGI gDOxideDamageImpactIonizationI bodyn+September 22, 2005Slide 5

RelXpert Model Extraction• Elements Used to Extract a RelXpert Model:– SPICE model for fresh (un-aged) transistor• Standard model provided by TI’s SPICE Modeling Lab– Transistor reliability specifications– Reliability data:• impact ionization current (I b )• Id-Vd and Id-Vg data over time from aged siliconSeptember 22, 2005Slide 8

RelXpert Model Extraction Steps:1. Model transistor aging due to NBTI – PMOS only.2. Model impact ionization current, since it will be the monitor for HCIdegradation.3. Model the aging due to HCI.4. Model the change in key BSIM3 or BSIM4 model parameters, forexample, threshold voltage (VTH0) and low-field mobility (U0), as afunction of NBTI and HCI aging. (AgeMOS Model)5. Ensure models align to reliability specifications (anchor points).RelXpert will generate an aged SPICE model for each transistor based onits particular degradation from circuit operation.September 22, 2005Slide 9

NBTI Model Parameter ExtractionDegradation due to NBTI:Aging due to NBTI:Idsat(t)=nAexp( − ∆H/ kT ) exp( −γV gs t1( ∆D) nnt = 0)*[1 − ( age) ]∆D =)age =Idsat(September 22, 2005Slide 10

HCI Lifetime Model Parameter ExtractionIb=ABii⎛ i c ⎞( Vds−Vdsat) Idexp − ⎟⎠⎜⎝VdsB l−Vdsatage =Idsat(t)= Idsat(tI ⎛ds IHW⎜⎝ Ibds⎞⎟⎠mt= 0)*[1 −n( age) ]September 22, 2005Slide 11

AgeMOS Parameter ExtractionThe RelXpert ‘AgeMOS’ model makes some key BSIM3/4 SPICE modelparameters a function of age. RelXpert will generate an aged SPICEmodel for each transistor based on its particular degradation from circuitoperation.-0.0035-0.0030-0.0025-0.0020Technology: 1233C027.0, 1.2V Core CMOSPMOS: L=0.13µm, W=10µmStress @ Vg=-1.6, Vd=0, T=125 o CStress time 1018 minutesfresh device measurement resultsfresh model simulationpost stress measurement resultspost stress agemos model simulationIds (A)-0.0015-0.0010-0.0005September 22, 20050.00000.0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2Vds (V)Slide 12

Outline• MOSFET Reliability Kinetics:– Hot-Carrier Injection (HCI)– Negative Bias Temperature Instability (NBTI)– Gate Oxide Integrity (GOI)• Not included in RelXpert• RelXpert Modeling• RelXpert Simulation Flow• Circuit Example• SummarySeptember 22, 2005Slide 13

Circuit Reliability SimulationINPUT SIMULATION OUTPUTSPICE NetlistTISPICE• TransistorDegradation• Lifetime Analyses• Circuit Waveforms:RelXpert SPICE Model= standard SPICE Model+ additional HCI and NBTI modelparametersRelXpertFresh vs. AgedSeptember 22, 2005Slide 14

Outline• MOSFET Reliability Kinetics:– Hot-Carrier Injection (HCI)– Negative Bias Temperature Instability (NBTI)– Gate Oxide Integrity (GOI)• Not included in RelXpert• RelXpert Modeling• RelXpert Simulation Flow• Circuit Example• SummarySeptember 22, 2005Slide 15

Example RelXpert Application:Overdriven IO Design• Design :– 2.5V Standard StubTerminated Logic (SSTL)Driver in 90nm CMOS fora DSP• Problem :– Overdriven design: 1.8Vtransistors in I/Ointerface with 2.5V circuit– Excessive HCI and NBTIin un-optimized circuit• Solution :– RelXpert simulationssuggest circuit changes.StartEvaluate PerformanceMetric ( jitter etc)Run RelXpertRe-evaluate PerformanceMetric ( jitter etc)Meet theSpec ?EndYesNoImplementCircuitChangesSeptember 22, 2005Slide 16

Example RelXpert Application:Overdriven IO Design• Improving the Designfor Reliability– Evaluate transistor leveldegradations– Identify transistors incritical path of the design– Implement fixes for criticaltransistors.• Fixes Implemented– Internal NMOS cascoded– NMOS length increased• ~2 * LminJitter(ps)DutyCycle(%)Spec18052.5 -47.5Pre-OptimizedBOL5749.3EOL21844.9Post -OptimizedBOL7149.2EOL16047.7Table1 : Results for SSTL buffer aftercorrection for HCI – NBTI degradationSeptember 22, 2005Slide 17

Outline• MOSFET Reliability Kinetics:– Hot-Carrier Injection (HCI)– Negative Bias Temperature Instability (NBTI)– Gate Oxide Integrity (GOI)• Not included in RelXpert• RelXpert Modeling• RelXpert Simulation Flow• Circuit Example• SummarySeptember 22, 2005Slide 18

Summary• Some circuit designs are required to meet performancespecifications over a customer-prescribed product“lifetime”.• Simulations with RelXpert provide useful insight intocircuit reliability because each transistor is degradedbased on its particular operation within the circuit.RelXpert also enables designers to reduce over-designmargins attributed to reliability effects.September 22, 2005Slide 19