HiRel Space Guide (Rev. A)

HiRel Space Guide (Rev. A) HiRel Space Guide (Rev. A)

11.07.2015 Views

Featured ProductsPower ManagementPrecision Micropower Shunt Voltage ReferenceLM4050QML-SP1.2 V and 3.3 V IN In QualificationLM4050QML-SPR SV RV SI Q+ I LI LI QTypical application circuitKey Features• Radiation performanceLow dose rate qualified to100 kRAD (Si)Single-event latchup-free up to120 MeV-cm 2 /mg• Fixed reverse breakdown voltages of2.5 V and 5.0 V• Voltage tolerance ± 0.1%• Tempco 17 ppm/˚C• 60 µA to 15 mA operating current range• SET free with 60 µF capacitor• QML-V RHA qualified, SMD5962R09235• Applications• For use in space-critical applications,such as satellite control systems andinstrumentation• Power supply for micropower dataconvertersGet more information: www.ti.com/product/LM4050QML-SPDSP32/64-Bit, 250Mhz Floating-Point DSPSMV320C6727B-SPThe SM320C6727B is the next generation of Texas Instruments’ C67x generation ofhigh-performance 32-/64-bit floating-point digital signal processor.The C67x+ CPU is an enhanced version of the C67x CPU used on the C671x DSPs.It is compatible with the C67x CPU but offers significant improvements in speed,code density, and floating-point performance per clock cycle. At 300 MHz, the CPUis capable of a maximum performance of 2400 MIPS/1800 MFLOPS by executing upto eight instructions (six of which are floating-point instructions) in parallel each cycle.The CPU natively supports 32-bit fixed-point, 32-bit single-precision floating-point, and64-bit double-precision floating-point arithmetic.256KBytesSRAM384KROM32-BitEMIFHPIInstructionCache32 KBytesC67x+DSPCoreMemory ControllerSwitchMAX MAXControldMAXConfigDMASPI 0I 2 C 0I 2 C 1McASP 0McASP 1McASP 2SPI 1RTI TimerRHA Certification PendingKey Features• New C67x+ DSP Core250 MHz; 1500 MFLOPS• Memory256 KB of SRAM and 32 KB ofI-CacheDSP/BIOS/DSPLIB/FastRTS Libraryincluded in the device• Peripherals32-bit HPI for Connecting to HostsdMAX Support for 1D, 2D, 3DTransfers as well as Multi-TapMemory DelayThree McASPsTwo I 2 C, two SPIs, 133 MHz/32-bitEMIF• Temperature Range: -55˚C to +115˚C,-55˚C to +125˚C• Available in 256-pin Ceramic QFPPackage• VelociTI Advanced Very Long InstructionWord (VLIW) ’C67x CPU Core• 5962R1023101VXC, RHA certificationpending• Orderable as SMV32OC6727BHFHWRadiation Performance:• TID = 100kRad(Si)• SEL Immune to LET = 117 MeV-cm 2 /mg• Visit www.ti.com/radiation for detailedrad reportsApplications:SMV320C6727B block diagram• SatelliteGet more information: www.ti.com/product/SMV320C6727B-SP• Radar and Guidance Systems• Geological Exploration6 | Space Products Guide 2013 Texas Instruments

Featured ProductsMemoryMonolithic Asynchronous Rad Hard 16M SRAM with Embedded EDAC and ScrubSMV512K32-SPThe SMV512K32 is a high performance asynchronous CMOS SRAM organized as524,288 words by 32-bits. It is pin selectable between two modes: master or slave.The master device selection provides user defined autonomous EDAC scrubbingoptions. The slave device selection employs a scrub on demand feature that can beinitiated by a master device.WZE1ZE2GZDQ(31:0)Data ConvertersRead/WriteCircuitA7A8A9A10A11A12A13A14A15A16EDACRow DecoderSMV512K32-SP block diagramMemory Array512K x 32I/O CircuitColumn DecoderA0 A1 A2 A3 A4 A5 A6 A17 A18MBESCRUBZBUSYZGet more information: www.ti.com/product/SMV512K32-SPKey Features• Radiation performanceTID = >300 kRAD (Si)SER < 5e-17 upsets/bit-dayProton upset saturation crosssection < 3e-16cm 2 /bitLatch up immunity > LET = 110MeV-cm 2 /mg (T=398°K)• Functionally compatible with commercial512K x 32 asynchronous 16 MbSRAMs• 20ns read, 13.8ns write-throughmaximum access time• Built-in error detection and correction(EDAC)• Built-in scrub engine for autonomouscorrection (scrub frequency and delayis user defined)• Three state bidirectional data bus• Orderable as 5962-1123701VXC12-Bit 500-MSPS Analog-to-Digital ConverterADS5463-SPThe ADS5463-SP is a 12-bit, 500-MSPS analog-to-digital converter (ADC) that operatesfrom both a 5-V supply and 3.3-V supply, providing LVDS-compatible digital outputsfrom the 3.3-V supply. The input buffer isolates the internal switching of the onboardtrack and hold from disturbing the signal source while providing a high-impedance input.A INA INV REFCLKCLKA1ReferenceTH1TimingTH2+ +A2TH3– –ADC1 DAC1 ADC25OVR OVR DRY DRYDigital Error CorrectionD[12:0]AV DDDAC2DV DDA35 5GNDADC3Key Features• Radiation performanceTID = 150 kRAD (Si)• Single event latchup (SEL) immune atLET ≤ 86 MeV-cm 2 /mg• SNR > 64.5 dBFS at 450 MHzand 500 MSPS• 2.2-VPP differential input voltage• 2.2-W total power dissipation• On-chip analog buffer, track and holdand reference circuit• 84-pin ceramic ceramic quad Flatpackpackage (HFG)• QML-V RHA qualified, SMD5962R0720802VXC• Military temperature range–55°C to 125°CADS5463-SP functional block diagramGet more information: www.ti.com/product/ADS5463-SPApplications• Orbital communication• Orbital control systems• Spacecraft communicationsTexas Instruments Space Products Guide 2013 | 7

Featured ProductsPower ManagementPrecision Micropower Shunt Voltage ReferenceLM4050QML-SP1.2 V and 3.3 V IN In QualificationLM4050QML-SPR SV RV SI Q+ I LI LI QTypical application circuitKey Features• Radiation performanceLow dose rate qualified to100 kRAD (Si)Single-event latchup-free up to120 MeV-cm 2 /mg• Fixed reverse breakdown voltages of2.5 V and 5.0 V• Voltage tolerance ± 0.1%• Tempco 17 ppm/˚C• 60 µA to 15 mA operating current range• SET free with 60 µF capacitor• QML-V RHA qualified, SMD5962R09235• Applications• For use in space-critical applications,such as satellite control systems andinstrumentation• Power supply for micropower dataconvertersGet more information: www.ti.com/product/LM4050QML-SPDSP32/64-Bit, 250Mhz Floating-Point DSPSMV320C6727B-SPThe SM320C6727B is the next generation of Texas Instruments’ C67x generation ofhigh-performance 32-/64-bit floating-point digital signal processor.The C67x+ CPU is an enhanced version of the C67x CPU used on the C671x DSPs.It is compatible with the C67x CPU but offers significant improvements in speed,code density, and floating-point performance per clock cycle. At 300 MHz, the CPUis capable of a maximum performance of 2400 MIPS/1800 MFLOPS by executing upto eight instructions (six of which are floating-point instructions) in parallel each cycle.The CPU natively supports 32-bit fixed-point, 32-bit single-precision floating-point, and64-bit double-precision floating-point arithmetic.256KBytesSRAM384KROM32-BitEMIFHPIInstructionCache32 KBytesC67x+DSPCoreMemory ControllerSwitchMAX MAXControldMAXConfigDMASPI 0I 2 C 0I 2 C 1McASP 0McASP 1McASP 2SPI 1RTI TimerRHA Certification PendingKey Features• New C67x+ DSP Core250 MHz; 1500 MFLOPS• Memory256 KB of SRAM and 32 KB ofI-CacheDSP/BIOS/DSPLIB/FastRTS Libraryincluded in the device• Peripherals32-bit HPI for Connecting to HostsdMAX Support for 1D, 2D, 3DTransfers as well as Multi-TapMemory DelayThree McASPsTwo I 2 C, two SPIs, 133 MHz/32-bitEMIF• Temperature Range: -55˚C to +115˚C,-55˚C to +125˚C• Available in 256-pin Ceramic QFPPackage• VelociTI Advanced Very Long InstructionWord (VLIW) ’C67x CPU Core• 5962R1023101VXC, RHA certificationpending• Orderable as SMV32OC6727BHFHWRadiation Performance:• TID = 100kRad(Si)• SEL Immune to LET = 117 MeV-cm 2 /mg• Visit www.ti.com/radiation for detailedrad reportsApplications:SMV320C6727B block diagram• SatelliteGet more information: www.ti.com/product/SMV320C6727B-SP• Radar and Guidance Systems• Geological Exploration6 | <strong>Space</strong> Products <strong>Guide</strong> 2013 Texas Instruments

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