MC95FB204 - abov.co.kr

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MC95FB2047.10 CC/CV CharacteristicsTable 7-10 CC/CV CharacteristicsParameterCurrent Consumption- not taking the output sinkingcurrent into accountTransconduction gain(Vctrl).sink current only(1)Voltage control loop reference(2)Input bias current (Vctrl)Transconduction gain (Ictrl). sinkcurrent onlyInput offset voltage deviation(3)(Vsense vs. Ictrl)Current out of pin ICTRL at -200mVLow output voltage at 10mAsinking currentOutput short circuit current.Output to vcc. Sink current onlySymbolI CCGmvVrefIibvGmiV SENSElibiTESTCONDITIONMIN TYP MAX Unit0.2 0.40 < TA < 85℃ 0.50 < TA < 50℃ 0.51 3.51.204 1.210 1.2160 < TA < 50℃ 1.186 1.2340 < TA < 85℃0 < TA < 50℃ 0.8501.5 7I O = 2.5mA 15 20 250 < TA < 50℃I O = 2.5mA0 < TA < 85℃8 20 3225mAmA/mVVnAmA/mVmVV OL 200 mVI OS0 < TA < 50℃27 65uAmA(VDD =3.0v~5.5v, TA= 25℃, unless otherwise specified)1. If the voltage on VCTRL (the positive input of the amplifier) is higher than the negative amplifier input(Vref= 1.210 V), and it is increased by 1mV, the sinking current at the output OUT will be increased by 3.5 mA.2. The internal Voltage Reference is set at 1.210 V (bandgap reference). The voltage control loop precisiontakes into account the cumulative effects of the internal voltage reference deviation as well as the input offsetvoltage of the trans-conductance operational amplifier. The internal Voltage Reference is fixed by bandgap,and trimmed to 0.5 % accuracy at room temperature.3. The current control loop precision takes into account the cumulative effects of the Ictrl voltage referencedeviation as well as the input offset voltage of the trans-conduction operational amplifier.26 July 17, 2012 Ver.1.7
MC95FB2047.11 Typical CharacteristicsThese graphs and tables provided in this section are for design guidance only and are not tested orguaranteed. In some graphs or tables the data presented are outside specified operating range (e.g.outside specified VDD range). This is for information only and devices are guaranteed to operateproperly only within the specified range.The data presented in this section is a statistical summary of data collected on units from differentlots over a period of time. “Typical” represents the mean of the distribution while “max” or “min”represents (mean + 3σ) and (mean - 3σ) respectively where σ is standard deviation.July 17, 2012 Ver.1.7 27
Page 1 and 2: ABOV SEMICONDUCTOR Co., Ltd.8-BIT M
Page 3 and 4: MC95FB204VERSION 0.2 Preliminary (S
Page 5 and 6: MC95FB20410.5 Interrupt Sequence ..
Page 7 and 8: MC95FB204List of FiguresFigure 1.1
Page 9 and 10: MC95FB204List of TablesTable 1-1 Or
Page 11 and 12: MC95FB2041.3 Ordering InformationTa
Page 13 and 14: MC95FB204Figure 1.2 Single Programm
Page 15 and 16: MC95FB204MC95FB2043. Pin Assignment
Page 17 and 18: MC95FB204Figure 4.2 20 pin TSSOP pa
Page 19 and 20: MC95FB2046. Port Structures6.1 Gene
Page 21 and 22: MC95FB2047. Electrical Characterist
Page 23 and 24: MC95FB204Note) -STOP1: WDT running
Page 25: MC95FB2047.9 AC CharacteristicsTabl
Page 29 and 30: MC95FB204FFFFH0FFFH4KBytes0000HFigu
Page 31 and 32: MC95FB2047FH7F776F7E766E7D756D7C 7B
Page 33 and 34: MC95FB204July 17, 2012 Ver.1.7 33
Page 35 and 36: MC95FB204Address Function Symbol R/
Page 37 and 38: MC95FB204Address Function Symbol R/
Page 39 and 40: MC95FB204ACF0Auxiliary Carry FlagGe
Page 41 and 42: MC95FB2049.2.6 Register MapTable 9-
Page 43 and 44: MC95FB2049.4 P1 Port9.4.1 P1 Port D
Page 45 and 46: MC95FB2049.5 P2 Port9.5.1 P2 Port D
Page 47 and 48: MC95FB20410. Interrupt Controller10
Page 49 and 50: MC95FB20410.3 Block DiagramIEDS0IE[
Page 51 and 52: MC95FB2041IE.EA Flag 1IEx.y 123Pr
Page 53 and 54: MC95FB20410.7 Multi InterruptIf two
Page 55 and 56: MC95FB20410.10 Saving/Restore Gener
Page 57 and 58: MC95FB204IE2 AAH R/W 00H Interrupt
Page 59 and 60: MC95FB204R R R/W R/W R/W R/W R/W R/
Page 61 and 62: MC95FB20411. CC/CV BlockCC/CV means
Page 63 and 64: MC95FB204When the current of R SENS
Page 65 and 66: MC95FB20412. Clock Generator12.1 Ov
Page 67 and 68: MC95FB204Note) by CBYS bit, reflect
Page 69 and 70: MC95FB20413.4 Bit Interval Timer Re
Page 71 and 72: MC95FB204WDTMR 8D R/W 00H Watch Dog
Page 73 and 74: MC95FB20415. Timer/PWM15.1 Overview
Page 75 and 76: MC95FB204Match with T0DR/T1DRT0DR/T
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MC95FB204T0CRT0EN T0PE CAP0 T0CK2 T
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MC95FB204T0CRT0EN T0PE CAP0 T0CK2 T
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MC95FB204T1CR[1:0] = 10 H(2us)PWM1H
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MC95FB204T0 (Timer 0 Register: Read
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MC95FB204Initial value : 00HCDR1[7:
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MC95FB20416.2 Block Diagram÷2fxPre
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MC95FB204SET ADCM2Select ADC Clock
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MC95FB204ADDM11 ADDM10 ADDM9 ADDM8
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MC95FB20417. Power Down Operation17
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MC95FB20417.4 STOP modeThe power co
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MC95FB20417.5.1 Register MapTable 1
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MC95FB20418.4 RESET Noise Canceller
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MC95FB204:VDD Input:Internal OSCRes
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MC95FB20419. On-chip Debug System19
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MC95FB204Figure 19.2 10-bit transmi
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MC95FB204Acknowledge bittransmissio
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MC95FB20420.2.2 Register descriptio
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MC95FB2047 6 5 4 3 2 1 0ARL7 ARL6 A
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MC95FB20420.3 Memory map20.3.1 Flas
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MC95FB204Master ResetPage Buffer Re
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Step 5. Set erase mode. FMR:1001_00
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MC95FB20420.4.2 Summary of Flash Pr
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MC95FB20420.6 SecurityMC95FB204 pro
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MC95FB20422. APPENDIX22.1 Instructi
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MC95FB204SETB C Set carry 1 1 D3SET
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MC95FB20422.2.3 Preventative measur
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MC95FB204 - abov.co.kr

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