equired as shown in the case A of Figure 27. When the Resistive drive is option is not enabled,it is recommended to use 1kOhm resistors on X and Yk Lines external to the UC3L device. Thishardware arrangement is shown in case B.External Discharge modeWhen the External Discharge arrangement is used, a logic-level (DIS) pin is connected to anexternal resistor (Rdis) that can be used to control the discharge of the Capacitors. A typicalvalue for Rdis is 100 kOhm. This value of Rdis will give a discharge current of approximately1.1V/(100 kOhm) = 11 microAmp. The case C shows this arrangement. The Resistive driveoption on the X and Yk lines can be optionally enabled or disabled with this arrangement. Whenthe Resistive drive is option is not enabled, it is recommended to use 1kOhm resistors on X andYk Lines external to the UC3L device.SMP Discharge ModeWhen the SMP Discharge mode arrangement is used, a logic-level (SMP) pin is connected to thecapacitors through external high value resistors for the discharge of the capacitors. The case Dshows this arrangement. The Resistive drive option on the X and Yk lines can be optionallyenabled or disabled with this arrangement. When the Resistive drive is option is not enabled, it isrecommended to use 1kOhm resistors on X and Yk Lines external to the UC3L device.VDIVEN Voltage Divider Enable optionThe VDIV pin provides an option to make ACREFN a small positive voltage if required. The VDIVpin is driven when the analog comparators are in use, and this signal can be used along with avoltage divider arrangement to create a small positive offset on the ACREFN pin. The VDIVENoption can be used optionally with any of the QMatrix modes discussed in the previous sections.Typical values for Ra and Rb are Ra=8200 ohm and Rb = 50 ohm. Assuming a 3.3V I/O supply,this will shift the comparator threshold by 3.3V*(Rb/(Ra+Rb)) which is 20 mV. The VDIVEN pinoption usage in the Internal Discharge mode scenario is shown in case E.SYNC pin optionIn order to prevent interference from the 50 or 60 Hz mains line the CAT can optionally triggerQMatrix acquisition on the external SYNC input signal. The SYNC signal should be derived fromthe mains line and the acquisition will trigger on a falling edge of this signal. The SYNC pinoption can be used with any of the QMatrix modes discussed in the previous sections. TheSYNC pin usage in the Internal Discharge mode scenario is shown in case F.For QMatrix method SMP, DIS, VDIV and SYNC pin options discussed in this Section, Refer toSection 6.3.15.2.13.1208207K-AT42-09/11
A. QMatrix Internal Discharge mode arrangement.Resistive drive enabled on X and Yk Lines<strong>Atmel</strong>AT32UC3LX2Xn...SensorsX, YSensor0, 0Sensorn, 0Sensor0, mSensorn, mB. QMatrix Internal Discharge mode arrangement.Resistive drive disabled on X and Yk Lines<strong>Atmel</strong>AT32UC3LX0XnRX0...RXnSensor0, 0Sensorn, 0SensorsX, YSensor0, mSensorn, mY0AYmACAT CS0ModuleY0BYmB...CSmTypical Values:CS:4.7nFn - number of X Linesm - number of Y LinesY0AYmACATModuleCS0Y0BYmB...RX0...RXnCSmTypical Values:CS:4.7nFRX: 1kOhmn - number of X Linesm - number of Y LinesACIFB-ACREFNI/O Pin requirements:X: QMatrix method X LineYA: QMatrix method Yk LineYB: QMatrix method Y LineACIFB-ACREFN: PA16 I/O pinACIFB-ACREFNI/O Pin requirements:X: QMatrix method X LineYA: QMatrix method Yk LineYB: QMatrix method Y LineACIFB-ACREFN: PA16 I/O pinC. QMatrix External Discharge mode arrangement.Resistive drive enabled on X and Yk Lines<strong>Atmel</strong>AT32UC3LX2Xn...Sensor0, 0Sensorn, 0SensorsX, YSensor0, mSensorn, mD. QMatrix SMP Discharge mode arrangement.Resistive drive disabled on X and Yk Lines<strong>Atmel</strong>AT32UC3LX0XnRX0...RXnSensor0, 0Sensorn, 0SensorsX, YSensor0, mSensorn, m<strong>Atmel</strong>AT32UC3LY0AYmACATModuleY0BYmBDISACIFB-ACREFNX2XnCS0Rdis...CSmE. QMatrix Internal Discharge mode arrangementwith Volage Divider option enabled.Resistive drive enabled on X and Yk Lines...Typical Values:CS:4.7nFRdis: 100kOhmn - number of X Linesm - number of Y LinesI/O Pin requirements:X: QMatrix method X LineYA: QMatrix method Yk LineYB: QMatrix method Y LineDIS: CAT-DIS IO pinACIFB-ACREFN: PA16 I/O pinSensor0, 0Sensorn, 0SensorsX, YSensor0, mSensorn, m<strong>Atmel</strong>AT32UC3LY0AYmACATModuleCS0Y0BYmBRYB0SMPACIFB-ACREFN...RX0...RXnF. QMatrix Internal Discharge mode arrangementwith External Sync option enabled.Resistive drive enabled on X and Yk LinesX2Xn...CSmTypical Values:CS:4.7nFRX: 1kOhmRYB: 1kOhmRYBmn - number of X Linesm - number of Y LinesI/O Pin requirements:X: QMatrix method X LineYA: QMatrix method Yk LineYB: QMatrix method Y LineSMP: CAT-SMP IO pinACIFB-ACREFN: PA16 I/O pinSensor0, 0Sensorn, 0SensorsX, YSensor0, mSensorn, mY0AY0AYmACATModuleCS0...CSmYmACATModuleCS0...CSmY0BYmBVDIVENACIFB-ACREFNRaRbTypical Values:CS:4.7nFRa: 16500 OhmRb: 50 Ohmn - number of X Linesm - number of Y LinesI/O Pin requirements:X: QMatrix method X LineYA: QMatrix method Yk LineYB: QMatrix method Y LineVDIVEN: CAT-VDIVEN IO pinACIFB-ACREFN: PA16 I/O pinY0BYmBSYNCACIFB-ACREFNTypical Values:CS:4.7nFSynchronizesignaln - number of X Linesm - number of Y LinesI/O Pin requirements:X: QMatrix method X LineYA: QMatrix method Yk LineYB: QMatrix method Y LineSYNC: CAT-SYNC IO pinACIFB-ACREFN: PA16 I/O pin121
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Atmel QTouch LibraryUser GuideSuppo
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5.6.11.6.1 Debug Support in the sam
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6.3.16.21 touch_info_t ............
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• ARM: refers to a device in the
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Libraries for AVR microcontrollers
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QMatrix charge transfer is labeled
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Maximum ON DurationIf an object uni
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Setting Variable name Data Type Uni
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Guard ChannelGuard channel in Qtouc
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7 AKS groups are supported by the l
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Data structuresThis section lists t
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The signal gain for each sensor is
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• This function can be called any
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unit16_t qt_measure_sensors( uint16
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Channel NumberingChannel numbering
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qt_reset_sensing()qt_enable_xxx()qt
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Port AAll SNSK pinsterminatedon thi
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Example:Pins A0 ,A3 and A5 of PORT
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Channel 47 N/A N/A N/A N/A N/A X7Y5
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channel 0channel 1channel 2channel
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Disabling and Enabling of Pull-up f
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‣ Recommended threshold should be
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QMatrix acquisitionmethod libraries
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definition is not required.QT_NUM_C
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SNS1 and SNSK1 pins usethe same por
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• It is recommended to disable PU
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Table 4 :List of configurable param
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Number ofchannels requiredfor the a
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2. The above definitions should be
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NUM_Y_LINES_ROTOR_SLIDER_QT_MAX_NUM
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has Four Comparators (AC0A , AC1A ,
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Note: When using the IAR IDE / comp
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VCCPA0No ConnectionPA1PA2ATtiny20PA
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QTouch Library configuration parame
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Recommended setting.Table 19 QTouch
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Figure 51 Schematic overview of QTo
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QTouch Library configuration parame
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Devices supportedThe list of differ
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• The channel number is derived f
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MISRA Compliance ReportThis section
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May 2010Ver 4.2July 2010Ver 4.3Jan