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Traffic Management for the Available Bit Rate (ABR) Service in ...

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Switch Rule 1: This rule speci es that one or more methods of feedback<br />

mark<strong>in</strong>g methods must be implemented at <strong>the</strong> switch. The possible methods<br />

<strong>in</strong>clude :<br />

EFCI Mark<strong>in</strong>g: This de nes <strong>the</strong> b<strong>in</strong>ary (bit-based) feedback framework,<br />

where switches may set<strong>the</strong> EFCI bit <strong>in</strong> data cell headers. We have noted<br />

earlier that <strong>the</strong> dest<strong>in</strong>ations ma<strong>in</strong>ta<strong>in</strong> an EFCI state per-VC and set <strong>the</strong><br />

CI bit <strong>in</strong> backward RM cells if <strong>the</strong> VC's EFCI state is set. Note that <strong>the</strong><br />

VC's EFCI state at <strong>the</strong> dest<strong>in</strong>ation is set and reset whenever an <strong>in</strong>com<strong>in</strong>g<br />

data cell has its EFCI set or reset respectively.<br />

Relative <strong>Rate</strong> Mark<strong>in</strong>g: This option allows <strong>the</strong> switch to set two bits <strong>in</strong><br />

<strong>the</strong> RM cell which have a speci c mean<strong>in</strong>g to when <strong>the</strong>y reach <strong>the</strong> source<br />

end systems. The CI bit when set asks <strong>the</strong> source to decrease, while<br />

<strong>the</strong> NI bit tells <strong>the</strong> source not to <strong>in</strong>crease beyond its current rate, ACR.<br />

Observe that <strong>the</strong> source rate may be fur<strong>the</strong>r reduced us<strong>in</strong>g <strong>the</strong> explicit<br />

rate <strong>in</strong>dication eld. These bits allow <strong>the</strong> switches some more exibility<br />

than <strong>the</strong> EFCI bit mark<strong>in</strong>g. Speci cally, <strong>the</strong> switches can avoid <strong>the</strong> \beat-<br />

down" fairness problem seen <strong>in</strong> EFCI mark<strong>in</strong>g scenarios. The problem<br />

occurs because connections go<strong>in</strong>g through several switches have a higher<br />

probability of <strong>the</strong>ir EFCI bits be<strong>in</strong>g set, than connections go<strong>in</strong>g through a<br />

smaller number of switches.<br />

Explicit <strong>Rate</strong> Mark<strong>in</strong>g: Allows <strong>the</strong> switch to specify exactly what rate it<br />

wants a source to send at. To ensure coord<strong>in</strong>ation among multiple switches<br />

<strong>in</strong> a connection's path, <strong>the</strong> switch may reduce (but not <strong>in</strong>crease) <strong>the</strong> ER<br />

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