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Traffic Management for the Available Bit Rate (ABR) Service in ...

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The OSU scheme is, <strong>the</strong>re<strong>for</strong>e, <strong>in</strong>compatible with <strong>the</strong> ATM <strong>for</strong>um's current tra c<br />

management standards. Although, it cannot be used directly, most of its features<br />

and results can be ported to design compatible schemes. We have upgraded <strong>the</strong><br />

ideas from <strong>the</strong> OSU scheme to create <strong>the</strong> Explicit <strong>Rate</strong> Indication <strong>for</strong> Congestion<br />

Avoidance (ERICA) scheme [45]. The ERICA scheme which is described later <strong>in</strong> this<br />

dissertation, is also mentioned <strong>in</strong> <strong>the</strong> ATM Tra c <strong>Management</strong> 4.0 standards as a<br />

sample switch algorithm.<br />

5.10 Limitations and Summary of <strong>the</strong> OSU Scheme<br />

This chapter describes an explicit rate based congestion avoidance scheme <strong>for</strong><br />

ATM networks. The scheme was developed as <strong>the</strong> ATM Forum tra c management<br />

speci cations were be<strong>in</strong>g developed. While <strong>the</strong> strengths of <strong>the</strong> OSU scheme are<br />

its choice of congestion <strong>in</strong>dicator, metric, small number of parameters, and O(1)<br />

complexity, its limitations are slow convergence <strong>for</strong> complex con gurations, and slight<br />

sensitivity to <strong>the</strong> averag<strong>in</strong>g <strong>in</strong>terval parameter. The follow<strong>in</strong>g statements apply to<br />

<strong>the</strong> basic OSU scheme.<br />

Our proof <strong>in</strong> section 5.8 is applicable to <strong>the</strong> bottleneck l<strong>in</strong>k (l<strong>in</strong>k with <strong>the</strong> high-<br />

est utilization) which is shared by unconstra<strong>in</strong>ed sources (which can use any given<br />

allocation). It assumes that feedback is given to sources <strong>in</strong>stantaneously and syn-<br />

chronously. In <strong>the</strong> general case, where <strong>the</strong>se assumptions do not hold, <strong>the</strong> system<br />

may take longer to converge to <strong>the</strong> fair and e cient operat<strong>in</strong>g po<strong>in</strong>t. If <strong>the</strong> pertur-<br />

bations to <strong>the</strong> system (due to VBR, asynchronous feedback, multiple bottlenecks, or<br />

rapid changes <strong>in</strong> source load pattern) are of a time scale smaller than this convergence<br />

148

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