Systolic arrays for matrix multiplications

Matrix-vector multiplication onfixed-size linear systolic arrays If dimension of problem is too large and overflowreal limits for the number of PEs in SA thanusage of fixed-size SA become significant Solution: decompose the algorithm and realize itin a finite number of iterations on fixed-size SA Due to bottleneck that memory systemrepresents, specific hardware for addressgeneration which optimizes memory access isnecessary