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Letter From the Chairman - UMC

Letter From the Chairman - UMC

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ISSUE 22/ SUMMER 2006<strong>Letter</strong> <strong>From</strong> <strong>the</strong> <strong>Chairman</strong>highlights<strong>Letter</strong> <strong>From</strong> <strong>the</strong> <strong>Chairman</strong> 1technology articles<strong>UMC</strong> Names Raymond Leung VicePresident of Memory IP Development 2XILINX Delivers Virtex 5 LX FPGA toits Customers 3<strong>UMC</strong> Delivers New SONOS Memoryto Solid State System Co. 4<strong>UMC</strong> Announces Readiness for 65-nanometer X Architecture Designs 4design newsSidense to Deliver OTP Cores in<strong>UMC</strong>’s 90nm and 65nm Processes 5<strong>UMC</strong>’s Integrated DFM SolutionsTarget Today’s 90nm and 65nm SoCDesigners 6Impinj and <strong>UMC</strong> Deliver Logic NVMCores on 0.18um and 0.13umProcesses 6Silicon Image to Port HDMI TM ReceiverIP Core to <strong>UMC</strong>’s 90nm ProcessTechnology 8<strong>UMC</strong> recently released itsfinancial results for <strong>the</strong> firstquarter of 2006. Demand in Q1was very close to our originalexpectations, and in fact wasactually slightly better. Ourperformance in <strong>the</strong> quarter wasat <strong>the</strong> upper range of ourguidance, with revenue reachingNT$24.4 billion and profitabilitybeating our earlier projections.For Q2, as a whole, we believethat demand will be in line withseasonal norms. Computersector demand will encounterseasonal inventory adjustments.At <strong>the</strong> same time, we have seenhandset demand start toaccelerate, which is about one to“We are seeing strongdemand for 65nm technologies,and are progressingsmoothly in <strong>the</strong> rolloutof this process. <strong>UMC</strong> ledall foundries with <strong>the</strong>delivery of its first 65nmcustomer product back inJune 2005.”Dr. Jackson Hu, <strong>Chairman</strong>, <strong>UMC</strong>two months earlier than typicalseasonal trends. Our understandingis that demand for entrylevelhandsets in developingmarkets such as India, Africa,Indonesia and China will grow thisyear. Therefore, handset relatedcomponents should be in strongdemand. In particular, our volumeproduction of 90nm and 0.13umwafers for existing customers aswell as new customers willincrease significantly. In addition,it is worth noting that we will startvolume production for a graphicchip customer during <strong>the</strong> quarter.Therefore, our visibility lookingbeyond to <strong>the</strong> 3rd quarter is good,and we are expecting industrygrowth across most applications.-- continued on page 2


<strong>Letter</strong> <strong>From</strong> <strong>the</strong> <strong>Chairman</strong>-- continued from page 1We are also seeing strong demandfor 65nm technologies, and areprogressing smoothly in <strong>the</strong> roll-outof this process. <strong>UMC</strong> led allfoundries with <strong>the</strong> delivery of its first65nm customer product back inJune 2005. In Q2, two customerswill start small volume productionat Fab 12A and we expect toreceive 11 product tape-outs frommultiple customers by <strong>the</strong> end ofthis summer. We believe <strong>UMC</strong>’ssuccess at 65nm will be a strongcompetitive advantage for ourcustomers in <strong>the</strong> coming years.<strong>UMC</strong> CNames Raymonmond LeungVicePresidedent of Memory yIPDevelopmentRaymond Leung has joined <strong>UMC</strong>as vice president of Memory IPDevelopment. The creation of thisnew position will streng<strong>the</strong>n <strong>UMC</strong>’sinternal embedded memorydevelopment capabilities at verydeep submicron processtechnologies. Mr. Leung will reportdirectly to Patrick T. Lin, chief SoCarchitect, system and architecturesupport at <strong>UMC</strong>.Due to <strong>the</strong> large demand <strong>UMC</strong> isexperiencing for its foundryservices, <strong>UMC</strong> is streng<strong>the</strong>ning itsinternal design resources as wellas continuing to work closely withits IP partners in order to enhance<strong>the</strong> company’s overall designsupport. The addition of Raymond’sexpertise to <strong>UMC</strong>’s embeddedmemory development will help turnthis area into a strong competitiveadvantage for customers designingnext generation SoCs on <strong>UMC</strong>’sadvanced processes.Raymond brings over 20 years ofsemiconductor industry experienceto <strong>UMC</strong>. Prior to joining <strong>the</strong> foundry,Mr. Leung was <strong>the</strong> executive vicepresident at Celestial Semiconductor.He also served as vicepresident of engineering at VirageLogic, where he was responsiblefor developing <strong>the</strong> foundry librariesand managing most of <strong>the</strong> remotedevelopment operations. O<strong>the</strong>rcompanies benefiting from hisexpertise include LSI Logic Corpwhere he served as senior director,and prior to that PhilipsSemiconductor where he was asenior design engineer in <strong>the</strong> PLDdivision. Raymond earned hisBSEE degree at ColumbiaUniversity in 1981, and his MSEEdegree at Stanford University in1982.2PROFOUNDRYSUMMER 2006


Technology ArticlesXILINX Delivers Virtex 5 LX FPGA to itsCustomers65nm Virtex 5 Product Family Manufactured at <strong>UMC</strong>At a press conference held in Taipei, Taiwan in May,Xilinx announced <strong>the</strong> launch of <strong>the</strong>ir Virtex 5 FPGAfamily, which is being produced at <strong>UMC</strong> on leadingedge65nm process technology. Senior vicepresident of <strong>UMC</strong>’s Central R & D Department Shih-Wei Sun was present to deliver a presentationsupporting <strong>the</strong> product launch. The Virtex 5 LX isalready being delivered to end customers, andutilizes some of <strong>UMC</strong>’s most advanced processessuch as 1 poly, 10 copper metal layer technologyand triple-gate oxide to enable 30 percent higherperformance, consume 45 percent less area andprovide <strong>the</strong> industry’s lowest dynamic power – 35percent lower than previous generation 90nmFPGAs.Dr. Shih-Wei Sun, <strong>UMC</strong> senior vice president andMr. Vincent Tong, vice president, ProductTechnology, Advanced Products Group, Xilinx<strong>UMC</strong> 65nm Technology LeadershipBoth high-performance and low-leakage 65nmprocesses were developed at Fab 12A foron-site production rampLed all foundries with <strong>the</strong> delivery of first fullyfunctional 65nm customer product in June 2005Successfully accomplished 65nm customerproduct qualification in March 2006Eight 65nm customers engaged, with eleven65nm product tape-outs expected by <strong>the</strong> end ofsummer 2006<strong>UMC</strong>’s 65nm process is currently being portedto Fab 12i in Singapore1P10M, Triple Oxide, Copper/Low-K(K=2.9)40nm Ni-silicide Gate<strong>UMC</strong>’s 65nm High-Performance ProcessPROFOUNDRYSUMMER 20063


<strong>UMC</strong> Delivers New SONOS Memory toSolid State System Co.Technology Articles<strong>UMC</strong> today announced <strong>the</strong> deliveryof a new SONOS memory to SolidState System Co. This new memoryadopts advanced SONOS dielectricstorage technology, effectivelyenhancing program speedcompared to conventional SONOScells and conventional NAND typeflash. <strong>UMC</strong>’s experience in SONOSThin Film development allowed itsR&D team to deliver <strong>the</strong> 0.18ummemory cell during its first cut,followed by completion of <strong>the</strong> pilot runfor <strong>the</strong> 256Mb OTP/MTP memoryproduct. This memory offers costcompetitivemanufacturing, lowerpower consumption, and equivalentProgram/Erase performance andreliability.<strong>UMC</strong> has been working on flashtechnology formany years forseveral customers’flashproducts, including commodityflash as well as embedded flash/EEPROM. This latest successwith Solid State System Co. for <strong>the</strong>delivery of <strong>the</strong>ir SONOS productreaffirms <strong>UMC</strong>’s solid technologyfoundation and knowledge base in<strong>the</strong> area of flash technology.SONOS technology has been gaininginterest in recent years because of itsaggressively small cell size, lowervoltage operation, and simplemanufacturability compared toconventional types of flash technologysuch as NAND. These importantfeatures allow SONOS to be used formany high-density applications forstorage media. SONOS memory cellscan also be easily integrated intogeneric logic platforms.To address <strong>the</strong> most difficult aspect inscaling for traditional SONOStechnology—when <strong>the</strong> channel lengthbecomes smaller—<strong>UMC</strong> uses aninnovative method in its programcurrent as opposed to <strong>the</strong> hot electronmethod used by conventionalSONOS. This results in <strong>the</strong> lowerpower consumption exhibited by<strong>UMC</strong>’s SONOS technology.<strong>UMC</strong> Announces Readiness for65-nanometer X Architecture Designs<strong>UMC</strong>’s 65nm process technologyis now ready for X Architecturebasedchip designs. Cadence and<strong>UMC</strong> have successfully qualified65nm X Architecture design rules,<strong>the</strong> Cadence X Architecture, andDesign Support Manual (DSM)documents, allowing fabless andIDM companies to leverage <strong>the</strong> costand performance benefits of <strong>the</strong> X4 PROFOUNDRYSUMMER 2006Architecture for <strong>the</strong>ir leadingsystem-on-chip (SoC) designs.The two companies are engagingwith mutual customers towards XArchitecture production designs atleading process nodes.<strong>UMC</strong> became <strong>the</strong> first pure-playfoundry to join <strong>the</strong> X Initiative, aswell as <strong>the</strong> first to announce itsreadiness to accept X Architecturebaseddesigns for fabrication at130nm and 90nm process nodes.The Cadence X Architecture is nowavailable to customers for <strong>UMC</strong>’s130nm, 90nm and 65nm processtechnologies.


Sidense to Deliver OTP Cores in <strong>UMC</strong>’s90nm and 65nm ProcessesDesign News<strong>UMC</strong> has teamed with Sidense to deliver <strong>the</strong>ir 1TfuseTM family of embedded OTP cores on <strong>UMC</strong>’s 90nmand 65nm processes through <strong>UMC</strong>’s IP AllianceProgram. In January, Sidense announced its OTP coretargeted towards <strong>UMC</strong>’s 130nm standard logic digitalCMOS process. The cores are scalable to <strong>UMC</strong>’sCMOS processes without requiring additional maskor processing steps, providing users with shortenedtime-to-market and a path to cost reduction for <strong>the</strong>ircurrent and future designs.The OTP cores are scalable across <strong>UMC</strong>’s CMOSprocesses and easily ported across o<strong>the</strong>r technologynodes, such as 110nm and 80nm, potentially providingcustomers with several generations of continuous SoCmigration. Sidense’s high density macros can also beparameterized to obtain different configurations andcan be used to replace external FLASH and EEPROMas well as a field programmable alternative to MASKROM.Chips used for high growth markets such as printers,cameras, set-top boxes, mobile and handheld devicescan benefit from <strong>the</strong> high density, secure and low powercharacteristics of Sidense’s 1T-Fuse TM OTP offering.-- continued from page 4About <strong>the</strong> X ArchitectureThe X Architecture represents an innovative approachfor orienting a chip’s microscopic interconnect wires,with <strong>the</strong> pervasive use of diagonal routes in addition totraditional right-angle “Manhattan” routing. The XArchitecture can provide significant improvements inchip area, performance, power consumption and cost,by enabling designs with significantly less wirelengthand fewer vias (<strong>the</strong> connectors between wiring layers).Manhattan366 MHz50 hour battery lifeX-Architecture400MHz60 hour battery lifeThe Benefits of X-Architecture• 20+% Less interconnect• 30+% Fewer vias• 10% Performance Gain• 20% Power Reduction• 30% Cost SavingsPROFOUNDRYSUMMER 20065


Design News<strong>UMC</strong>’s Integrated DFM Solutions TargetToday’s 90nm and 65nm SoC Designers<strong>UMC</strong>’s comprehensive design-formanufacturing(DFM) package isnow even more robust forcustomers developing 90nm and65nm SoCs. The packageincorporates DFM elements intostandard-cell libraries, SPICEmodels and design flows to provideusers with yield-enhancingknowledge throughout <strong>the</strong> designand manufacturing stages.<strong>UMC</strong>’s DFM Value Service, a keypart of <strong>the</strong> DFM package, includesa comprehensive design-fordiagnosticplatform that enables<strong>UMC</strong> to test, map out and pinpointphysical failures on customers’chips quickly, without <strong>the</strong> extensiveand drawn-out process ofexchanging information back andforth between <strong>the</strong> foundry andDFM-Aware LithoModels & RulesDFM-Aware LibraryIP, SPICE model& Technology filesPre-TapeoutOPC/LRC SimulationPost-TapeoutPSM, OPC, LRCcustomer. Through this approach,engineering teams spend lesseffort on <strong>the</strong> diagnostic process soSyn<strong>the</strong>sis, DFT, DFDTiming AnalysisFloor-Planning, P&RNoise/Power/Delay AnalysisLayout & Final VerificationMask Data PreparationReticle ManufacturingLitho ProcessSilicon ProcessDFM-Aware Design MethodologyRTL,SimulationT/O GDSIIPost-RETGDSII<strong>the</strong>y can quickly enhance yields,gain faster time to market, andhave lower production costs.Impinj and d<strong>UMC</strong> CDeliliver rLogic NVM MCoreson 0.18u18um mand d0.13u13um Processes<strong>UMC</strong> and Impinj have aligned todeliver Impinj’s AEON family ofembedded nonvolatile memory(NVM) cores for <strong>UMC</strong>’s 0.18um and0.13um CMOS technologies.AEON NVM cores require noadditional masks or processingsteps for seamless integration into<strong>UMC</strong>’s processes, resulting inshortened time-to-market forcustomers incorporating AEONmemory into <strong>the</strong>ir SoC designs.Several large, high growthsemiconductor markets such asdisplay drivers, power managementcontrollers, RF ICs, and securemedia applications require newfeatures and functionality that drive<strong>the</strong> need for low bit-count embeddedNVM. By offering Impinj’s AEONproduct family with <strong>UMC</strong>’s standardlogic CMOS processing, fablesssemiconductor companies in <strong>the</strong>semarkets will benefit from silicon IPthat can be easily integrated into<strong>the</strong>ir designs using <strong>UMC</strong>’s processtechnologies.6 PROFOUNDRYSUMMER 2006


Design News<strong>UMC</strong>’s manufacturing teams collaborate closely withcustomer design teams to achieve <strong>the</strong> common goalof quick ramp up to high and stable yields for SoCdesigns. This means customers can get <strong>the</strong>ir SoCdesigns from <strong>the</strong> development stage to market quicklyand with greater cost efficiencies.<strong>UMC</strong>’s DFM Value Service includes:Post tapeout OPC and Lithography Rule Check(LRC)Metal dummy fillMetal slotting<strong>UMC</strong>’s proprietary Design for Diagnostics yieldramping service created so that customers’engineering teams can minimize <strong>the</strong>ir timerequired on <strong>the</strong> diagnostic process<strong>UMC</strong> also provides an optional DFM Premium serviceto those customers desiring to check <strong>the</strong>ir OPC/LRCresults prior to tapeout.DFM FeatureDouble-VIAInsertionLimitingStacked VIAsLOD EffectDFM CounselorDFM RecommendedRules/GuidelinesOPC GuidelinesComprehensive SPICEModelsLOD effectWPE effectMonte Carlo modelsApplication NotesL90 DFM design rulesL90 DFM designguidelinesAnalog design guidelinesDFM Counselor and ToolsEDAToolP&RP&RLVSDFM Counselor ToolsDRC/LVS/LPE RunsetsDFM Rules check inDRC decksWEE Effect in ParasiticsExtractionLOD Effect Parameters inExtractionP&R ScriptsDouble-VIA insertionLimiting <strong>the</strong> number ofstacked VIAsCadence Synopsys Mentor Magma(1)N/A (2)N/A (2)Customers seeking to utilize <strong>UMC</strong>’s integrated DFMsolutions should contact <strong>the</strong>ir account manager or goto <strong>the</strong> My<strong>UMC</strong> online supply chain customerinformation portal at www.umc.com.WPEWEEDFM RulesLVSLPEDRC1. Not P&R tool.2. Tool not offered by EDA vendor.EDA Tools Support for SoC FlowN/A (2)N/A (2)N/A (2)-- continued from page 6Key FeaturesZero mask adder for standard logic CMOS(3.3V I/O)Up to 100k write/erase cycles10-year retentionFully qualified and in production at industry leadingfoundriesFloating gate technology that scales to 90nm andbelowSelf-contained IP block requiring no external chargepumps or oscillatorsKey FeaturesBit counts from 64 bits to 8k bitsFully integrated IP block with all necessary highvoltage circuitryHigh density one-time programmable memoryRow/column addressable10-year data retentionMemory management to emulate multiple-timeprogrammabilityAdvanced test modesExtended temperature range (-40°C to +95°C)PROFOUNDRYSUMMER 20067


New CustomersFor new customer inquiries,please direct all questions tosales@umc.comHeadquarters:<strong>UMC</strong>No. 3, Li-Hsin 2nd Road,Science-Based Industrial Park,Hsinchu City, Taiwan, R.O.C.Tel: 886-3-578-2258Fax: 886-3-577-9392Email: foundry@umc.comIn USA:<strong>UMC</strong> USA488 De Guigne Drive,Sunnyvale, CA 94085, USATel: 1-408-523-7800Fax: 1-408-523-8166Email: sales@umc-usa.comIn Europe:<strong>UMC</strong> Europe BVWorld Trade Center, H-Tower,Schipholboulevard 2431118 BH Schiphol, The Ne<strong>the</strong>rlandsTel: 31-(0)20-5640950Fax: 31-(0)20-6977826Email:europe@umc.comIn Japan:<strong>UMC</strong> Japan7F, Niikura Bldg.,2-2, Kandatsukasa-Cho,Chiyoda-Ku, Tokyo,101-0048, JapanTel : 81-3-5294-2701Fax: 81-3-5294-2707Email: foundry@umcj.comDesign NewsSilicon Image to PortHDMI TM Receiver IP Core to<strong>UMC</strong>’s 90nm ProcessTechnologySilicon Image and <strong>UMC</strong> haveagreed to port to <strong>UMC</strong>’s 90nmprocess technology a High-Definition Multimedia Interface TM(HDMI TM ) receiver intellectualproperty (IP) core from SiliconImage. The agreement will enable<strong>UMC</strong>’s and Silicon Image’s mutualcustomers to license from SiliconImage an HDMI 1.1 receiver corethat is silicon-proven on <strong>UMC</strong>’smost advanced mainstreamproduction technology.“Digital TV System-on-Chip (SoC)designs are integrating HDMI andmoving to 90nm processes,” saidEric Almgren, VP of IntellectualProperty at Silicon Image. “Byoffering our first 90nm HDMIreceiver IP core on <strong>UMC</strong>’s process,we will enable HDTV SoCcompanies to integrate a provenHDMI core in a leading-edgeprocess.”HDMI has quickly emerged as <strong>the</strong>standard interface for connectinghigh-definition (HD) componentssuch as HDTVs, DVD players, settopboxes, digital cameras and A/Vreceivers. HDMI enables <strong>the</strong>transmission of premium digitalcontent over an uncompressed,secure digital video and audiointerface via a single cable with asmall, low-cost connector.In Singapore:Fab 12iNo. 3, Pasir Ris Drive 12,Singapore 519528Tel: +65-6213-0018Fax: +65-6213-0008ProFoundry is a publication of<strong>UMC</strong>. Please submit commentsand story ideas toprofoundry@umc.comProFoundry may be found onlineat <strong>the</strong> literature section of<strong>UMC</strong>’s website:www.umc.comPROFOUNDRYSUMMER 2006ISSUE 22

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