pic24fj128ga010 family - Microchip

PIC24FJ128GA010 FAMILYREGISTER 7-1:OSCCON: OSCILLATOR CONTROL REGISTER (CONTINUED)bit 5LOCK: PLL Lock Status bit1 = PLL module is in lock or PLL module start-up timer is satisfied0 = PLL module is out of lock, PLL start-up timer is running or PLL is disabledbit 4 Unimplemented: Read as ‘0’bit 3CF: Clock Fail Detect bit1 = FSCM has detected a clock failure0 = No clock failure has been detectedbit 2 Unimplemented: Read as ‘0’bit 1bit 0SOSCEN: 32 kHz Secondary Oscillator (SOSC) Enable bit1 = Enable secondary oscillator0 = Disable secondary oscillatorOSWEN: Oscillator Switch Enable bit1 = Initiate an oscillator switch to clock source specified by NOSC2:NOSC0 bits0 = Oscillator switch is completeNote 1: Reset values for these bits are determined by the FNOSC Configuration bits.2: Also resets to ‘0’ during any valid clock switch, or whenever a non-PLL Clock mode is selected.DS39747E-page 96© 2009 Microchip Technology Inc.