pic24fj128ga010 family - Microchip

PIC24FJ128GA010 FAMILYREGISTER 6-12: IEC2: INTERRUPT ENABLE CONTROL REGISTER 2U-0 U-0 R/W-0 U-0 U-0 U-0 R/W-0 U-0— — PMPIE — — — OC5IE —bit 15 bit 8R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0IC5IE IC4IE IC3IE — — — SPI2IE SPF2IEbit 7 bit 0Legend:R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknownbit 15-14 Unimplemented: Read as ‘0’bit 13 PMPIE: Parallel Master Port Interrupt Enable bit1 = Interrupt request enabled0 = Interrupt request not enabledbit 12-10 Unimplemented: Read as ‘0’bit 9OC5IE: Output Compare Channel 5 Interrupt Enable bit1 = Interrupt request enabled0 = Interrupt request not enabledbit 8 Unimplemented: Read as ‘0’bit 7IC5IE: Input Capture Channel 5 Interrupt Enable bit1 = Interrupt request enabled0 = Interrupt request not enabledbit 6IC4IE: Input Capture Channel 4 Interrupt Enable bit1 = Interrupt request enabled0 = Interrupt request not enabledbit 5IC3IE: Input Capture Channel 3 Interrupt Enable bit1 = Interrupt request enabled0 = Interrupt request not enabledbit 4-2 Unimplemented: Read as ‘0’bit 1SPI2IE: SPI2 Event Interrupt Enable bit1 = Interrupt request enabled0 = Interrupt request not enabledbit 0SPF2IE: SPI2 Fault Interrupt Enable bit1 = Interrupt request enabled0 = Interrupt request not enabled© 2009 Microchip Technology Inc. DS39747E-page 73