pic24fj128ga010 family - Microchip

PIC24FJ128GA010 FAMILY6.3 Interrupt Control and StatusRegistersThe PIC24FJ128GA010 family devices implement atotal of 28 registers for the interrupt controller:• INTCON1• INTCON2• IFS0 through IFS4• IEC0 through IEC4• IPC0 through IPC14, and IPC16Global interrupt control functions are controlled fromINTCON1 and INTCON2. INTCON1 contains the InterruptNesting Disable (NSTDIS) bit, as well as thecontrol and status flags for the processor trap sources.The INTCON2 register controls the external interruptrequest signal behavior and the use of the AlternateInterrupt Vector Table.The IFS registers maintain all of the interrupt requestflags. Each source of interrupt has a status bit which isset by the respective peripherals, or external signal,and is cleared via software.The IEC registers maintain all of the interrupt enablebits. These control bits are used to individually enableinterrupts from the peripherals or external signals.The IPC registers are used to set the interrupt prioritylevel for each source of interrupt. Each user interruptsource can be assigned to one of eight priority levels.The interrupt sources are assigned to the IFSx, IECxand IPCx registers in the same sequence that they arelisted in Table 6-2. For example, the INT0 (ExternalInterrupt 0) is shown as having a vector number and anatural order priority of 0. Thus, the INT0IF status bit isfound in IFS0, the enable bit in IEC0 and thepriority bits in the first position of IPC0 (IPC0).Although they are not specifically part of the interruptcontrol hardware, two of the CPU control registers containbits that control interrupt functionality. The CPUSTATUS register (SR) contains the IPL2:IPL0 bits(SR). These indicate the current CPU interruptpriority level. The user may change the current CPUpriority level by writing to the IPL bits.The CORCON register contains the IPL3 bit, whichtogether with IPL2:IPL0, also indicates the current CPUpriority level. IPL3 is a read-only bit so that trap eventscannot be masked by the user software.All Interrupt registers are described in Register 6-1through Register 6-30, in the following pages.DS39747E-page 62© 2009 Microchip Technology Inc.