pic24fj128ga010 family - Microchip

PIC24FJ128GA010 FAMILY5.0 RESETSNote:This data sheet summarizes the featuresof this group of PIC24F devices. It is notintended to be a comprehensive referencesource. Refer to Section 7. “Reset”(DS39712) in the “PIC24F FamilyReference Manual” for more information.The Reset module combines all Reset sources andcontrols the device Master Reset Signal, SYSRST. Thefollowing is a list of device Reset sources:• POR: Power-on Reset• MCLR: Pin Reset• SWR: RESET Instruction• WDT: Watchdog Timer Reset• BOR: Brown-out Reset• CM: Configuration Word Mismatch Reset• TRAPR: Trap Conflict Reset• IOPUWR: Illegal Opcode Reset• UWR: Uninitialized W Register ResetNote:All types of device Reset will set a corresponding statusbit in the RCON register to indicate the type of Reset(see Register 5-1). A POR will clear all bits except forthe BOR and POR bits (RCON), which are set.The user may set or clear any bit at any time duringcode execution. The RCON bits only serve as statusbits. Setting a particular Reset status bit in software willnot cause a device Reset to occur.The RCON register also has other bits associated withthe Watchdog Timer and device power-saving states.The function of these bits is discussed in other sectionsof this manual.Note:Refer to the specific peripheral or CPUsection of this manual for register Resetstates.The status bits in the RCON registershould be cleared after they are read sothat the next RCON register value after adevice Reset will be meaningful.A simplified block diagram of the Reset module isshown in Figure 5-1.Any active source of Reset will make the SYSRST signalactive. Many registers associated with the CPU andperipherals are forced to a known Reset state. Mostregisters are unaffected by a Reset; their status isunknown on POR and unchanged by all other Resets.FIGURE 5-1:RESET SYSTEM BLOCK DIAGRAMRESETInstructionGlitch FilterMCLRWDTModuleSleep or IdleVDDVDD RiseDetectPORSYSRSTBrown-outResetBOREnable Voltage RegulatorTrap ConflictIllegal OpcodeUninitialized W RegisterConfiguration Word Mismatch Reset© 2009 Microchip Technology Inc. DS39747E-page 53