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pic24fj128ga010 family - Microchip

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PIC24FJ128GA010 FAMILYREGISTER 20-1: AD1CON1: A/D CONTROL REGISTER 1R/W-0 U-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0ADON — ADSIDL — — — FORM1 FORM0bit 15 bit 8R/W-0 R/W-0 R/W-0 U-0 U-0 R/W-0 R/W-0, HCS R/C-0, HCSSSRC2 SSRC1 SSRC0 — — ASAM SAMP DONEbit 7 bit 0Legend: C = Clearable bit HCS = Hardware Clearable/Settable bitR = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknownbit 15 ADON: A/D Operating Mode bit1 = A/D Converter module is operating0 = A/D Converter is offbit 14 Unimplemented: Read as ‘0’bit 13 ADSIDL: Stop in Idle Mode bit1 = Discontinue module operation when device enters Idle mode0 = Continue module operation in Idle modebit 12-10 Unimplemented: Read as ‘0’bit 9-8FORM1:FORM0: Data Output Format bits11 = Signed fractional (sddd dddd dd00 0000)10 = Fractional (dddd dddd dd00 0000)01 = Signed integer (ssss sssd dddd dddd)00 = Integer (0000 00dd dddd dddd)bit 7-5 SSRC2:SSRC0: Conversion Trigger Source Select bits111 = Internal counter ends sampling and starts conversion (auto-convert)110 = Reserved10x = Reserved011 = Reserved010 = Timer3 compare ends sampling and starts conversion001 = Active transition on INT0 pin ends sampling and starts conversion000 = Clearing SAMP bit ends sampling and starts conversionbit 4-3 Unimplemented: Read as ‘0’bit 2bit 1bit 0ASAM: A/D Sample Auto-Start bit1 = Sampling begins immediately after last conversion completes. SAMP bit is auto-set.0 = Sampling begins when SAMP bit is setSAMP: A/D Sample Enable bit1 = A/D sample/hold amplifier is sampling input0 = A/D sample/hold amplifier is holdingDONE: A/D Conversion Status bit1 = A/D conversion is done0 = A/D conversion is NOT done© 2009 <strong>Microchip</strong> Technology Inc. DS39747E-page 175

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