pic24fj128ga010 family - Microchip

PIC24FJ128GA010 FAMILYREGISTER 18-3:ALCFGRPT: ALARM CONFIGURATION REGISTERR/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0bit 15 bit 8R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0ARPT7 ARPT6 ARPT5 ARPT4 ARPT3 ARPT2 ARPT1 ARPT0bit 7 bit 0Legend:R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknownbit 15bit 14bit 13-10bit 9-8bit 7-0ALRMEN: Alarm Enable bit1 = Alarm is enabled (cleared automatically after an alarm event whenever ARPT = 00 andCHIME = 0)0 = Alarm is disabledCHIME: Chime Enable bit1 = Chime is enabled; ARPT bits are allowed to roll over from 00h to FFh0 = Chime is disabled; ARPT bits stop once they reach 00hAMASK3:AMASK0: Alarm Mask Configuration bits0000 = Every half second0001 = Every second0010 = Every 10 seconds0011 = Every minute0100 = Every 10 minutes0101 = Every hour0110 = Once a day0111 = Once a week1000 = Once a month1001 = Once a year (except when configured for February 29th, once every 4 years)101x = Reserved – do not use11xx = Reserved – do not useALRMPTR1:ALRMPTR0: Alarm Value Register Window Pointer bitsPoints to the corresponding Alarm Value registers when reading ALRMVALH and ALRMVALL registers;the ALRMPTR value decrements on every read or write of ALRMVALH until it reaches ‘00’.ALRMVAL:00 =ALRMMIN01 =ALRMWD10 =ALRMMNTH11 = UnimplementedALRMVAL:00 = ALRMSEC01 =ALRMHR10 =ALRMDAY11 = UnimplementedARPT7:ARPT0: Alarm Repeat Counter Value bits11111111 = Alarm will repeat 255 more times...00000000 = Alarm will not repeatThe counter decrements on any alarm event. The counter is prevented from rolling over from 00h to FFhunless CHIME = 1.© 2009 Microchip Technology Inc. DS39747E-page 161