pic24fj128ga010 family - Microchip
pic24fj128ga010 family - Microchip
pic24fj128ga010 family - Microchip
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PIC24FJ128GA010 FAMILY16.2 Transmitting in 8-Bit Data Mode1. Set up the UART:a) Write appropriate values for data, parity andStop bits.b) Write appropriate baud rate value to theBRGx register.c) Set up transmit and receive interrupt enableand priority bits.2. Enable the UART.3. Set the UTXEN bit (causes a transmit interrupt).4. Write data byte to lower byte of TXxREG word.The value will be immediately transferred to theTransmit Shift Register (TSR), and the serial bitstream will start shifting out with next rising edgeof the baud clock.5. Alternately, the data byte may be transferredwhile UTXEN = 0, and then the user may setUTXEN. This will cause the serial bit stream tobegin immediately because the baud clock willstart from a cleared state.6. A transmit interrupt will be generated as perinterrupt control bit, UTXISELx.16.3 Transmitting in 9-Bit Data Mode1. Set up the UART (as described in Section 16.2“Transmitting in 8-Bit Data Mode”).2. Enable the UART.3. Set the UTXEN bit (causes a transmit interrupt).4. Write UxTXREG as a 16-bit value only.5. A word write to UxTXREG triggers the transferof the 9-bit data to the TSR. Serial bit stream willstart shifting out with the first rising edge of thebaud clock.6. A transmit interrupt will be generated as per thesetting of control bit, UTXISELx.16.4 Break and Sync TransmitSequenceThe following sequence will send a message frameheader made up of a Break, followed by an auto-baudSync byte.1. Configure the UART for the desired mode.2. Set UTXEN and UTXBRK – sets up the Breakcharacter,3. Load the UxTXREG with a dummy character toinitiate transmission (value is ignored).4. Write ‘55h’ to UxTXREG – loads Sync characterinto the transmit FIFO.5. After the Break has been sent, the UTXBRK bitis reset by hardware. The Sync character nowtransmits.16.5 Receiving in 8-Bit or 9-Bit DataMode1. Set up the UART (as described in Section 16.2“Transmitting in 8-Bit Data Mode”).2. Enable the UART.3. A receive interrupt will be generated when oneor more data characters have been received asper interrupt control bit, URXISELx.4. Read the OERR bit to determine if an overrunerror has occurred. The OERR bit must be resetin software.5. Read UxRXREG.The act of reading the UxRXREG character will movethe next character to the top of the receive FIFO,including a new set of PERR and FERR values.16.6 Operation of UxCTS and UxRTSControl PinsUARTx Clear to Send (UxCTS) and Request to Send(UxRTS) are the two hardware controlled pins that areassociated with the UART module. These two pinsallow the UART to operate in Simplex and Flow Controlmode. They are implemented to control the transmissionand reception between the Data TerminalEquipment (DTE). The UEN bits in the UxMODEregister configure these pins.16.7 Infrared SupportThe UART module provides two types of infrared UARTsupport: one is the IrDA clock output to support externalIrDA encoder and decoder device (legacy modulesupport) and the other is the full implementation of theIrDA encoder and decoder.16.8 External IrDA Support – IrDAClock OutputTo support external IrDA encoder and decoder devices,the BCLKx pin (same as the UxRTS pin) can beconfigured to generate the 16x baud clock. WithUEN = 11, the BCLKx pin will output the 16xbaud clock if the UART module is enabled. It can beused to support the IrDA codec chip.16.9 Built-in IrDA Encoder and DecoderThe UART has full implementation of the IrDA encoderand decoder as part of the UART module. The built-inIrDA encoder and decoder functionality is enabledusing the IREN bit UxMODE. When enabled(IREN = 1), the receive pin (UxRX) acts as the inputfrom the infrared receiver. The transmit pin (UxTX) actsas the output to the infrared transmitter.© 2009 <strong>Microchip</strong> Technology Inc. DS39747E-page 141