IC-910H Service manual.pdf - N3UJJ

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While in SSB mode, the amplified signals from the bufferamplifier (Q1651) are then applied to the balanced modulator(IC201).While in AM/FM mode, the amplified signals from the bufferamplifier (Q1651) are applied to the limiter amplifier(IC1651b) and splatter filter (IC1651a). The signals arepassed through the buffer amplifier ((IC1652a) and are thenapplied to the AM detector (IC1807d, D1652) in AM mode orto the varactor diode (D253) in FM mode.4-2-4 TRANSMIT IF AMPLIFIER CIRCUIT(MAIN UNIT)The modulated IF signal from a modulation circuit is appliedto the IF amplifier circuit (Q1). The amplified IF signal is thenapplied to the VHF/UHF transmit circuit (PA unit) via the VHF/UHF switching circuit (D52, D53).The gain of the IF amplifier circuit (Q1) is controlled by theALC amplifier circuit (IC1601b). Therefore, the IF amplifieris reduced when the output power increases.4-2-2 MODULATION CIRCUIT (MAIN UNIT)(1) FM modeThe amplified audio signals from IC1701 are pre-emphasizedand limited at IC1651b and then passed through thesplatter filter (IC1651a). The filtered signals are then appliedto the FM modulation circuit (D253) via the FM deviationlevel controller (IC1803 pins 21, 22) and buffer amplifier(IC1652a). Also, subaudible tone signals from the CPU(DISPLAY board; IC1 pin 4) are applied to the FM modulationcircuit (D253) via the splatter filter (IC1651a).The FM modulation circuit changes the generating frequencyof the FM local oscillator (Q254, X251) to generate an FMsignal. The modulated IF signal is passed through the RFlimiter (Q253) and then applied to the transmit IF amplifiercircuit.When 9600 bps mode is selected, audio signals from theACC connector bypass the amplifiers and are applied toIC1654a directly via the external modulation switch (IC1531,pins 12, 1). In such cases, the deviation detector (IC1807d)cuts off the audio line when over modulation is detected.(2) SSB and CW modesThe amplified audio signals from Q1651 are mixed with BFOsignals at the balanced mixer circuit (IC201) to produce a 10MHz IF signal. The mixed signal is still a DSB signal, therefore,the mixed signal passes through bandpass filter circuit(FI151) to suppress unwanted side band signals. The filteredsignal is applied to the transmit IF amplifier circuit• Transmit IF frequenciesMode Transmit IF signalUSB10.8485 MHzLSB10.8515 MHzCW10.8491 MHz4-2-3 CW KEYING CIRCUIT (MAIN UNIT)When the CW key is closed, control signal is output fromCPU (LOGIC unit) and controls break-in operation, the sidetone signal.Keying signals (DOT and DASH) from the [KEY] jack(J1401) are applied to the CPU (DISPLAY board; IC1, pins49, 48 respectively), and the CPU outputs a CW control signal(KDS1) from pin 21. The CW control signal is applied tothe balanced mixer (IC201) via Q201, D201, D207 to unbalancethe IC201 input bias voltage and creates a carrier signal.R202 determines the transmit delay timing.4-2-5 RF CIRCUIT (PA UNIT)The RF circuit consists of mixer and drive amplifiers toobtain the desired frequency and level needed at a PA circuit,respectively.(1) VHF bandThe IF signal from the MAIN unit (P501) is mixed with an LOsignal from the VHF VCO circuit (PLL unit; Q191,D191–D194) at the double-balanced mixer circuit (Q501,Q502, D502) to be converted into VHF transmit frequency.The mixed signal is passed through the attenuator(R512–R514) and two-stage tunable bandpass filter (D503,L533 and D504, L504) to suppress spurious components.The filtered signals are then amplified at the YGR amplifier(IC501) and passed through the attenuator (R562–R531)and another two-stage tunable bandpass filter (D641, L641and D642, L642)The amplified and filtered RF signal is applied to the driveamplifier circuit that is used VHF and UHF signals commonly.(2) UHF bandThe IF signal from the MAIN unit (P1) is mixed with a 2nd LOsignal at the double-balanced mixer circuit (Q1, Q2) to producea 2nd IF signal (71.25 MHz). The 2nd LO signal (60.4MHz) is generated at the reference oscillator and doublercircuit (PLL unit; X512, Q551) via LO amplifier (IC40). The2nd IF signal is amplified at the buffer amplifier (Q3) via thebandpass filter circuit (L3, L4, C12, C13, C15–C17, C24,C26). The amplified 2nd IF signal is applied to the 1st mixercircuit (D190, L190, L191) passing through the attenuator(R12–R14) and low-pass filter (L381, L382, C381–C383).The 1st mixer circuit (D190, L190, L191) converts the 2nd IFsignal into a UHF transmit frequency with a 1st LO signalfrom the UHF VCO circuit (PLL unit; Q391, D391–D394).The converted RF signal is passed through the bandpass filter(FI200 and FI201) where unwanted LO signal emissionis reduced. The filtered signal is attenuated at R204–R206and amplified at the YGR amplifier (IC200), and is thenapplied to the drive amplifier circuit via the band pass filter(FI202) and another YGR amplifier (Q200).4-2-6 DRIVE AMPLIFIER CIRCUIT (PA UNIT)The drive amplifier circuit amplifies RF signals from the VHFor UHF RF circuit to obtain a level needed at the poweramplifier circuit. One drive amplifier circuit is commonly usedfor both VHF and UHF band signals.The signals from the VHF or UHF RF circuit are amplified atthe drive amplifier circuit (Q101, Q121, Q131, DRV board;Q930). The amplified VHF signals are passed through the4 - 4From The N3UJJ.COM Document Library
low-pass filter and UHF signal are high-pass filter, and thenapplied to the VHF and UHF power amplifier circuit separately.4-2-7 POWER AMPLIFIER CIRCUIT (PA UNIT)The power amplifier circuit amplifies the RF signals to thespecified output power.(1) VHF power amplifier circuitThe RF signal from the low-pass filter circuit is applied to theVHF power amplifier circuit (Q651, Q652) to obtain a stable100 W of RF output power. The amplified RF signal isapplied to the antenna connector (CHASSIS; J1) via thepower detector (D720, D721), transmit/receive switchingrelay (RL700) and low-pass filter (L723–L721, C728–C726,C728) circuits.(2) UHF power amplifier circuitThe RF signal from the high-pass filter is applied to theUHF power amplifier circuit (Q151, Q152) to obtain a stable75 W of RF output power. The amplified RF signal isapplied to the antenna connector (CHASSIS; J2) via thetransmit/receive switching circuit (D182–D185), low-passfilter (L181, L180, C188–C184) and power detector (D180,D181) circuits.4-2-8 ALC CIRCUIT (PA AND MAIN UNITS)The ALC (Automatic Level Control) circuit protects thepower amplifiers (PA unit; Q651, Q652 for VHF and Q151,Q152 for UHF) from a mismatched output load. Also, theALC circuit controls the gain of the transmit IF amplifier inorder for the transceiver to output even when the suppliedvoltage shifts, etc.The RF power level is detected at the power detector circuit(PA unit; D720–D721 for VHF, D180, D181 for UHF) to beconverted into DC voltages. The detected voltage (VFOR forVHF or UFOR for UHF) is passed through the switchingdiode, and are then applied to the differential amplifier(MAIN unit; IC1601b) via the FOR line. A reference voltage(POCV) for IC1601b is controlled by the [RF PWR] controlto output reference voltages. The output voltage is appliedto the transmit IF amplifier circuit (MAIN unit; Q1) as an ALCsignal to control the amplifier gain.When the VFOR/UFOR voltage increased, the output fromthe differential amplifier will be decrease to reduce the IFamplifier gain. This adjusts the RF output power until theVFOR/UFOR and POCV voltage are well balanced.4-3 PLL CIRCUITSIC-910H contains 2 PLL circuits and 1 local oscillator. TheVHF and UHF PLL circuits adopt “Icom’s original I-loop PLL”to obtain very fast lock up times.4-3-1 VHF PLL CIRCUIT (PLL UNIT)The VHF PLL circuit generates the 1st LO frequency, andthe signal is applied to the VHF 1st mixer circuit in the PAunit as the “A1LO” signal. The PLL circuit consists of a VCO,prescaler and DDS circuits.The signal generated at the VHF VCO circuit (Q191,D191–D194) is amplified at the buffer amplifiers (Q192,Q272), then applied to the prescaler circuit (IC271). Theprescaler circuit divides the applied signal, and outputs it tothe VHF DDS circuit (IC131) via the buffer amplifier (Q271).The VHF DDS circuit generates digital signals using theapplied signals as a clock frequency. The phase detectorsection in IC131 compares its phase with the reference frequencythat is generated at the reference oscillator (X512).IC131 outputs off-phase components as pulse signals viapins 51, 52.The output pulses are converted into DC voltage at the loopfilter circuit (IC161a) and then applied to the VHF VCO circuit.The D/A converter (R101–R124), low-pass filter(L101–L103, C103–C110) and buffer amplifier (IC101) circuitsare connected to the DDS output to convert the digitaloscillated signals into smooth analog signals.4-3-2 UHF PLL CIRCUIT (PLL UNIT)The UHF PLL circuit generates the 1st LO frequency, andthe signal is applied to the UHF 1st mixer circuit in the PAunit as the “B1LO” signal. The PLL circuit consists of a VCO,prescaler and DDS circuits.The signal generated at the UHF VCO circuit (Q391,D391–D394) is amplified at the buffer amplifiers (Q392,Q472), then applied to the prescaler circuit (IC471). Theprescaler circuit divides the applied signal, and outputs it tothe UHF DDS circuit (IC331) via the buffer amplifier (Q471).The D/A converter (R301–R324), low-pass filter(L301–L303, C103–C311) and buffer amplifier (IC301) circuitsare connected to the DDS output to convert the digitaloscillated signals into smooth analog signals.4-2-9 APC CIRCUIT (MAIN UNIT)The APC (Automatic Power Control) circuit protects thepower amplifiers on the PA unit from excessive current.Current drain of power amplifiers is detected by voltagedrops at a resistor (PA unit; R305) between VCC and PAHVlines. The original voltage (ICH) and dropped voltage (ICL)are applied to the APC differential amplifier (MAIN unit;IC1601d).The signal output from the differential amplifier reduces IFamplifier gain until these voltages are well-balanced.4-4 UX-910 (1200 MHz BAND UNIT)UX-910 is an optional 1200 MHz band unit for IC-910H. Thisunit covers 1240–1300 MHz frequency range.4-4-1 ANTENNA SWITCHING CIRCUIT (for RX)Received signals from the antenna connector (CHASSIS;J501) are applied to the transmit/receive switching circuit(RL51).The transmit/receive switching circuit leads receive signal tothe RF circuit while receiving. However, the circuit leads thetransmit signal from the RF power amplifier to the antennaconnector while transmitting.4 - 5From The N3UJJ.COM Document Library
Page 1 and 2: SERVICEMANUALVHF/UHF ALL MODE TRANS
Page 3 and 4: TABLE OF CONTENTSSECTION 1SPECIFICA
Page 5 and 6: ■ RECEIVER• Receive system :VHF
Page 7 and 8: • PA UNITTX/RX switching relay(RL
Page 9 and 10: SECTION 3DISASSEMBLY AND OPTION INS
Page 11 and 12: • UT-102 VOICE SYNTHESIZER UNITq
Page 14 and 15: 4-1-6 10 MHz IF CIRCUIT (MAIN UNIT)
Page 18 and 19: The passed signals are then applied
Page 20 and 21: 5-2 PLL ADJUSTMENTSADJUSTMENT30.2 M
Page 22 and 23: 5-4 RECEIVER ADJUSTMENTSReceiver ad
Page 24 and 25: RECEIVER ADJUSTMENTS (continued)ADJ
Page 26 and 27: 5-5 TRANSMITTER ADJUSTMENTSADJUSTME
Page 28 and 29: TRANSMITTER ADJUSTMENTS (continued)
Page 30 and 31: 5-6 SOFTWARE ADJUSTMENTADJUSTMENT A
Page 32 and 33: SOFTWARE ADJUSTMENT (continued)ADJU
Page 34 and 35: SOFTWARE ADJUSTMENT (continued)ADJU
Page 36 and 37: 5-7 UX-910 ADJUSTMENTSADJUSTMENT2ND
Page 38 and 39: UX-910 ADJUSTMENTS (continued)ADJUS
Page 40 and 41: SECTION 6PARTS LIST6-1 IC-910[FRONT
Page 42 and 43: [DISPLAY BOARD]REFNO.ORDERNO.DESCRI
Page 44 and 45: [PLL UNIT]REF ORDERNO. NO.DESCRIPTI
Page 46 and 47: [PLL UNIT]REF ORDERNO. NO.DESCRIPTI
Page 48 and 49: [MAIN UNIT]REF ORDERNO. NO.DESCRIPT
Page 56 and 57: [PA UNIT]REFNO.ORDERNO.DESCRIPTIONI
Page 58 and 59: [PA UNIT]REF ORDERNO. NO.DESCRIPTIO
Page 64 and 65: 6-2 UX-910[MAIN UNIT]REFNO.ORDERNO.
Page 66 and 67:
[MAIN UNIT] — UX-910REF ORDERNO.
Page 68 and 69:
[MAIN UNIT] — UX-910REF ORDERNO.
Page 70 and 71:
SECTION 7MECHANICAL PARTS[FRONT UNI
Page 72 and 73:
MP34 (CH)MP34 (CH)MP12 (CH)MP1851 (
Page 74 and 75:
SECTION 8SEMI-CONDUCTOR INFORMATION
Page 76 and 77:
• DIODES1SS301 1SS355 1SS375-TL 1
Page 78 and 79:
• BOTTOM VIEW (RIT BOARD)• BOTT
Page 80 and 81:
• BOTTOM VIEW (VARISTOR-A BOARD)
Page 82 and 83:
• BOTTOM VIEW (DISPLAY BOARD)J10
Page 84 and 85:
• BOTTOM VIEW (PA UNIT)64133 416F
Page 86 and 87:
• BOTTOM VIEW (PLL UNIT)R341MP11F
Page 88 and 89:
6105171• BOTTOM VIEW (MAIN UNIT)6
Page 90 and 91:
• BOTTOM VIEW (UX-910 MAIN UNIT)0
Page 92 and 93:
10-2 PA AND PLL UNITStoMAINUNITGHVR
Page 94 and 95:
11 - 1SECTION 11WIRING DIAGRAM1 2 J
Page 96 and 97:
12-2 PLL UNITto DISPLAYboard J9CP7L
Page 98 and 99:
12-4 PA UNIT (2)toUX-910W305P1to MA
Page 100 and 101:
12-6 MAIN UNIT (2)12-7 MAIN UNIT (3
Page 102 and 103:
12 - 812-9 UX-910 MAIN UNIT (2)CHAS
Page 104:
lcom Inc.1-1-32, Kamiminami, Hirano
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