Power.org Q1 2010 Newsletter -4
Power.org Q1 2010 Newsletter -4
Power.org Q1 2010 Newsletter -4
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<strong>Power</strong>.<strong>org</strong> <strong>Q1</strong> <strong>2010</strong> <strong>Newsletter</strong><br />
Member companies referenced in <strong>Q1</strong> <strong>Newsletter</strong><br />
AppliedMicro, Cadence, Denali Software, e2v, ENEA, Ericsson, EVE, Freescale, GDA Technologies, Green <br />
Hills, IBM, Lauterbach, LSI, Synopsys, Virage Logic, Virtutech, Wind River and XGI <br />
In This Issue<br />
… An updated <strong>Power</strong> Architecture® Silicon Roadmap is now available<br />
… <strong>Power</strong> Architecture Differentiation, SoC and ecosystems offerings were the focus of new collaterals and <br />
event presentations available for download <br />
… <strong>Power</strong>.<strong>org</strong> and 10 member companies shared their technology and solutions in business, demo and <br />
ecosystem special presentations at DesignCon <strong>2010</strong><br />
… Members in the news -‐ positioning of new products/systems covering Security Appliance, Multicore SBC, <br />
computation-‐intensive, mission critical applications and the world fastest supercomputer based on <strong>Power</strong> <br />
Architecture<br />
… Market Growth Trends -‐ among the topics are Mobile Data Growth/Network Congestion, Market Growth <br />
in Switching, Optical Networking and China’s Automotive <br />
… Technology Update Corner – among the topics are Technology to Improve Chip Reliability, Savings With <br />
Open-‐source Software, New Solar Plane and <strong>Power</strong> Architecture® technology proven reliability, processing <br />
accuracy and software enablement in Mars Rover Lander that is getting smarter with age<br />
… A guest editorial contribution:<br />
• EDN Executive Editor Ron Wilson writes about “Medium and Message in The Age of Tweets”<br />
... Special feature articles<br />
• Freescale QorIQ P2020 UTM/Security Appliance Solution<br />
• ENEA Multicore -‐ High performance packet processing enabled with a hybrid SMP/AMP OS <br />
technology <br />
• IBM New POWER7 Systems To Manage Increasingly Data-‐Intensive Services<br />
… Check the latest in media update, upcoming industry and member events <br />
1
!<br />
<strong>Power</strong>.<strong>org</strong> <strong>Q1</strong> <strong>2010</strong> <strong>Newsletter</strong><br />
o Board of Directors Update 3<br />
o <strong>Power</strong> Architecture Resources And Events Update 3<br />
o Members In The News 8<br />
o Market Growth And Technology Update 10<br />
o Guest Editorial Contribution - EDN 13<br />
o Special Feature Articles - Products/Applications/Solutions 14<br />
o Media Update 20<br />
o Future Events 24<br />
o Useful Links 26<br />
o Contribution and Comments 26<br />
2
Board of Directors Update<br />
The Board recently approved an updated <strong>Power</strong> Architecture silicon roadmap. <strong>Power</strong> Architecture technology <br />
underlines many well-‐known, market-‐leading chip families, including the Cell Broadband Engine from IBM, Sony <br />
and Toshiba; the QorIQ and <strong>Power</strong>QUICC processors and automotive controller lines of Systems on a Chip (SoCs) <br />
from Freescale; IBM <strong>Power</strong>PC 4xx including the recent announcements of the 476; POWERx including the recent <br />
announcement of POWER7 server chips from IBM; full featured Virtex FPGAs from Xilinx and hybrid processing <br />
devices. Capitalizing on market leadership in diverse markets, <strong>Power</strong>.<strong>org</strong> member companies have established a <br />
strong silicon roadmap, backed by major R&D investments, to address the future requirements of high-‐performance <br />
systems and applications. The roadmap is now available on <strong>Power</strong>.<strong>org</strong> web site http://www.power.<strong>org</strong>/resources/<br />
devcorner/roadmap<br />
The Board also approved taxonomy to be used in highlighting the rich set of <strong>Power</strong> Architecture ecosystem partners. <br />
Taxonomy is provided in the link to <strong>Power</strong> Architecture silicon roadmap.<br />
The board welcomed ENEA as a new member in March.<br />
The Board continues to encourage members in their usage of the brand.<br />
<strong>Power</strong> Architecture Resources And Events Update<br />
Resources: Whitepapers/Articles/Video Clips/Publications<br />
Events: DescignCon<strong>2010</strong><br />
<strong>Power</strong>.<strong>org</strong> <strong>Power</strong> Architecture Resources<br />
White Papers/Articles<br />
Highlights of <strong>Power</strong> Architecture® Technology Differentiation<br />
With a powerful instruction set, multicore capabilities, virtualization and best-‐in-‐class ecosystem, <strong>Power</strong> <br />
Architecture® technology is a stand-‐out. <br />
<strong>Power</strong> Architecture processing technology is the common thread for a very broad range of devices, from 32-‐bit <br />
micro-‐controllers to 64-‐bit ASICs. A ubiquitous architecture, more than a billion <strong>Power</strong> Architecture technology-based<br />
chips have been built into electronics equipment since 1991.<br />
<strong>Power</strong>.<strong>org</strong> and its members further advanced <strong>Power</strong> Archi-‐tecture technology, completing a number of vital <br />
initiatives including <strong>Power</strong> ISA standards, hypervisor, virtualization and energy management, enabling the highest <br />
performing processors and cores for the server and embedded space. <br />
Advancements in the <strong>Power</strong> Architecture technology con-‐tinue to provide designers and developers with scalability, <br />
reliability and blexibility needed in their diverse markets. Moving forward, <strong>Power</strong> Architecture technology’s focus on <br />
energy management, multicore/virtualization, SoC platforms and software development environments will enable <br />
<strong>Power</strong> Architecture technology to continue to be a ubiquitous architecture in the industry, helping drive many new <br />
and exciting applications. [eecatalog.com/multicore]<br />
Nextgen Multicore/Accelerators SoC Platform debined by ITRS<br />
Internet everywhere, IP everywhere and seamless mobility are key macro trends that will continue drive more <br />
complexity in the design of systems to meet the requirements of next generation systems and support new classes of <br />
applications and services. This in turn calls for software-‐based multi-‐core/Accelerator SoC platform. In addition, as <br />
technologies and structures push the limits of Moore's law and productivity, new semiconductor approaches to <br />
scaling and new functionality on-‐ and off-‐chip will be required. This paper provides an overview of recent work <br />
done at ITRS – International Technology Roadmap for Semiconductor<br />
3
examining 15-‐year assessment of semiconductor technology requirements and debines MC/Accelerator SoC <br />
Platform. [<strong>Power</strong>.<strong>org</strong>]<br />
2009 <strong>Power</strong> Architecture Advancement in Technology and Market Share<br />
In 2009, <strong>Power</strong>.<strong>org</strong> and its members advanced <strong>Power</strong> Architecture technology, completing a number of vital <br />
initiatives including <strong>Power</strong> ISA standards, hypervisor, virtualization and energy management, enabling the highest <br />
performing processors and cores for the server and embedded space. Additionally, <strong>Power</strong> Architecture licensing, <br />
SoC, multicore platforms, full system virtualized development, software operating systems, debugging, veribication, <br />
IP tools, and applications continued to steer substantial advances in home networking, consumer gaming, wireless <br />
LTE systems, enterprise switching, routing and storage, printers, and high performance computing. [<strong>Power</strong>.<strong>org</strong>]<br />
Whitepaper -‐ What is New in the Server Environment of <strong>Power</strong> ISA v2.06?<br />
Additions and Enhancements to the <strong>Power</strong> ISA v2.06 extend the advantages of the <strong>Power</strong> Architecture ranging from <br />
performance, blexibility, and RAS to energy efbiciency. Vector-‐Scalar Extension (VSX) – a major addition in v2.06 -‐ <br />
extends the edge <strong>Power</strong> ISA has in HPC and computation-‐intensive workloads. <strong>Power</strong> ISA v2.06 continues to provide <br />
enhancements to the server space such as memory management, processor version compatibility features, cache <br />
management, etc and also introduces a number of capabilities for the embedded space such as embedded <br />
hypervisor, energy management, multi-‐core and multi-‐threading. This white paper highlights the major changes and <br />
their merits. The focus is on the Server ISA. [<strong>Power</strong>.<strong>org</strong>]<br />
For details, please visit http://www.power.<strong>org</strong>/resources/downloads/ <br />
<strong>Power</strong>.<strong>org</strong> Collateral Contribution to IEC <strong>Newsletter</strong>s<br />
<strong>Power</strong>.<strong>org</strong> was an associate Sponsor with IEC – International Engineering Consortium for DesignCon<strong>2010</strong> and <br />
continued with members promoting advancement of <strong>Power</strong> Architecture technology and support of SoC to <br />
accelerate time-‐to-‐market products and ecosystem solutions. <strong>Power</strong>.<strong>org</strong> started collaboration with IEC prior to <br />
DesignCon and continued afterwards in contributing technical content to IEC newsletters with distribution to over <br />
65,000.<br />
What’s New in the Server Environment of <strong>Power</strong> ISA v2.06?<br />
http://www.designcon.com/newsletter/april_1/index.html<br />
Hypervisors Thrive with <strong>Power</strong> Architecture<br />
http://www.designcon.com/newsletter/january_1/index.html<br />
<strong>Power</strong> Architecture ISA 2.06 Stride N Prefetch Engines to Boast Application’s Performance<br />
http://www.designcon.com/newsletter/december_1/december1_2009.html<br />
<strong>Power</strong>.<strong>org</strong> Chinese web site<br />
• <strong>Power</strong>.<strong>org</strong> Chinese version (www.power.<strong>org</strong>/cn ) is currently in operations and serves Chinese-‐based <br />
communities with information, initiatives, and updates<br />
<strong>Power</strong> Twitter site <br />
• <strong>Power</strong>.<strong>org</strong> Twitter has been up and running for a few months. <br />
Visit www.twitter.com/power<strong>org</strong> <br />
<strong>Power</strong> Architecture micro site<br />
• <strong>Power</strong> Architecture micro site (www.eecatalgue.com/powerarchitecture ) focusing on electronic content of <br />
<strong>Power</strong> Architecture magazine, e-‐content and related news. Currently sponsored by IBM and Freescale. If <br />
you wish to participate in <strong>2010</strong>, please contact fawzi@power.<strong>org</strong> <br />
4
<strong>Power</strong>.<strong>org</strong> Q4 Key Events<br />
DesignCon <strong>2010</strong><br />
February 1-‐4, <strong>2010</strong>, Santa Clara Convention Center, Santa Clara, CA<br />
<strong>2010</strong> <strong>Power</strong>.<strong>org</strong> and members participation at DesignCon<strong>2010</strong><br />
A BIG THANK YOU to 10 member companies AppliedMicro, <br />
CoWare, Denali Software, EVE, Freescale, GDA Technologies, <br />
IBM, Virage Logic, Virtutech and XGI for their participation and <br />
making this event a great success!<br />
DesignCon<strong>2010</strong> was a great opportunity to promote the brand, bringing value to the <br />
designers/developers through sharing SoC advancement by member companies, <br />
demonstrating <strong>Power</strong> Architecture technology advancement, presenting ecosystem <br />
solutions and continue building relationships with media and analysts.<br />
<strong>Power</strong>.<strong>org</strong> and 10 member companies participated in four key functions:<br />
• <strong>Power</strong>.<strong>org</strong> Business Panel, BF-W3, Feb. 3, 2:00 pm <br />
- 3:30 pm, Ballroom H<br />
SoC Architecture, Standards and Tools Speed <br />
Application-‐driven Ecosystem Solution <br />
Development<br />
Presentation and discussions by AppliedMicro, <br />
Freescale, GDA Technologies, IBM, Virage Logic <br />
and Virtutech. Moderated by <strong>Power</strong>.<strong>org</strong><br />
• <strong>Power</strong> Architecture Technology and Solutions <br />
Showcase, Feb. 2-3, 12:30 pm - 6:30 pm, Booth <br />
#737<br />
AppliedMicro, Freescale, GDA Technologies and <br />
Virtutech demonstrated <strong>Power</strong> Architecture <br />
advanced technology and offerings of products/<br />
solutions<br />
• <strong>Power</strong> Architecture Ecosystem Day, Feb. 4, 8:30 am - <br />
3:00 pm, Great America #1<br />
Technology and Product Solution Offerings<br />
Presentations by: CoWare, Denali Software, EVE, <br />
Freescale, GDA Technologies, IBM, <strong>Power</strong>.<strong>org</strong>, <br />
Virage Logic, Virtutech, XGI<br />
• Media/Analyst Relationship Feb. 2-4, Press Room and <br />
Booth<br />
<strong>Power</strong>.<strong>org</strong> and member companies’ engagement <br />
with the media/analysts<br />
5
Presentations are now available on <strong>Power</strong>.<strong>org</strong> web site http://www.power.<strong>org</strong>/events/designcon10<br />
for public download. Presentations include Business Panel segment and Ecosystem Day as shown below:<br />
<strong>Power</strong>.<strong>org</strong> Business Panel, BF-W3, Feb. 3, 2:00 pm - 3:30 pm, Ballroom H<br />
SoC Architecture, Standards and Tools Speed Application-‐driven Ecosystem Solution Development<br />
6
<strong>Power</strong> Architecture Ecosystem Day, Feb. 4, 8:30 am - 3:00 pm, Great America #1<br />
Technology and Product Solution Offerings<br />
7
Members In The News<br />
EVE <br />
EVE ZeBu’s <strong>Q1</strong> market traction resulted into multiple design wins<br />
EVE demonstrate ZeBu at key events in <strong>Q1</strong>, <strong>2010</strong> including Electronic Design and Solution Fair Jan. 28-‐29, Japan, <br />
DesignCon<strong>2010</strong> Feb.2-‐3, Calif., DVCon Feb. 23-‐24, Calif., ECEDHA Conference Mar. 15, FLA, and at Synopsys Users <br />
Group Mar. 20, Calif.<br />
EVE’s ZeBu-‐server was named Finalist in EDN’s 20 th Annual Innovation Awards Competition and gained design <br />
wins from LG Electronics to accelerate validation of multiple-‐media designs, by Shanghai Jiao Tong University to be <br />
used in design complex SoC for multimedia, communications and navigation applications and by Konica Minolta to <br />
accelerate validation of image processing LSI designs.<br />
Among other activities, EVE conducted a webinar in February on ZeBu server, sponsored the 18 th ACM/SIGDA Feb. <br />
21-‐23, Calif. As part of its university Connections program and is sponsor of 5 th Annual Workshop on Architectural <br />
Research Prototyping to take place on Jun. 19 in Saint-‐Malo, France.<br />
For more details check Media update section of this issue of newsletter and visit EVE’s web site www.eve-team.com<br />
Freescale <br />
UTM Security Appliance based on <strong>Power</strong> Architecture(r) technology take scalability, performance and <br />
energy ef\iciency to new levels<br />
Manufacturers of security appliance equipment will soon have a highly scalable suite of turnkey solutions from <br />
Freescale Semiconductor, thanks to strong market acceptance from top ODMs, board manufacturers and <br />
independent software vendors. The solutions are designed to help OEMs quickly and cost effectively create a range <br />
of security applications including unibied threat management (UTM) appliances, secured routers, IPS/IDS <br />
appliances, VPN routers, secured switches and business gateways. Designed to deliver outstanding performance-to-‐price<br />
ratios and dramatically shorten development cycles, the solutions tightly integrate optimized low-‐level <br />
software and production-‐ready boards with Freescale's VortiQa application software and multicore <strong>Power</strong>QUICC <br />
and QorIQ processors. For details click on http://investors.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1396362&highlight=UTM<br />
Emerson Network <strong>Power</strong> and Freescale Semiconductor collaborate on <strong>Power</strong><br />
Architecture(r) technology for small form factor boards<br />
Emerson Network <strong>Power</strong>, a business of Emerson and the global leader in enabling Business-‐Critical Continuity, <br />
and Freescale Semiconductor, a global leader in the design and manufacture of embedded semiconductors, today <br />
announced a collaborative effort to deploy Freescale multicore QorIQ processors on modular single-‐board <br />
computers (SBCs) based on the COM Express(r) small form factor. For details click on http://<br />
investors.freescale.com/phoenix.zhtml?c=196520&p=irol-‐newsArticle&ID=1397231&highlight=SBC<br />
IBM <br />
IBM Unveils New POWER7 Systems To Manage Increasingly Data-Intensive Services<br />
Newly announced POWER7 systems from IBM demonstrate the essential role of <strong>Power</strong> Architecture <br />
Technology in computation-intensive, mission critical applications.<br />
In February, IBM announced new POWER7 systems designed to manage the most demanding emerging <br />
applications, ranging from smart electrical grids to real-‐time analytics for binancial markets. The new systems <br />
incorporate a number of industry-‐unique technologies for the specialized demands of new applications and <br />
services that rely on processing an enormous number of concurrent transactions and data while analyzing that <br />
information in real time.<br />
8
The announcement by IBM of its POWER7 systems reinforces the <strong>Power</strong> Architecture® technology's leadership <br />
in supporting the development of ground-‐breaking solutions that set new standards in price/performance, energy <br />
efbiciency and virtualization, and emphasize the technology's role as an indispensable building block for the world's <br />
most demanding applications.<br />
For details click on http://www.power.<strong>org</strong>/news/pr/view?<br />
item_key=bf6f79271724d8ef4bedd9b021db3ba1402d9a4e<br />
And http://www.power.<strong>org</strong>/news/pr/view?item_key=8ee4f8212335562fd61b3c2c1b575dcb7f9f01c2<br />
IBM Blue Waters Supercomputer – the world fastest based on <strong>Power</strong> Architecture<br />
IBM will release a radical new chip next year that will go into a University of Illinois supercomputer in a quest to <br />
build what may become the world's fastest supercomputer. Part of the National Center for Supercomputing <br />
Applications (NCSA) at the University of Illinois, it will be the largest publicly accessible supercomputer in the world <br />
when it's turned on sometime in 2011.<br />
Blue Waters will be able to theoretically hook together <br />
16,384 <strong>Power</strong>7 chips-‐-‐referred to as "nodes"-‐-‐for a total <br />
theoretical performance of 16 petablops, though IBM said <br />
that, at least initially, the theoretical peak performance <br />
will likely be closer to 10 petablops, about 10 times as fast <br />
as the fastest supercomputer today. (A petablop is 1 <br />
quadrillion bloating point operations per second, a key <br />
indicator of supercomputer performance.)<br />
Artist rendering of University of Illinois center that will house IBM's Blue Waters supercomputer<br />
(Source: University of Illinois)<br />
In Blue Waters, the transfer rate between nodes is a game changer. The transfer of data between any two nodes in <br />
the system is at the full rate of 192GB per second—peak with latency on the order of less than one microsecond.<br />
This kind of performance is crucial for big companies and governments alike. "Companies [including] Boeing, GM, <br />
and Ford, use these systems heavily. Most of the crash tests are now done on these machines. And weather <br />
prediction-‐-‐a large percentage is done on this platform. More specialized government-‐centric applications include <br />
simulations of how to properly dispose of nuclear waste.<br />
Source: CNET<br />
XGI<br />
XGI’s G6 is currently sampling<br />
XGI Technology is currently sampling production <br />
versions of our highly capable 2D graphics controller <br />
and high debinition video decoder called the Volari TM <br />
G6. The G6 supports H.264 and MPEG-‐1/2 decoding as <br />
well as high resolutions on up to two independent <br />
displays with built-‐in LVDS, DAC, and blexible dual-‐<br />
DVO which can connect to TMDS, HDMI, DisplayPort <br />
and other interfaces. Volari TM G6 operates on a variety <br />
of platforms, most notably <strong>Power</strong> Architecture, and sits <br />
on either a PCIe or PCI bus. Together with XGI’s <br />
extended product life cycle, this is the ideal choice for <br />
your long-‐life designs. <br />
9
For details please visit: <br />
http://www.xgitech.com/products/products_2.asp?P=29 <br />
for more G6 details. Let the Volari TM G6 display your content and user interface while keeping your CPU focused on <br />
system management and communications.<br />
XGI will be at Computex Taiwan in June 1-‐5, <strong>2010</strong> with our latest 3D product. Come visit us and learn more.<br />
Market Growth And Technology Update<br />
Mobile data growth and network congestion<br />
Mobile Data Traf\ic Growth<br />
Mobile data trafbic is growing rapidly. European mobile operators bid large sums for 3G licenses in 2000 on the <br />
back of extremely aggressive mobile data growth assumptions. Ever since then, operators have been eagerly <br />
predicting/awaiting mobile data growth, with relatively underutilized 3G networks. Mobile broadband via the USB <br />
modem and iPhone were the answers along with unmetered mobile data pricing plans. These have driven <br />
100-‐400% CAGR trafbic growth over the past two years, and now mobile data makes up 75-‐90% of total mobile <br />
trafbic. Signibicantly, we see the potential for mobile data trafbic to increase further materially from current levels <br />
with new products and services – up to a 1,000% increase.<br />
Network Congestion<br />
Network congestion is becoming an issue – and not limited to the radio network. The rapid growth in mobile data <br />
is clearly causing problems (opportunities!) in some mobile networks. Relatively few operators are complaining <br />
about radio congestion in the same way, but exponential trafbic growth is causing material congestion in both the <br />
backhaul and signaling networks (growth markets!). The increase in smartphone usage has seen a dramatic and <br />
unforeseen rise in the number of data sessions, with greater than 10x the normal number of session attempts <br />
relative to voice-‐only handsets.<br />
Source: Feedback from Mobile World Congress/Barclays Capital<br />
Fixed & Modular Switching Market Growth <br />
During the strong economic years from 2004-‐2008, the Switching market grew very close to 10% per year for all 4 <br />
years following 22% growth in 2004 itself as the market bounced back from the recession following the bubble <br />
years. It is estimated that the market will bounce back strongly in <strong>2010</strong>, coincidentally growing 18% back to $18B, <br />
followed by 8% average growth from <strong>2010</strong>-‐2013. In 2008 and 2009 the bixed market had grown to 21% and 34% <br />
larger than the modular market respectively. The ongoing trend is toward bixed switches.<br />
Source: Lanexa/M<strong>org</strong>an Stanley<br />
Optical industry is returning to growth as a result of cyclical drivers, increasing traf\ic, <br />
and the 40G product cycle<br />
The tone at the conference was upbeat, as companies are seeing sustained improvement in demand for optical <br />
networking products coming out of the recession. This is largely driven by cyclical demand following a year of <br />
signibicant under-‐investment, with industry sales down 10% in 2009 despite increasing trafbic. In addition, the 40G <br />
product cycle is gaining momentum, as 10G equipment in many networks is now 10 years old.<br />
Source: Feedback from OFC/NFOEC Optical Networking Conference<br />
China’s Automotive Outlook<br />
China’s economy grew by 11.7% in the birst quarter of <strong>2010</strong>, after growing by more than 10.5% in the fourth <br />
quarter of 2009. By contrast, Chinese automakers sales through the birst quarter of <strong>2010</strong> are up by roughly 70% <br />
over the year ago period, continuing a surprisingly brisk pace that began to accelerate in September 2009. Light <br />
vehicle sales, passenger vehicles and commercial vehicles under 6-‐ton GVW, totaled 4.4 million units in the January <br />
to March period, including 2.9 million passenger vehicles.<br />
10
According to J.D. <strong>Power</strong>, the numbers, when adjusted for seasonal variations, suggest full year <strong>2010</strong> for passenger <br />
vehicles to grow by 10% and light commercial vehicles to grow by 16% for the full year. In total, we expect China’s <br />
light vehicle demand to reach 14.5 million units in <strong>2010</strong>. The market of China’s automotive industry will continue to <br />
develop as the largest and arguably most important in the world.<br />
Source: JD <strong>Power</strong><br />
IBM, EU team up to improve chip reliability<br />
IBM announced in February that it's teaming up with companies and <br />
universities from the European Union to improve the reliability and <br />
efbiciency of semiconductor chips. By creating a new type of <br />
technology to better test microchips for blaws, the parties involved <br />
hope to cut the time and cost required to create each chip.<br />
Joining forces to create an EU-‐funded <strong>org</strong>anization called the <br />
Diamond consortium, IBM and the other major players plan to <br />
develop a more orderly and integrated approach to check for bugs in a <br />
chip. The goal of the new system will be to track down and correct <br />
errors on all levels, from the initial design of the chip to the binal silicon layout.<br />
Currently, around 70 percent of the effort in designing a chip is devoted to debugging, said IBM. Most of that effort is <br />
geared toward binding the source of the fault and correcting it. Soft errors are particularly hard to handle and <br />
difbicult to predict. Soft errors are temporary blaws that creep in due to external factors, such as the effects of cosmic <br />
radiation, a growing problem especially as chips get smaller and their densities increase.<br />
The new technology should be better able to predict soft errors by using improved and dedicated detection <br />
methods, noted IBM, which could cut the time needed to bix these specibic blaws by 23 percent.<br />
Finding and correcting blaws in a chip is expected to cost manufacturers $34.5 million per chip this year. The <br />
Diamond group is hoping to slash the overall time spent on debugging by 50 percent, potentially cutting a chip's <br />
design costs by $17.25 million. As a result, the time required to design a chip and launch it to the market should fall <br />
as well.<br />
Source: CNET<br />
Freescale among Genivi Group promotes savings with open-source software<br />
For about a year, a group of heavyweight automotive and technology companies has been working on a way to <br />
hasten development of in-‐vehicle entertainment systems. Their solution: share basic software development using <br />
the open-‐source Linux operating system. Among the nearly 50 members of the group, called the Genivi Alliance, are <br />
automakers General Motors, BMW AG, Nissan Motor, and, as of February 17, Renault SA. Suppliers include Visteon, <br />
Delphi Automotive, and Continental AG. The Genivi (pronounced jah-‐NEE-‐vee) Alliance is focusing on developing <br />
"middleware"-‐-‐the layer of software that allows various kinds of information and entertainment applications to <br />
work together in the car. Middleware controls such functions as encoding audio and video signals and managing <br />
power use. Freescale is among the members of Genivi, an alliance of companies promoting open-‐source software as <br />
a way to save time and money when developing automotive infotainment systems.<br />
Source: Automotive News<br />
New solar plane takes maiden voyage<br />
A plane designed to bly day and night using solar power has successfully taken its <br />
birst maiden blight.<br />
The Solar Impulse HB-‐SIA soared into the air for its birst blight early Wednesday <br />
from its home in Switzerland. After a smooth takeoff, the plane climbed to an <br />
altitude of 1,200 meters (3,937 feet or three-‐quarters of a mile) and stayed aloft for <br />
a total of 87 minutes. Pilot Markus Scherdel used the blight to run the Impulse <br />
through different exercises and maneuvers to see how it would handle itself.<br />
11
The Solar Impulse HB-SIA is designed to bly without the need for fuel. Though its wingspan is as wide as that of <br />
a Boeing 747, the plane weighs only around 1.7 tons. The 12,000 solar panels on its wing collect energy from the <br />
sun to drive its four electric motors and charge the plane's lithium polymer batteries, allowing it to bly at night. <br />
Though the plane will ultimately use solar power for an upcoming blight this year, the maiden blight relied solely on <br />
the batteries, which were powered up beforehand in the hangar. The Solar Impulse's birst ofbicial blight followed a <br />
successful test \light in December, which was labeled more of a "blea hop" since the plane only traveled 3.2 feet <br />
off the ground for a distance of 1,148 feet. Next on the plane's itinerary will be further test blights, each one <br />
increasing the distance and duration that it stays in the air. The birst day-‐and-‐night blight is scheduled for this <br />
summer to see if the Impulse can remain aloft for 36 hours operating on just solar power and batteries. Grander <br />
ambitions lie ahead for 2012 with a blight that will navigate around the world in bive hops over the course of four to <br />
six days.<br />
Source: CNET<br />
Mars Rover gets smarter with age...and software<br />
<strong>Power</strong> Architecture® technology proven reliability, processing accuracy and software enablement<br />
Celebrating its seventh year investigating the surface of the Red Planet, Opportunity is now able to make its own <br />
choices about which rocks it should investigate further and which ones it should leave alone, according to NASA <br />
Report. Thanks to a new software upload, Opportunity's computer can analyze the photos taken with its wide-angle<br />
camera and isolate rocks that meet specibic criteria. It can then determine whether specibic rocks are worthy <br />
of close-‐up shots through its narrow-‐angle, color-‐biltered camera. The new software called Autonomous <br />
Exploration for Gathering Increased Science, or AEGIS for short, helps speed up the pace at which Opportunity can <br />
do its job. Previously, the vehicle's wide-‐angle photos would have <br />
to be sent back to Earth, where NASA staff would determine which <br />
rocks deserved a closer look. In the meantime, Opportunity would <br />
have gone along on its merry way in search of new targets to snap. <br />
The birst photos taken by Opportunity after its software upgrade <br />
showed a rock about as large as a football apparently thrown onto <br />
the surface after an object had dug a large crater, said NASA. After <br />
reviewing a wide-‐angle photo taken of this area at an earlier date, <br />
Opportunity decided to zero in on this one rock out of more than <br />
50 others based on the instructions NASA had given it to look for <br />
something large and dark.<br />
The onboard computer is based on <strong>Power</strong> <br />
Architecture® technology (<strong>Power</strong>PC processor from <br />
IBM) that helps with power management, image <br />
processing, motor control, instrument management <br />
and handles navigation. The rover has six <br />
navigation cameras arranged in three pairs. The <br />
computer processes stereo images from the <br />
camera pairs. It uses binocular vision algorithms, <br />
and it can identify the distance to and size of the <br />
different rocks in the bield of view. Using this <br />
information, the computer can build a map of all <br />
the nearby obstacles and then maneuver the <br />
rover to avoid them when it is moving. Thus, <br />
<strong>Power</strong> Architecture technology continues to <br />
prove its longevity, reliability, processing <br />
accuracy, data integrity, handling of complex <br />
operations and enablement of advancement and <br />
value add software.<br />
Sources: CNET, Wikipedia<br />
12
Guest Editorial Contribution - EDN<br />
Medium and message in the age of tweets<br />
Getting beyond slogans to understand technical communications in the new-media world<br />
by Ron Wilson, Executive Editor, EDN<br />
The foundation of an <strong>org</strong>anization like <strong>Power</strong>.<strong>org</strong> is promoting <strong>Power</strong> Architecture technology and ecosystem <br />
through sharing technical information to <strong>Power</strong> Architecture community and encourage collaboration which breed <br />
innovation. This article provides some insights as to the type of channels that are shown to be more effective in <br />
communicating information than others providing some tips to communicate technical information.<br />
Today, there are many competing channels for communicating with technical people: Blogs, Web sites, Facebook, <br />
Twitter, iPad apps—all of these have strident partisans who will tell you that their favorite is the only way to reach <br />
an audience. And yet there is a growing backlash of working professionals who argue that their working style still <br />
depends on books and journals. You don't have time to use every available medium to share information with the <br />
rest of the <strong>org</strong>anization—so what do you choose?<br />
There is a middle ground—a way of looking at media choices based on something more useful than devotion to, or <br />
suspicion of, the new. This approach is based on the obvious: our minds treat an object within our visual bield <br />
differently from the way they treat an object we only remember. For example a page of text under our eyes serves <br />
as a mnemonic: it puts all the meanings we attach to the text, all the associations we made with it, at our bingertips. <br />
But if we turn the page, we have only our memory of what is on that sheet. For most of us, the memory only <br />
contains the highlights: a few words, maybe some key phrases, the drift of an argument, and the general sense of <br />
an illustration. We remember the Cliff Notes version of the page.<br />
This is an important distinction. For example, consider reading an entertaining story. If the piece is well-‐<strong>org</strong>anized, <br />
when we are reading a page, all we really need in order to understand this page is our own experience plus our <br />
Cliff-‐Notes version of the preceding pages. But contrast an article full of detailed discussion that refers back to a <br />
complicated diagram. We will need to refer back to previous pages, or forward to the notes or to an index. In cases <br />
when we are analyzing instead of just browsing, we may copy or tear out key pages and spread the whole works <br />
out on our desk.<br />
The underlying principle here is that we need to have in our visual bield or in our memory the information we need <br />
in order to understand the new stuff we see in front of us. The more complex and interrelated the material, the <br />
more of it we need to have physically in front of us.<br />
Of course this observation has implications for the medium that carries the information. An aphorism is well-served<br />
in a fortune cookie. A novel works well in a book, or for that matter, in a scroll. A battle plan needs to be <br />
spread out across a table or a wall-‐sized display.<br />
The same line of reasoning applies to electronic media. A short factual statement works beautifully in a tweet or <br />
text message. A description or statement, as long as it bits on one screen, works as an electronic document, whether <br />
viewed on smartphone, e-‐reader, or monitor.<br />
The key issue is that with electronic media, the visual bield is only the screen in front of you. The ability to scroll or <br />
search makes little difference—you still see only what is in front of you, and must depend on your short-‐term <br />
memory for the rest. Exactly how you get back to the page on which you think you remember seeing the formula <br />
the author just referred to doesn't matter-‐-‐unless the searching process is so complex that you lose your train of <br />
thought. This explains the frustration we have all had at trying to read a document on a display, binally just clicking <br />
the PRINT button.<br />
13
Despite all the computing power behind the screen—scan, search, hypertext, whatever—reading from a display <br />
is an inherently serial task, like reading from a scroll. All of the tools and metaphors we have developed to make <br />
the task less serial have not succeeded in making a screen as accessible as a book, which is an inherently indexed-sequential<br />
data set, let alone as purely random-‐access as a project spread out across a desk. Just as in data <br />
processing, the task must determine the bile access method.<br />
Consequently the content that works well in electronic media is linear, moving from beginning to end. It is material <br />
for which all the information you need to understand the screen in front of you is either right there on that screen, <br />
or is easy for you to remember from previous screens.<br />
Obviously not all documents that are acceptable on a large monitor will make sense on an iPhone. Not all papers <br />
that you can study in a journal will be worth the endless scrolling back and forth on a notebook computer.<br />
So when you wish to communicate ideas to other people, you should select the medium based on the size and <br />
interrelatedness of its contents. Conversely, when you know your audience will be using a particular medium, <br />
structure your message and writing style to bit the visual bield of the reader. A little forethought can untangle the <br />
Gordian knot of new and old media, and help you communicate your information more effectively. <strong>Power</strong>.<strong>org</strong> and <br />
member companies continue to make use of variety of channels to communicate technical content and sets a good <br />
example of selecting effective medium bringing message to a target audience.<br />
Special Feature Articles - Products/Applications/Solutions<br />
Freescale QorIQ P2020 UTM/Security Appliance Solution<br />
Networking security solutions<br />
Freescale’s UTM and security appliance solution exemplibies our solutions-‐centric approach by bringing together <br />
all three elements needed for the development of a complete UTM security appliance: processors, software and an <br />
ecosystem of hardware and software partners, providing our customers a complete solution to deliver <br />
differentiated products to market. This solution brings together our QorIQ processor family, our VortiQa software <br />
optimized for performance delivered with the help of our hardware ODM partners for the best performance at the <br />
lowest power levels and most cost-‐effective bill of materials (BOM). <br />
The Freescale QorIQ P2020-‐based UTM appliance enables ODMs and customers to develop a production-‐ready, <br />
BOM optimized, certibied, off-‐the-‐shelf UTM appliance solution. It allows our customers to leverage high <br />
performance multicore QorIQ silicon and VortiQa software optimized for multicore for UTM security appliances. <br />
Freescale’s UTM appliance solution has been adopted by lead ODMs who offer commercial off-‐the-‐shelf appliances. <br />
Our hardware and ODM partner ecosystem is intended to deliver extended support to our customers in hardware <br />
engineering, turn-‐key manufacturing and fulbillment, and pre-‐built hardware manufacturing, among other services <br />
and products. Off-‐the-‐shelf UTM appliances from major ODMs are FCC, UL and CE certibied and ready to ship, <br />
enabling customers to focus on differentiated value-‐added services and leveraging the performance offered by <br />
multicore processors. Our solution provides customers with access to low-‐power, high performance multicore <br />
processors that deliver improved margins with minimal integration and development costs.<br />
Key Bene\its:<br />
Accelerate Time to Revenue <br />
Demonstrate time to market with fully integrated security and networking functionality that allows you to simply <br />
develop with no impact to schedule. Accelerate time to revenue by reaching new markets faster.<br />
Bend the Cost-‐Performance Curve <br />
Achieve multiple performance enhancements by leveraging our solutions-‐centric approach at similar price levels <br />
of current generation appliances. Tap into the expertise of Freescale’s ecosystem partners to customize and <br />
optimize your solution. <br />
14
Create an Extensive UTM Appliance Roadmap<br />
Using our multicore QorIQ processors running VortiQa software, showcase scalable performance at industry <br />
leading performance to power ratios<br />
For details visit http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=RDAPLSO&fsrch=1<br />
15
ENEA Multicore - High performance packet processing enabled with a hybrid SMP/<br />
AMP OS technology<br />
The ongoing convergence between the telecom and datacom domain creates extreme requirements on the nodes <br />
in the networks to handle very high bandwidth IP trafbic. In most cases, network trafbic processing can be divided <br />
in two major categories: <br />
• Slow path processing: This involves network protocol control signaling to conbigure and establish the data <br />
paths and to terminate packets in higher protocol layers that uses the socket interface.<br />
• Fast path processing: This involves IP forwarding and other kinds of intermediate processing of the actual <br />
data packets such as NAT, security, etc. Minimal overhead is critical since the I/O bandwidth is paramount <br />
and the CPU cycle budget for software execution is limited.<br />
The fast path area is the focus of this article. In particular, we wish to examine it’s implementation with the new <br />
multicore . processors available today and the challenges these processor architectures bring to the software side <br />
of the equation. <br />
Multicore Operating System Models<br />
There are essentially three common operating system (OS) architecture approaches employed in multicore today. <br />
There is Symmetric Multi-‐Processing (SMP), where there is essentially a single, shared OS along with its <br />
resources, for applications on all cores. There are Asymmetric Multi-‐Processing (AMP) models where each core is <br />
running its own complete, isolated OS and applications are more loosely coupled, and there is a simplistic, single <br />
threaded, “run to completion” control loop approach common with silicon vendor executives designed to run <br />
functions like packet processing at “Bare Metal” speeds. <br />
The Enea OSE Multicore Edition (MCE) is a new RTOS architecture specibically designed for high-‐performance <br />
multicore applications in the data plane, and its unique asymmetric design combines all the advantages of the <br />
SMP, AMP and Bare Metal models, without suffering the disadvantages. Before examining more closely this <br />
innovative architecture, some background on the 20+ year-‐old design of the classic OSE RTOS is helpful. <br />
Architecture Overview<br />
Enea OSE is a truly distributed, micro-‐kernel based operating system that uses a message based programming <br />
model that provides application location transparency depicted in Figure 1.<br />
The OSE architecture is a very modular and scalable one, <br />
consisting of a robust set of run-‐time components running <br />
on top of a micro-‐kernel. System builds can range from being <br />
a small, simple kernel layer that can act as a hypervisor or a <br />
simple executive for “run-‐to-‐completion” applications, up to <br />
a full RTOS supporting POSIX bile systems, SMP threading <br />
and IP networking.<br />
Fig. 1 The OSE Micro Kernel Architecture<br />
The OSE kernel design is based on the exchange of messages, with a simple set of APIs, between processes and <br />
this mechanism for inter process communication (IPC) is the foundation of the OSE programming model. OSE also <br />
provides an addressing model that enables application scalability, making it possible to let a system run on a <br />
single processor node or several nodes in a distributed cluster without changing the programming code. When <br />
processors are physically divided, the IPC protocol Enea® LINX implements a message passing back plane that is <br />
adaptable for different media. For this reason, OSE users have never had to think about the transition from <br />
unicore to multicore designs.<br />
16
Enea OSE Multicore Edition: The innovative asymmetric, hybrid kernel technology <br />
The fundamental concept of the OSE MCE architecture is <br />
depicted in Figure 2. The essential idea is for shared, common <br />
services like memory manager, bile system, loader, slow path IP, <br />
to be available to all cores, in an SMP-‐like manner, but “worker” <br />
cores can execute their own scheduler, interrupt handing and <br />
local functions at maximum speed, using lightweight “kernel <br />
event” messages to transact shared services. <br />
Fig. 2 The Hybrid SMP/AMP Kernel technology<br />
The key benebit of the OSE MCE hybrid model, is that it creates a new multicore-‐aware level of CPU and device <br />
abstraction, which puts applications designed with this in mind, “closer” to the actual hardware and minimizes <br />
overhead. This is the primary difference between our approach and the classic SMP model, which creates a higher <br />
level of abstraction, buts adds unacceptable I/O overhead and whose scalability deteriorates quickly after a small <br />
number of cores.<br />
Enea OSE MCE delivers SMP benebits of simplicity, blexibility, application transparency, and error tracing, and AMP <br />
benebits of scalability, determinism and performance. The performance level is the same as it would be if using <br />
each core on its own, offering linear scalability. Further, since the OSE application framework allows a thread to <br />
access I/O devices and memory in supervisor mode, we can create a sandboxed design that essentially achieves <br />
bare-‐metal model performance. In such a design, the packets can be processed without involving the operating <br />
system at all, except for the dispatching of user-‐ installed interrupts and yield points. Altogether this allows for <br />
maximizing CPU resources for processing packets and minimizing unwanted overhead. <br />
Linux as control layer OS and Enea OSE as “fast path” application framework <br />
The Enea OSE product family contains a robust set of platform software components with sufbicient O&M <br />
functionality to offer complete support for control and data plane functions. But for a variety of other reasons, it <br />
may be desired to conbigure Linux in the control function on the mutlicore device. For such cases, Enea offers the <br />
Enea Hypervisor, which can support a full Linux <br />
programming environment with the addition of a <br />
scalable and high-‐performance (bare metal) Execution <br />
Environment on the data-‐plane cores that is easy to <br />
manage and debug. <br />
Figure 3 illustrates how the network stack on the Linux <br />
side controls and delegates the IP layer 2 and 3 packet <br />
processing to the data plane side using protocols over <br />
LINX, which has been ported to Linux, and how “slow-path”<br />
packets are sent to the stack on the Linux side <br />
using virtual Ethernet drivers.<br />
Fig. 3 Linux and the Hypervisor Layer based on OSE<br />
The Enea Hypervisor product delivers the advantages of a sandboxed supervisor execution domain for the Linux <br />
applications, while offering a feature-‐rich data plane programming model without the hypervisor domain <br />
overhead. Further, developers enjoy full visibility of data plane with support for full debug, tracing and <br />
performance probiling. The Enea Hypervisor has been initially developed for the Freescale Semiconductor QorIQ <br />
family and Enea is active in the Hypervisor subcommittee in <strong>Power</strong>.<strong>org</strong>.<br />
17
Conclusion<br />
The innovative multicore processors available today and rolling out in the near future, offer tremendous utility <br />
and optimization for delivering the IP bandwidth required for the ever exploding demand, but the software <br />
challenge to fully leverage these devices and make the scalability and performance a reality is formidable. Enea’s <br />
OSE® Multicore Edition demonstrates a new hybrid SMP/AMP RTOS architecture, providing a homogeneous, <br />
scalable and portable application framework for high-‐speed packet processing applications within the data-‐ and <br />
connectivity layer, while at the same time being a feature-‐rich SMP RTOS for networking control protocols. The <br />
OSE Multicore Edition design offers linear performance scalability for multicore devices with up to 16 cores and is <br />
designed to scale well beyond.<br />
Full details are available in the Whitepaper on the subject at <br />
http://www.enea.com/templates/Extension____7919.aspx<br />
IBM New POWER7 Systems To Manage Increasingly Data-Intensive Services<br />
Unprecedented Scale for Emerging Industry Business Models, from Smart Electrical Grids to Real-time <br />
Analytics<br />
Early February, IBM announced new POWER7 systems designed to manage the most demanding emerging <br />
applications, ranging from smart electrical grids to real-‐time analytics for binancial markets. The new systems <br />
incorporate a number of industry-‐unique technologies for the specialized demands of new applications and <br />
services that rely on processing an enormous number of concurrent transactions and data while analyzing that <br />
information in real time.<br />
In addition, the new systems enable clients to manage current applications and services at less cost with <br />
technology breakthroughs in virtualization, energy savings, more cost-‐efbicient use of memory, and better price <br />
performance. <br />
Four New <strong>Power</strong> Systems-‐-‐The new systems and management software include: <br />
IBM <strong>Power</strong>® 780, a new category of scalable, high-‐end servers, featuring an advanced modular design with up to <br />
64 POWER7 "cores," or CPUs, and the new TurboCore workload optimizing mode. TurboCore can deliver up to <br />
two-‐times the performance per core of POWER6 processor-‐based systems, providing excellent ROI for <br />
applications with high per-‐core performance requirements, such as managing and analyzing transactions from a <br />
smart electrical grid.<br />
IBM <strong>Power</strong> 770, a modular enterprise system with up to 64 POWER7 cores, featuring higher performance per <br />
core than POWER6 processors and using up to 70 percent less energy for the same number of cores as the IBM <br />
<strong>Power</strong> 570. <br />
IBM <strong>Power</strong> 755, a high-‐performance computing cluster node with 32 POWER7 cores, Energy Star qualibied for <br />
energy efbiciency, and optimized for the most challenging analytic workloads.<br />
IBM <strong>Power</strong> 750 Express, an Energy Star qualibied business server for mid-‐market clients offering four times the <br />
processing capacity of its predecessor, the IBM <strong>Power</strong> 550 Express, in the same energy envelope and 10 times the <br />
performance of a comparable HP Integrity rx6600. The <strong>Power</strong> 750 is three times more energy efbicient than the <br />
Sun SPARC Enterprise T5440, Sun's self-‐proclaimed "Coolthreads"server.<br />
18
IBM POWER7 Systems Family Quick Reference Guide<br />
Notes:<br />
1. The <strong>Power</strong> 780 processor card (one per node) has 16 POWER7 processor cores. If run in optional TurboCore <br />
mode at 4.1 GHz, only half the cores are available.<br />
2. The 8 GB (2 x 4 GB) memory feature on <strong>Power</strong> 750 Express and <strong>Power</strong> 755 is planned for availability March 16, <br />
<strong>2010</strong>.<br />
3. The 128 GB (4 x 32 GB) memory feature on <strong>Power</strong> 770 and <strong>Power</strong> 780 is planned for availability November 19, <br />
<strong>2010</strong>.<br />
4. Maximum memory capacity on <strong>Power</strong> 770 and <strong>Power</strong> 780 is 1 TB at 1066 MHz and 2 TB at 800 MHz.<br />
5. IBM Statement of Direction to increase the maximum number of Micro-‐Partitions to 320 on the <strong>Power</strong> 750 <br />
server and to 640 on <strong>Power</strong> 770 and 780 servers.<br />
6. IBM is working with Red Hat on POWER7 support. Red Hat plans to support the <strong>Power</strong> 750, 755, 770, and 780 <br />
models in an upcoming release targeted for availability during the 1st half of <strong>2010</strong>. For additional questions on <br />
the availability of this release, please contact Red Hat.<br />
For details visit IBM website http://www-‐03.ibm.com/press/us/en/pressrelease/29315.wss<br />
19
Media Update<br />
Member Press Releases<br />
Konica Minolta Adopts EVE's ZeBu Emulation Platform to Dramatically Accelerate <br />
Validation of Image Processing LSI Designs<br />
ZeBu Selected For Superior Performance, Ease of Adoption<br />
Konica Minolta Technology Center, Inc., of Tokyo, Japan, has selected EVE ZeBu (for <br />
Zero Bugs) hardware-‐assisted veribication platform for the design of its high-speed,<br />
high-‐performance large-‐scale integrated circuits (LSIs) used in image <br />
processing. ZeBu was chosen after an evaluation of cost-‐effective, commercially <br />
available emulation platforms that could accelerate simulation of Konica Minolta's <br />
iImage Processing LSI designs.<br />
EVE to Exhibit at SNUG San Jose Designer Community Expo<br />
Discussions Planned on ZeBu-Server Emulation System's Scalability, <br />
Affordability, Usefulness for SoC Hardware VeriQication, Software Development<br />
EVE will exhibit at the Synopsys Users Group (SNUG) San Jose Designer <br />
Community Expo to be held Tuesday, March 30, from 4:15-‐7:30 p.m. at the Santa <br />
Clara Convention Center.<br />
EVE representatives will be available to discuss the ZeBu emulation system's <br />
features, including fast compile time, a catalog of virtual intellectual property and <br />
Smart Debug methodology, its environmentally friendly footprint and its multiple <br />
concurrent user capabilities. Scalable and affordable, ZeBu-‐Server can be used for <br />
system-‐on-‐chip (SoC) hardware veribication and software development to shorten <br />
time to tapeout, improve product quality and eliminate costly respins.<br />
EVE to Exhibit at Electrical and Computer Engineering<br />
Attendees Will Learn about unEVErsity Connections Program, BeneQits of <br />
Emulation Platform for Hardware VeriQication/Software Development in <br />
Course Curriculum<br />
EVE will exhibit at the Electrical and Computer Engineering Department Heads <br />
Association (ECEDHA) Conference March 15 in Clearwater Beach, Fla.<br />
ECEDHA participants will learn about EVE's unEVErsity Connections Program that <br />
offers universities access to its advanced veribication technologies and <br />
methodologies for course curriculum. EVE's ZeBu (Zero Bugs) emulation <br />
platforms are used for system-‐on-‐chip (SoC) hardware veribication and software <br />
development to shorten time to tapeout, improve product quality and eliminate <br />
costly respins.<br />
EVE's ZeBu-‐Server Named Finalist in EDN's 20th Annual Innovation Awards <br />
Competition<br />
EVE announced that ZeBu-‐Server, a scalable and affordable emulation system, has <br />
been selected from hundreds of nominations to be a binalist for this year's EDN <br />
Innovation Awards.<br />
31 Mar <strong>2010</strong><br />
23 Mar <strong>2010</strong><br />
10 Mar <strong>2010</strong><br />
22 Feb <strong>2010</strong><br />
Instituted in 1990, the Innovation Awards honor the people, products, and <br />
technologies that have shaped the semiconductor industry over the past year. <br />
ZeBu-‐Server was selected for the electronic design automation (EDA): Front-‐End <br />
Simulation and Database Tools category. This year's list of binalists features 32 <br />
categories and more than 120 products that shipped in volume in the 2009 <br />
calendar year.<br />
20
EVE to Offer Continuous Demonstrations of ZeBu-‐Server at DVCon <strong>2010</strong><br />
Will Showcase Zebu-Server's Usefulness for all SoC VeriQication Needs across <br />
Development Cycle<br />
EVE will offer demonstrations of ZeBu-‐Server, its scalable and affordable <br />
emulation system, in Booth #902 at DVCon February 23-‐24 at the DoubleTree <br />
Hotel in San Jose, Calif. Demonstrations will showcase ZeBu-‐Server's usefulness <br />
for all system-‐on-‐chip (SoC) veribication needs across the entire development <br />
cycle, from hardware veribication, hardware/software integration to embedded <br />
software validation. ZeBu-‐Server's unique features will be highlighted, including <br />
fast compile time, a catalog of virtual intellectual property and Smart Debug <br />
methodology, its environmentally friendly footprint and ability to serve multiple <br />
concurrent users.<br />
EVE Named Sponsor of International Symposium on Field-‐Programmable Gate <br />
Arrays (FPGA <strong>2010</strong>)<br />
EVE's unEVErsity Connections Program Manager to Attend to Discuss <br />
University Relations Program<br />
EVE will sponsor the 18th ACM/SIGDA International Symposium on Field-‐<br />
Programmable Gate Arrays (FPGA <strong>2010</strong>) February 21-‐23 in Monterey, Calif., as <br />
part of its unEVErsity Connections Program. Sandra Larrabee, manager of the <br />
program, will be available to discuss EVE's program that provides schools access <br />
to its advanced veribication technologies and methodologies.<br />
EVE to Sponsor 5th Annual Workshop on Architectural Research Prototyping<br />
Submissions from Computer Architecture Community on Prototyping, <br />
Emulation, Modeling Efforts Accepted Through April 16<br />
EVE announced that it will sponsor the 5th Annual Workshop on Architectural <br />
Research Prototyping (WARP) to be held June 19 in Saint-‐Malo, France. It will be <br />
collocated with the ACM IEEE International Symposium Computer Architecture <br />
(ISCA).<br />
<strong>Power</strong> Architecture® Technology Positioned as the Premier Solution for High-performance<br />
Applications<br />
Newly announced POWER7 systems from IBM demonstrate the essential role of <br />
<strong>Power</strong> Architecture Technology in computation-intensive, mission critical <br />
applications.<br />
The recent announcement by IBM of its POWER7 systems reinforces the <strong>Power</strong> <br />
Architecture® technology's leadership in supporting the development of ground-breaking<br />
solutions that set new standards in price/performance, energy efbiciency <br />
and virtualization, and emphasize the technology's role as an indispensable <br />
building block for the world's most demanding applications.<br />
The launch of the new POWER7 systems from IBM underscores the importance of <br />
<strong>Power</strong> Architecture technology in business critical applications that support and <br />
drive innovation and business in the global economy. The new POWER7 systems <br />
represent a signibicant milestone for both the technology and the collaborative <br />
innovation facilitated by <strong>Power</strong>.<strong>org</strong>.<br />
18 Feb <strong>2010</strong><br />
16 Feb <strong>2010</strong><br />
15 Feb <strong>2010</strong><br />
10 Feb <strong>2010</strong><br />
21
EVE to Offer Webinar February 18 to Introduce Latest, Most <strong>Power</strong>ful Emulation <br />
System<br />
"ZeBu-Server: One System, InQinite VeriQication Possibilities"<br />
EVE will host a webinar on ZeBu-‐Server, its latest and most powerful emulation <br />
system, and offer examples of how it can be used in multiple modes of emulation <br />
and acceleration for multiple applications. Attendees will learn how ZeBu-‐Server <br />
can be used for all system-‐on-‐chip (SoC) veribication needs across the entire <br />
development cycle, from hardware veribication and hardware/software integration <br />
to embedded software validation.<br />
IBM Unveils New POWER7 Systems To Manage Increasingly Data-‐Intensive <br />
Services<br />
Unprecedented Scale for Emerging Industry Business Models, from Smart <br />
Electrical Grids to Real-time Analytics<br />
IBM announced new POWER7 systems designed to manage the most demanding <br />
emerging applications, ranging from smart electrical grids to real-‐time analytics <br />
for binancial markets. The new systems incorporate a number of industry-‐unique <br />
technologies for the specialized demands of new applications and services that <br />
rely on processing an enormous number of concurrent transactions and data while <br />
analyzing that information in real time.<br />
In addition, the new systems enable clients to manage current applications and <br />
services at less cost with technology breakthroughs in virtualization, energy <br />
savings, more cost-‐efbicient use of memory, and better price performance.<br />
Shanghai Jiao Tong University IC&System Research Center Purchases Hardware/<br />
Software Co-‐Veribication Platform through EVE University Program<br />
To be Used in Design Complex SoCs for Multimedia, Communications, <br />
Navigation Applications<br />
IC&System Research Center at Shanghai Jiao Tong University (SJTU) of China has <br />
purchased its ZeBu emulation platform through the EVE university program <br />
known as unEVErsity Connections Program.<br />
As the leading university in microelectronics in Shanghai, SJTU has been at the <br />
forefront of educating technical experts in the area of microelectronics. The <br />
IC&System Research Center of SJTU is dedicated to system-‐on-‐chip (SoC) Design <br />
and research and development for multimedia processing, communication and <br />
navigation technologies. It cooperates with industries and works with the <br />
government of China to develop SoC designs compliant with the national standard. <br />
It also provides design services to electronic companies in need of embedded <br />
intellectual property (IP), high-‐speed emulation and simulation expertise.<br />
EVE to Present ZeBu-‐Server at DesignCon <strong>2010</strong><br />
Continuous Demonstrations will Highlight Emulator's Unique Features<br />
EVE will exhibit in Booth #815 at DesignCon <strong>2010</strong> February 2-‐3 at the Santa Clara <br />
Convention Center in Santa Clara, Calif. Continuous demonstrations of ZeBu-‐Server <br />
will highlight its usefulness for all system-‐on-‐chip (SoC) veribication needs across <br />
the entire development cycle, from hardware veribication, hardware/software <br />
integration to embedded software validation.<br />
09 Feb <strong>2010</strong><br />
08 Feb <strong>2010</strong><br />
02 Feb <strong>2010</strong><br />
27 Jan <strong>2010</strong><br />
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LG Electronics Chooses EVE's ZeBu Emulation Platform to Dramatically Accelerate <br />
Validation of Multi-‐Media Designs<br />
ZeBu Selected for Superior Performance, Ease of Adoption, Cost Effectiveness<br />
LG Electronics, Inc. has adopted the ZeBu emulation platform from EVE for the <br />
veribication of its high-‐performance, mass-‐market consumer products.<br />
ZeBu-‐XXL was chosen after a thorough evaluation for its ease of use and cost <br />
effectiveness, critical considerations for achieving thorough testing of multi-million<br />
gate designs. According to LG Electronics, ZeBu offers superior <br />
performance in transaction-‐based co-‐emulation, reaching bive megahertz (MHz) <br />
on 10-‐million application specibic integrated circuit (ASIC)-‐equivalent gate <br />
designs.<br />
<strong>Power</strong>.<strong>org</strong> Drives Initiatives to Extend Growth and Increase <strong>Power</strong> Architecture® <br />
Technology Globally<br />
<strong>Power</strong>.<strong>org</strong> members collaborate to advance technology innovation and drive <br />
leadership in diverse segments of the embedded and server markets.<br />
<strong>Power</strong>.<strong>org</strong>, the <strong>org</strong>anization that promotes and develops standards for <strong>Power</strong> <br />
Architecture® technology, announced that 2009 marked a year of growth fueled <br />
by a renewed vision and mission that successfully promoted <strong>Power</strong> Architecture <br />
technology globally, accelerated collaborative innovation and steered the <br />
<strong>org</strong>anization through technology, market, and economic changes.<br />
26 Jan <strong>2010</strong><br />
26 Jan <strong>2010</strong><br />
<strong>Power</strong> Architecture technology, which continues to deliver signibicant, competitive <br />
advantages, expanded its leadership as the preferred technology across a wide <br />
range of ecosystems solutions. <strong>Power</strong>.<strong>org</strong>, collaboratively with its members and <br />
the developer community are poised to embrace the exciting new challenges and <br />
technical innovations that will mark <strong>2010</strong> and speed the delivery of products that <br />
improve the way people live, work and play.<br />
EVE to Demonstrate ZeBu-‐Server at EDSFair <strong>2010</strong><br />
Daily Presentations will Highlight Emulator's Unique Features<br />
EVE will exhibit at the Electronic Design and Solution Fair (EDSFair <strong>2010</strong>) January <br />
28-‐29 at the Pacibico Yokohama in Kanagawa, Japan.<br />
Listed as Nihon EVE K.K. (Booth #401), EVE will demonstrate ZeBu-‐Server's <br />
usefulness for all system-‐on-‐chip (SoC) veribication needs across the entire <br />
development cycle, from hardware veribication, hardware/software integration to <br />
embedded software validation.<br />
19 Jan <strong>2010</strong><br />
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<strong>Power</strong> Architecture® Presentations and Demonstrations to Be a High Focus at the <br />
DesignCon Conference<br />
Associate Sponsor <strong>Power</strong>.<strong>org</strong> and member companies Applied Micro, CoWare, <br />
Denali Software, EVE, Freescale, GDA Technologies, IBM, Virage Logic, <br />
Virtutech and XGI to promote <strong>Power</strong> Architecture solutions.<br />
<strong>Power</strong>.<strong>org</strong> announced that <strong>Power</strong> Architecture® technical advances supporting <br />
SoC design and ecosystem development from <strong>Power</strong>.<strong>org</strong> and its member <br />
companies will take center stage at the DesignCon Conference February 1 -‐ 4, <br />
<strong>2010</strong>. The event, where <strong>Power</strong>.<strong>org</strong> is an Associate Sponsor, will be held at the Santa <br />
Clara Convention Center in Santa Clara, Calif. <strong>Power</strong>.<strong>org</strong> is the <strong>org</strong>anization that <br />
promotes and develops standards for <strong>Power</strong> Architecture technology.<br />
12 Jan <strong>2010</strong><br />
This highly visible participation in DesignCon underscores the strength of our <br />
eco-‐system and the continued growth of <strong>Power</strong> Architecture technology <br />
throughout the embedded industry. <strong>Power</strong> Architecture technology continues to <br />
provide a signibicant, competitive advantage as the preferred technology in a wide <br />
range of products and ecosystems solutions.<br />
For details on the above press announcements and media coverage, please visit http://www.power.<strong>org</strong>/news/<br />
Future Events<br />
<strong>Power</strong>.<strong>org</strong> members exhibiting:<br />
AppliedMicro, CoWare, ENEA, Freescale, Green Hills, IBM, Lauterbach, Mentor Graphics, Synopsys, Wind River<br />
<strong>Power</strong>.<strong>org</strong> member participation in sessions: <br />
Enea, Ericsson, Freescale, IBM, Green Hills, LSI, Synopsys, Wind River<br />
<strong>Power</strong>.<strong>org</strong> collateral support to members:<br />
• <strong>Power</strong>.<strong>org</strong> Corporate Probile<br />
• PA Leadership<br />
• <strong>Power</strong> Architecture Magazine<br />
• Two Articles in the publications of “Engineering Guide to Multicore and Virtualization” & “Low <strong>Power</strong> <br />
Design” <br />
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June 13-‐18, <strong>2010</strong><br />
Anaheim, California<br />
<strong>Power</strong>.<strong>org</strong> members exhibiting:<br />
Cadence, CoWare, Denali Software, EVE, IBM, <strong>Power</strong>.<strong>org</strong>, Virage Logic and Synopys, <br />
<strong>Power</strong>.<strong>org</strong>’s focus is collaboration with members in the context of Standards and Interoperability.<br />
<strong>Power</strong>.<strong>org</strong> will provide collateral support to members at their respective booths.<br />
ISCA/WARP <strong>2010</strong> <br />
5th Annual Workshop on Architectural Research Prototyping <br />
Held in Conjunction with ISCA <strong>2010</strong> <br />
Saint-‐Malo, France 19 June <strong>2010</strong> <br />
Partial list of <strong>Power</strong>.<strong>org</strong> members Participating:<br />
EVE<br />
www.eve-‐team.com/warp<strong>2010</strong><br />
Freescale Technical Forum<br />
June 21-‐24, <strong>2010</strong><br />
Orlando, Florida<br />
Partial list of <strong>Power</strong>.<strong>org</strong> members Participating:<br />
E2v, ENEA, Freescale, IBM, Lauterbach, <strong>Power</strong>.<strong>org</strong><br />
www.freescale.com/ftf<br />
SoC Summit<br />
July 27, <strong>2010</strong><br />
Taipei, Taiwan<br />
The SoC Summit continues the successful ConbigCon Conference series—attended by over 1000 engineers <br />
worldwide—which birst began in 2006 in Taiwan in partnership with Digitimes. The rebranded and expanded <br />
SoC Summit will detail how semiconductor industry advances will continue to enable compelling user <br />
experiences in a broad range of electronics including portable and home-‐based consumer electronics devices. <br />
To learn more and register, visit www.socsummit.com.<br />
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Useful Links<br />
<strong>Power</strong> Architecture® Silicon Roadmap<br />
http://www.power.<strong>org</strong>/resources/devcorner/roadmap<br />
http://www.power.<strong>org</strong>/resources/downloads/ <br />
Access to DesignCon<strong>2010</strong> Presentations <br />
http://www.power.<strong>org</strong>/events/designcon10<br />
Special Feature Articles<br />
• Freescale QorIQ P2020 UTM/Security Appliance Solution<br />
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=RDAPLSO&fsrch=1<br />
• ENEA Multicore -‐ High performance packet processing enabled with a hybrid SMP/AMP <br />
OS technology <br />
• http://www.enea.com/epibrowser/literature%20(pdf)/pdf/leadgenerating/white%20papers/<br />
whitepaper_eneamulticore.pdf<br />
• IBM New POWER7 Systems To Manage Increasingly Data-‐Intensive Services<br />
http://www-‐03.ibm.com/press/us/en/pressrelease/29315.wss<br />
Press Announcements and Media Coverage<br />
http://www.power.<strong>org</strong>/news/<br />
<strong>Power</strong>.<strong>org</strong> Q4 <strong>Newsletter</strong><br />
http://www.power.<strong>org</strong>/news/newsletter/<br />
Contribution and Comments<br />
If you wish to contribute, have a suggestion, or comments, please feel free to send a short note to <br />
fawzi@power.<strong>org</strong><br />
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