A Performance Analysis System for the Sport of Bowling
A Performance Analysis System for the Sport of Bowling A Performance Analysis System for the Sport of Bowling
Appendix A: SMARTDOT Module Embedded Software Flowcharts RECEIVE BYTE (from Wand) A UART RECEIVE TASK FLOWCHART B C Wait for Start Bit Wait for Parity Bit Reset Receive Time Out Bit Sample Interrupt T0) Bit Sample Interrupt (T0) Turn ON TSL251 (starts ADC conversion) New Bit = FALSE NO Is PARITY Bit corrrect? Halt Bit Sample Timer (T0) Wait for Dark Wand Interrupt (T0) Valid START Bit? NO YES New Bit = FALSE Turn OFF TSL251 (ADC has already finished) Set Bit Sample Timer (T0) for 4800 Hz YES Wait for Stop Bit Wait for 1 to 0 Transition Wait for Data Bit Bit Sample Interrupt (T0) Wand Interrupt (T0) Bit Sample Interrupt (T0) New Bit = FALSE Initialize Bit Sampling New Bit = FALSE Bit Dark Counter = 0 DARK Level = ZERO Level Start Bit Sample Timer (T0) Bit Count = 0 Bit Sample Count = 0 New Bit = FALSE Shift Bit into RCV Byte NO Valid STOP Bit? NO Done All 8 Data Bits? Push NO RESPONSE on to Stack YES New Bit = FALSE YES A B Figure A-7 C RETURN A-8
Appendix A: SMARTDOT Module Embedded Software Flowcharts BIT SAMPLE ISR FLOWCHART RECEIVE TIME OUT ISR FLOWCHART On: Timer 0 (T0) Overflow A B On: Timer TI Overflow Disable Interrupts Is this a Middle Bit Sample? NO Take All 8 Bit Samples? NO Disable Interrupts Sample = ADAT (from previous conversion) YES YES NO Reached Time Out? Start ADC conversion (TSL251 is already ON) A Is Sample < Dark Level? YES NO DARK Samples = 2? YES NO YES Halt Time Out Timer (TI) Level Count++ (counting DARK samples) Bit = 1 Bit = 0 Push NO RESPONSE onto Stack DARK Level = ZERO Level (hysteresis between LITE and DARK) DARK Level = ONE Level (hysteresis between LITE and DARK) Bit Sample Count++ Enable Interrupts Enable Interrupts B RETURN FROM INTERRUPT RETURN FROM INTERRUPT Figure A-8 Figure A-9 A-9
- Page 31 and 32: 2.7.5 The Ball is Rolling If the wa
- Page 33 and 34: covered by the wand). When the modu
- Page 35 and 36: 2.8.1 Detecting Release Detecting t
- Page 37 and 38: Light Level 100 90 80 70 60 50 40 3
- Page 39 and 40: By filtering the data, and then cou
- Page 41 and 42: The 'F300x can write to any portion
- Page 43 and 44: One possibility is to use a transfo
- Page 45 and 46: 2.10 SUMMARY This portion of the re
- Page 47 and 48: The ball's angular velocity increas
- Page 49 and 50: Light Level 100 90 80 70 60 50 40 3
- Page 51 and 52: the fundamental frequency has been
- Page 53 and 54: Since the fundamental frequency and
- Page 55 and 56: Figure 3-7: MASTER "Analysis" Scree
- Page 57 and 58: known, the linear momentum (and thu
- Page 59 and 60: In order to find the value for v 1
- Page 61 and 62: 3.5 ASSUMPTIONS AND ERROR ANALYSIS
- Page 63 and 64: 3.5.3 External Forces and Friction
- Page 65 and 66: 3.6.1 Implementation and Performanc
- Page 67 and 68: Figure 3-11a: Effects of Phase Shif
- Page 69 and 70: 3.6.3 The "Perfect" Game to Analyze
- Page 71 and 72: Since the change in angular velocit
- Page 73 and 74: BIBLIOGRAPHY [1] United State Paten
- Page 75 and 76: APPENDIX A - SMARTDOT MODULE EMBEDD
- Page 77 and 78: Appendix A: SMARTDOT Module Embedde
- Page 79 and 80: Appendix A: SMARTDOT Module Embedde
- Page 81: Appendix A: SMARTDOT Module Embedde
- Page 85 and 86: APPENDIX B - SMARTDOT MODULE SOURCE
- Page 87 and 88: Appendix C: SMARTDOT Module Command
- Page 89 and 90: Figure C-3 Appendix C: SMARTDOT Mod
- Page 91 and 92: APPENDIX E - 300 GAME MASTER SCREEN
- Page 93 and 94: Appendix E: 300 Game Analysis Frame
- Page 95 and 96: Appendix E: 300 Game Analysis Frame
- Page 97: Appendix E: 300 Game Analysis Frame
Appendix A: SMARTDOT Module Embedded S<strong>of</strong>tware Flowcharts<br />
RECEIVE<br />
BYTE<br />
(from Wand)<br />
A<br />
UART RECEIVE TASK<br />
FLOWCHART<br />
B<br />
C<br />
Wait <strong>for</strong> Start Bit<br />
Wait <strong>for</strong> Parity Bit<br />
Reset Receive Time Out<br />
Bit Sample Interrupt T0)<br />
Bit Sample Interrupt (T0)<br />
Turn ON TSL251<br />
(starts ADC conversion)<br />
New Bit = FALSE<br />
NO<br />
Is<br />
PARITY<br />
Bit<br />
corrrect?<br />
Halt Bit Sample Timer (T0)<br />
Wait <strong>for</strong> Dark<br />
Wand Interrupt (T0)<br />
Valid<br />
START<br />
Bit?<br />
NO<br />
YES<br />
New Bit = FALSE<br />
Turn OFF TSL251<br />
(ADC has already finished)<br />
Set Bit Sample Timer (T0)<br />
<strong>for</strong> 4800 Hz<br />
YES<br />
Wait <strong>for</strong> Stop Bit<br />
Wait <strong>for</strong> 1 to 0 Transition<br />
Wait <strong>for</strong> Data Bit<br />
Bit Sample Interrupt (T0)<br />
Wand Interrupt (T0)<br />
Bit Sample Interrupt (T0)<br />
New Bit = FALSE<br />
Initialize Bit Sampling<br />
New Bit = FALSE<br />
Bit Dark Counter = 0<br />
DARK Level = ZERO Level<br />
Start Bit Sample Timer (T0)<br />
Bit Count = 0<br />
Bit Sample Count = 0<br />
New Bit = FALSE<br />
Shift Bit into RCV Byte<br />
NO<br />
Valid<br />
STOP<br />
Bit?<br />
NO<br />
Done<br />
All 8<br />
Data Bits?<br />
Push NO RESPONSE<br />
on to Stack<br />
YES<br />
New Bit = FALSE<br />
YES<br />
A<br />
B<br />
Figure A-7<br />
C<br />
RETURN<br />
A-8