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A Performance Analysis System for the Sport of Bowling

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2.6.3 Baud Rate<br />

The module communicates with <strong>the</strong> outside world through a serial IR interface using<br />

standard baud rates. A s<strong>of</strong>tware UART had to be implemented <strong>for</strong> <strong>the</strong> SMARTDOT<br />

module, since <strong>the</strong> 87C752 does not have an on-board hardware UART. The 3.6864 MHz<br />

crystal supports both <strong>the</strong> 240 Hz sampling rate, and running <strong>the</strong> s<strong>of</strong>tware UART at all <strong>of</strong><br />

<strong>the</strong> standard baud rates up to 38400 baud.<br />

The rise/fall time <strong>of</strong> <strong>the</strong> TSL251 limits <strong>the</strong> module's reception rate to 600 baud, which is<br />

not a problem, since <strong>the</strong> module receives little in<strong>for</strong>mation compared to what it must<br />

transmit. On <strong>the</strong> transmit (upload) side, <strong>the</strong> entire contents <strong>of</strong> memory (512 bytes) must<br />

be uploaded rapidly so as not to inconvenience <strong>the</strong> user. At <strong>the</strong> 38400 baud rate, <strong>the</strong><br />

entire contents <strong>of</strong> memory can be uploaded in less than a second.<br />

2.7 EMBEDDED SOFTWARE DESIGN AND OPERATION<br />

This section presents a detailed description <strong>of</strong> <strong>the</strong> SMARTDOT module's embedded<br />

s<strong>of</strong>tware operation. The module's s<strong>of</strong>tware architecture is shown in Figure 2-4, which<br />

diagrams <strong>the</strong> interrelation <strong>of</strong> <strong>the</strong> major s<strong>of</strong>tware tasks, and <strong>the</strong>ir interaction with <strong>the</strong><br />

interrupt service routines (ISR's). The following s<strong>of</strong>tware description and <strong>the</strong><br />

architecture diagram both make reference to flowcharts <strong>for</strong> <strong>the</strong> embedded tasks and<br />

interrupt service routines, which are included in Appendix A. The actual assembly code<br />

is thoroughly documented, and has been included in Appendix B.<br />

2.7.1 S<strong>of</strong>tware Design Considerations<br />

Due to <strong>the</strong> cost and physical size constraints <strong>of</strong> <strong>the</strong> application, <strong>the</strong> SMARTDOT module<br />

relies on a relatively simple hardware design. The complexity <strong>of</strong> <strong>the</strong> module is contained<br />

within its embedded s<strong>of</strong>tware and <strong>the</strong> efficient use <strong>of</strong> <strong>the</strong> microprocessor's on-board<br />

resources and peripherals. The 87C752 microcontroller has severe constraints on both its<br />

on-board program EPROM (2048 bytes) and RAM (64 bytes). The RAM space also<br />

includes <strong>the</strong> general-purpose registers, <strong>the</strong> bit addressable space, and any required stack<br />

space.<br />

Although 'C' compilers are available <strong>for</strong> <strong>the</strong> 87C752, <strong>the</strong>y are notoriously spaceinefficient,<br />

and 'C' makes heavy use <strong>of</strong> <strong>the</strong> stack. Due to <strong>the</strong> limited sizes <strong>of</strong> <strong>the</strong> code and<br />

data spaces, <strong>the</strong> embedded s<strong>of</strong>tware was implemented in Intel 51 assembly language,<br />

with careful attention paid to <strong>the</strong> maximum depth <strong>of</strong> procedure calls, and with minimal<br />

parameter passing via <strong>the</strong> stack. The required stack space has been held to 16 bytes,<br />

allowing <strong>for</strong> a call depth <strong>of</strong> four (two-byte return addresses and two additional bytes<br />

(usually ACC and PSW) PUSHed onto <strong>the</strong> stack <strong>for</strong> each call).<br />

The application is both event and interrupt driven, with pre-emptive, round robin<br />

multitasking used on a limited basis to implement task time-outs, sampling, and<br />

discrimination between "valid" wave<strong>for</strong>ms, attempts to communicate, and spurious<br />

activations. Microprocessor interrupts are used <strong>for</strong> acquiring regular light wave<strong>for</strong>m<br />

samples, <strong>for</strong> impact detection, <strong>for</strong> implementation <strong>of</strong> <strong>the</strong> s<strong>of</strong>tware UART, and <strong>for</strong> keeping<br />

accurate track <strong>of</strong> time. Event driven (polled) tasks include detection <strong>of</strong> release and<br />

detection <strong>of</strong> <strong>the</strong> COMM Wand. Semaphores are used <strong>for</strong> task synchronization.<br />

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