AMSV Newsletter 2014

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Normalized Power-delay product In TVLSI 2015 Energy Optimized Sub-threshold VLSI Logic Family with Unbalanced Pull-up/down Network and Inverse-Narrow-Width Techniques Ming-Zhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang-I Vai, Sio-Hang Pun and Rui P. Martins From Biomedical IC research line (Accepted in <strong>2014</strong>) Motivation Ultra-low-energy biomedical applications have urged the development of a sub-threshold VLSI logic family in standard CMOS. Instead of the traditionally preferred balanced pull-up (PU) and pull-down (PD) network approach in logic cell design, this work proposes an unbalanced pullup/down network together with an inversenarrow-width technique to improve the operating speed of the individual logic cell. Effective logical efforts save both power and die area in the process of device sizing and topology optimization. Three experimental 14-tap 8-bit finite impulse response (FIR) filters optimized for ultra-lowvoltage operation were fabricated in 0.18-μm CMOS. Measurements show that the optimized 0.45-V and 0.6-V libraries achieve minimum energy operations at 100 kHz, with a Figure-of- Merit (FoM) of 0.365 (at 0.31 V) and 0.4632 (at 0.39 V), respectively. They correspond to 35.96% and 18.74% improvements, and the overall performances are well comparable with the state-of-the-art. Power-delay product (J) 10 -17 10 -18 10 -19 Architecture 10 -15 Operating with balancing w/o balancing frequency limit 10 -16 difference (unbalanced) 40% 30% 20% 10% 0% 10 3 10 4 10 5 10 6 Frequency (Hz) 10 7 Difference in power-delay product 4.0 3.2 2.4 1.6 WNMOS = 0.88 mm WNMOS = 0.66 mm WNMOS = 0.44 mm WNMOS = 0.22 mm 0.8 0.2 0.4 0.6 0.8 1 1.2 1.4 PMOS Width (mm) Power-delay product of an inverter (FO4 loading) with balanced (P/N ratio = 5/1) and unbalanced (P/N ratio = 2/1) PU/PD network vs. operating frequency at 0.3 V (left); Normalized power-delay product of a FO4 inverter at various NMOS/PMOS widths at 0.3 V (right). 0.5 NMOS VT (V) Minimum PMOS |VT| -0.41 PMOS VT (V) 0.5 Minimum PMOS |VT| interval @ 400 – 590 nm -0.46 Minimum Minimum NMOS VT NMOS VT @ 220 nm 0.42 -0.49 0.42 -0.5 0 0.5 1 1.5 2 2.5 0.1 0.5 0.9 1.3 1.7 2.1 2.5 Transistor Length (mm) Transistor Width (mm) NMOS/PMOS VT vs. transistor length (left); Transistor width (right) at VDD = 0.3 V. NMOS VT (V) INW PMOS VT (V) System Implementation Verification Normalized Energy/Cycle 1.0 0.6 0.2 Circuit with 0.30-V .lib Circuit with 0.45-V .lib Circuit with 0.60-V .lib 0.32V 0.44V 0.34V 0 0.25 0.35 0.45 0.55 Power Supply Voltage (V) Normalized Energy/Cycle Circuit with 0.30-V .lib Circuit with 0.45-V .lib 1.0 Circuit with 0.60-V .lib 0.6 0.28V 0.39V 0.2 0.31V 0 0.25 0.35 0.45 0.55 Power Supply Voltage (V) 0.35 mm 0.3 V liberty file (.lib) based FIR 0.33 mm 0.2 mm 0.265 mm 0.45 V liberty file (.lib) based FIR 0.25 mm 0.196 mm 0.6 V liberty file (.lib) based FIR Die micrographs of the 0.18-µm sub-threshold FIR test chips using the 0.3V, 0.45V and 0.6V liberty file. Die micrographs of the 0.18-µm sub-threshold FIR test chips using the 0.3V, 0.45V and 0.6V liberty file. Number of Chips 5 4 3 2 1 σ = 0.0678 pJ μ = 0.3829 pJ 0 0 0.33 0.37 0.41 0.45 0.49 0.53 0.60 Energy/Cycle (pJ) Number of Chips 4 3 2 1 σ = 0.0543 pJ μ = 0.4995 pJ 0 0 0.41 0.45 0.49 0.53 0.57 0.63 Energy/Cycle (pJ) Die micrographs of the 0.18-µm sub-threshold FIR test chips using the 0.3V, 0.45V and 0.6V liberty file.
Voltage Voltage In American Institute of Physics – Advances <strong>2014</strong> Natural Discharge after Pulse and Cooperative Electrodes to Enhance Droplet Velocity in Digital Microfluidics Tianlan Chen, Cheng Dong, Jie Gao, Yanwei Jia, Pui-In Mak, Mang-I Vai, and Rui P. Martins From Multidisciplinary Research Area Motivation Architecture Digital Microfluidics (DMF) is a promising technology for biological/chemical micro-reactions due to its distinct droplet manageability via electronic automation, but the limited velocity of droplet transportation has hindered DMF from utilization in high throughput applications. In this paper, by adaptively fitting the actuation voltages to the dynamic motions of droplet movement under real-time feedback monitoring, two control-engaged electrode-driving techniques: Natural Discharge after Pulse (NDAP) and Cooperative Electrodes (CE) are proposed. They together lead to, for the first time, enhanced droplet velocity with lower root mean square voltage value. uα uβ uβ’ 0 uα uβ uβ’ 0 HV period tα’ LV period tβ tα 1 st electrode tthc tths tths Time NDAP 2 nd electrode NDAP + CE (a) (b) uα 0 uα 0 Sketches of four possible electrode-driving schemes for droplet movements over two electrodes: (a) Natural Discharge after Pulse (NDAP): The highvoltage (HV) period lasts shorter, while the low-voltage (LV) under natural discharge lasts longer with short pulse recharging periodically. (b) DC signal. (c) NDAP with cooperative electrodes (CE) overlaps the charging time of neighboring electrodes. (d) DC plus CE driving. (e) Droplet moving toward two target electrodes and location of the two thresholds on the first target electrode. The electrode was grounded when the charging was done in all schemes. tthc tths tths Time DC DC + CE (c) (d) thc ths 1st 2nd (e) Result I Result II (a) Velocity comparison of NDAP signals with different and DC. NDAP with 13-ms to 100-ms has average velocities higher than DC signal. (b) Video frames of a droplet actuated by NDAP and DC crossing 2 electrodes (Multimedia view). Video was captured by a high speed camera (Nikon V2), which has a maximum frame rate up to 1200 frames/second (resolution 320 x 120 pixels). A LED light was set in the same frame to light on when the electrode was being charged. Individual frames extracted from the videos were analyzed by the image processing software Image J to obtain the v droplet. Comparison between the proposed (NDAP + CE and high-speed feedback) and classical (DC) schemes for droplet movements in a long run of 3 s: (a) Droplet successfully moved across 12 electrodes when it was controlled by the proposed scheme. The path of the droplet’s center had been shortened at electrode No. 6 by CE, which charged electrode No. 7 before the droplet reached electrode No. 6, resulting in an upward move of droplet in advance. The whole droplet transportation was recorded in video (Multimedia view). (b) Droplet failed to complete movement in 3 s due to its lower speed. The moving path was close to the right angle at the two corners. The whole droplet transportation was recorded in video (Multimedia view). (c) Instantaneous velocity of the droplet moving across the electrodes. As expected, droplet controlled by the proposed scheme moved across electrode No. 6-7- 8 using a much shorter time than that of the classical procedure.
Page 1 and 2: State Key Lab of Analog and Mixed-S
Page 3: Selected works from each research l
Page 9 and 10: In ISSCC 2014 and JSSC 2014 A 0.5V
Page 11 and 12: Events and Visits Visit by Mr. Ma C

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