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Final report on link level and system level channel models - Winner

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WINNER D5.4 v. 1.4<br />

figure represents <strong>on</strong>e period of the transmit/receive signal. Synchr<strong>on</strong>ous switching at the Rx <strong>and</strong> Tx is<br />

required in order to clearly assign the received signal periods to any input-output combinati<strong>on</strong> of the<br />

<strong>channel</strong> matrix. Timing <strong>and</strong> switching frame synchr<strong>on</strong>izati<strong>on</strong> is established during an initial<br />

synchr<strong>on</strong>izati<strong>on</strong> process prior to measurement data recording <strong>and</strong> must be maintained over the complete<br />

measurement time even in the case of remote operati<strong>on</strong> of Tx <strong>and</strong> Rx. This is accomplished by rubidium<br />

reference oscillators at both Rx <strong>and</strong> Tx.<br />

M Tx<br />

M Rx<br />

Tx<br />

Rx<br />

Tx switching sequence<br />

Rx switching sequence<br />

Tx<br />

<strong>channel</strong><br />

Rx<br />

1<br />

2<br />

3<br />

1<br />

2<br />

3<br />

4<br />

t p = T x Signal period = τ max = maximum path excess delay<br />

time<br />

t s = τ max 2 M Tx M Rx = total snapshot time durati<strong>on</strong><br />

Figure 5.4: MIMO sounder switching time frame.<br />

5.1.2.3 KTH measurement <strong>system</strong><br />

The KTH measurement <strong>system</strong> is based <strong>on</strong> four parallel transmitters tuned to slightly different<br />

frequencies. Figure 5.5 presents a block diagram of the transmitter.<br />

∑<br />

Reference<br />

Antenna<br />

TX module 1<br />

TX module 2<br />

splitter<br />

splitter<br />

TX antenna 1<br />

TX antenna 2<br />

Laptop PC<br />

TX module 3<br />

splitter<br />

TX antenna 3<br />

TX module 4<br />

splitter<br />

TX antenna 4<br />

Figure 5.5: Block diagram of the transmitter chains.<br />

Each base stati<strong>on</strong> c<strong>on</strong>tains four parallel receiver chains as shown in Figure 5.6. The combined RF signal<br />

from each vertical array is input to its corresp<strong>on</strong>ding RX module. The output signal of the RX module is<br />

fed to an analog-to-digital c<strong>on</strong>verter (ADC). The ADC collects 40000 samples from each signal chain per<br />

sec<strong>on</strong>d <strong>and</strong> writes the sampled data to the hard disk of a computer. These raw data samples are processed<br />

<strong>and</strong> analyzed later by software in an off-line fashi<strong>on</strong>.<br />

Page 60 (167)

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