HLASM Language Reference
HLASM Language Reference HLASM Language Reference
Examples of Coded Machine Instructions ┌────────┬────┬────┬────┬────────────┐ │Op Code │ R │ X │ B │ D │ └────────┴────┴────┴────┴────────────┘ 8 12 16 2 31 Symbols used to represent registers (see REG1, INDEX, and BASE in the ALPHA2 instruction below) are assumed to be equated to absolute values between 0 and 15. Symbols used to represent implicit addresses (see IMPLICIT in the instructions labeled GAMMAn below) can be either relocatable or absolute. Symbols used to represent displacements (see DISPL in the instructions labeled BETA2 and LAMBDA1 below) in explicit addresses are assumed to be equated to absolute values between 0 and 4095. Examples: ALPHA1 L 1,2(4,1) ALPHA2 L REG1,2(INDEX,BASE) BETA1 L 2,2(,1) BETA2 L REG2,DISPL(,BASE) GAMMA1 L 3,IMPLICIT GAMMA2 L 3,IMPLICIT(INDEX) DELTA1 L 4,=F'33' LAMBDA1 BC 7,DISPL(,BASE) LAMBDA2 BC TEN,ADDRESS When assembled, the object code for the instruction labeled ALPHA1, in hexadecimal, is: 5814AC8 where: 58 is the operation code 1 is register R 4 is index register X A is base register B C8 is displacement D from base register B When assembled, the object code for the instruction labeled GAMMA1, in hexadecimal, is: 5824xyyy where: 58 is the operation code 2 is register R 4 is the index register X x is base register B yyy is displacement D from base register B 96 HLASM V1R5 Language Reference
Examples of Coded Machine Instructions SI Format The operand fields of SI-format instructions designate immediate data and a virtual storage address. ┌────────┬─────────┬────┬────────────┐ │Op Code │ I │ B │ D │ └────────┴─────────┴────┴────────────┘ 8 16 2 31 Symbols used to represent immediate data (see HEX4 and TEN in the instructions labeled ALPHA2 and BETA1 below) are assumed to be equated to absolute values between 0 and 255. Symbols used to represent implicit addresses (see IMPLICIT and KEY in the instructions labeled BETA1 and BETA2) can be either relocatable or absolute. Symbols used to represent displacements (see DISPL4 in the instruction labeled ALPHA2 below) in explicit addresses are assumed to be equated to absolute values between 0 and 4095. Examples: ALPHA1 CLI 4(9),X'4' ALPHA2 CLI DISPL4(NINE),HEX4 BETA1 CLI IMPLICIT,TEN BETA2 CLI KEY,C'E' When assembled, the object code for the instruction labeled ALPHA1, in hexadecimal, is: 954928 where 95 is the operation code. 4 is the immediate data. 9 is the base register. 28 is the displacement from the base register SS Format The operand fields and subfields of SS-format instructions designate two virtual storage addresses (coded as implicit addresses or explicit addresses) and, optionally, the explicit data lengths you want to include. However, note that, in the Shift and Round Decimal (SRP) instruction, a 4-bit immediate data field (see 3 in SRP instruction below), with a value between 0 and 9, is specified as a third operand. Chapter 4. Machine Instruction Statements 97
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Examples of Coded Machine Instructions<br />
┌────────┬────┬────┬────┬────────────┐<br />
│Op Code │ R │ X │ B │ D │<br />
└────────┴────┴────┴────┴────────────┘<br />
8 12 16 2 31<br />
Symbols used to represent registers (see REG1, INDEX, and BASE in the ALPHA2<br />
instruction below) are assumed to be equated to absolute values between 0 and<br />
15.<br />
Symbols used to represent implicit addresses (see IMPLICIT in the instructions<br />
labeled GAMMAn below) can be either relocatable or absolute.<br />
Symbols used to represent displacements (see DISPL in the instructions labeled<br />
BETA2 and LAMBDA1 below) in explicit addresses are assumed to be equated to<br />
absolute values between 0 and 4095.<br />
Examples:<br />
ALPHA1 L 1,2(4,1)<br />
ALPHA2 L REG1,2(INDEX,BASE)<br />
BETA1 L 2,2(,1)<br />
BETA2 L REG2,DISPL(,BASE)<br />
GAMMA1 L 3,IMPLICIT<br />
GAMMA2 L 3,IMPLICIT(INDEX)<br />
DELTA1 L 4,=F'33'<br />
LAMBDA1 BC<br />
7,DISPL(,BASE)<br />
LAMBDA2 BC<br />
TEN,ADDRESS<br />
When assembled, the object code for the instruction labeled ALPHA1, in<br />
hexadecimal, is:<br />
5814AC8<br />
where:<br />
58 is the operation code<br />
1 is register R<br />
4 is index register X<br />
A is base register B<br />
C8 is displacement D from base register B<br />
When assembled, the object code for the instruction labeled GAMMA1, in<br />
hexadecimal, is:<br />
5824xyyy<br />
where:<br />
58 is the operation code<br />
2 is register R<br />
4 is the index register X<br />
x is base register B<br />
yyy is displacement D from base register B<br />
96 <strong>HLASM</strong> V1R5 <strong>Language</strong> <strong>Reference</strong>