HLASM Language Reference

HLASM Language Reference HLASM Language Reference

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Operand Entries Format │ Coded or Symbolic │ Object Code │ Representation of │ Representation │ Explicit Address │ of Addresses ───────┼───────────────────┼────────────────────────────────────────────────────────────────────────────── │ │ │ │ │8 bits │4 │4 │4 │12 bits │4 │12 bits │ │ │ │Operation │bits │bits │bits │Displacement │bits │Displacement │ │ │ │Code │ │ │Base │ │ │ │ │ │ │ │ │ │Reg. │ │ │ │ │ │ ├───────────┼─────┼─────┼─────┼─────────────────┼─────┼─────────────────┤ │ │ │ │ │ │ ▌2▐ │ ▌1▐ │ │ │ │ │ │ │ │ │ ▼ │ ▼ │ │ │ │ │ ├ ─ ─ ─ ─ ─ ┼ ─ ─ ┼ ─ ─ ┼─────┼─────────────────┤ │ │ RS │ D(B) │ │OP CODE │ R │ R │ B │ D │ │ │ │ │ ├ ─ ─ ─ ─ ─ ┴ ─ ─ ┴ ─ ─ ┴─────┴─────────────────┤ │ │ │ │ │ ┌──▌3▐ (Index Register) │ │ │ │ │ │ ▼ │ │ │ │ │ ├ ─ ─ ─ ─ ─ ┬ ─ ─ ┬ ─ ─ ┬─────┬─────────────────┤ │ │ RX │ D(X,B) │ │OP CODE │ R │ X │ B │ D │ │ │ │ │ ├ ─ ─ ─ ─ ─ ┴ ─ ─ ┴ ─ ─ ┴─────┴─────────────────┤ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ├ ─ ─ ─ ─ ─ ┬ ─ ─ ─ ─ ─ ┬─────┬─────────────────┤ │ │ SI │ D(B) │ │OP CODE │ I │ B │ D │ │ │ │ │ ├ ─ ─ ─ ─ ─ ┴ ─ ─ ─ ─ ─ ┴─────┴─────────────────┤ │ │ │ │ │ │ ▌2▐ │ ▌1▐ │ │ │ │ │ ▼ │ ▼ │ │ │ ├ ─ ─ ─ ─ ─ ┬ ─ ─ ─ ─ ─ ┬─────┬─────────────────┼─────┼─────────────────┤ SS │ D(,B),D(B) │ │OP CODE │ L │ B │ D │ B │ D │ │ │ ├ ─ ─ ─ ─ ─ ┴ ─ ─ ─ ─ ─ ┴─────┴─────────────────┴─────┴─────────────────┤ I represents an immediate value L represents a length B, R and R represent registers Figure 23. Format of Addresses in Object Code Lengths You can specify the length field in an SS-format instruction. This lets you indicate explicitly the number of bytes of data at a virtual storage location that is to be used by the instruction. However, you can omit the length specification, because the assembler computes the number of bytes of data to be used from the expression that represents the address of the data. See page 97 for more information about SS-format instructions. Implicit Length: When a length subfield is omitted from an SS-format machine instruction, an implicit length is assembled into the object code of the instruction. The implicit length is either of the following: For an implicit address, it is the length attribute of the first or only term in the expression representing the implicit address. For an explicit address, it is the length attribute of the first or only term in the expression representing the displacement. Explicit Length: When a length subfield is specified in an SS-format machine instruction, the explicit length always overrides the implicit length. An implicit or explicit length is the effective length. The length value assembled is 90 HLASM V1R5 Language Reference

Examples of Coded Machine Instructions always one less than the effective length. If you want an assembled length value of 0, an explicit length of 0 or 1 can be specified. In the SS-format instructions requiring one length value, the allowable range for explicit lengths is 0 through 256. In the SS-format instructions requiring two length values, the allowable range for explicit lengths is 0 through 16. Immediate Data In addition to registers, numeric values, relative addresses, and lengths, some machine instruction operands require immediate data. Such data is assembled directly into the object code of the machine instructions. Use immediate data to specify the bit patterns for masks or other absolute values you need. Specify immediate data only where it is required. Do not confuse it with address references to constants and areas, or with any literals you specify as the operands of machine instructions. Immediate data must be specified as absolute expressions whose range of values depends on the machine instruction for which the data is required. The immediate data is assembled into its binary representation. Examples of Coded Machine Instructions The examples that follow are grouped according to machine instruction format, and the groups are shown in order of the instruction length. They show the various ways in which you can code the operands of machine instructions. Both symbolic and numeric representation of fields and subfields are shown in the examples. Therefore, assume that all symbols used are defined elsewhere in the same source module. The object code assembled from at least one coded statement per group is also included. A complete summary of machine instruction formats with the coded assembler language variants can be found in the applicable Principles of Operation manual. The examples that follow show the various instruction formats, and are not meant to show how the machine instructions should be used. RI Format The operand fields of RI-format instructions designate a register and an immediate operand, with the following exception: In BRC branching instructions, a 4-bit branching mask with a value between 0 and 15 inclusive replaces the register designation. Symbols used to represent registers (such as REG1 in the example) are assumed to be equated to absolute values between 0 and 15. The 16-bit immediate operand has two different interpretations, depending on whether the instruction is a branching instruction or not. There are two types of non-branching RI-format instructions. Chapter 4. Machine Instruction Statements 91

Examples of Coded Machine Instructions<br />

always one less than the effective length. If you want an assembled length value<br />

of 0, an explicit length of 0 or 1 can be specified.<br />

In the SS-format instructions requiring one length value, the allowable range for<br />

explicit lengths is 0 through 256. In the SS-format instructions requiring two length<br />

values, the allowable range for explicit lengths is 0 through 16.<br />

Immediate Data<br />

In addition to registers, numeric values, relative addresses, and lengths, some<br />

machine instruction operands require immediate data. Such data is assembled<br />

directly into the object code of the machine instructions. Use immediate data to<br />

specify the bit patterns for masks or other absolute values you need.<br />

Specify immediate data only where it is required. Do not confuse it with address<br />

references to constants and areas, or with any literals you specify as the operands<br />

of machine instructions.<br />

Immediate data must be specified as absolute expressions whose range of values<br />

depends on the machine instruction for which the data is required. The immediate<br />

data is assembled into its binary representation.<br />

Examples of Coded Machine Instructions<br />

The examples that follow are grouped according to machine instruction format, and<br />

the groups are shown in order of the instruction length. They show the various<br />

ways in which you can code the operands of machine instructions. Both symbolic<br />

and numeric representation of fields and subfields are shown in the examples.<br />

Therefore, assume that all symbols used are defined elsewhere in the same source<br />

module.<br />

The object code assembled from at least one coded statement per group is also<br />

included. A complete summary of machine instruction formats with the coded<br />

assembler language variants can be found in the applicable Principles of Operation<br />

manual.<br />

The examples that follow show the various instruction formats, and are not meant<br />

to show how the machine instructions should be used.<br />

RI Format<br />

The operand fields of RI-format instructions designate a register and an immediate<br />

operand, with the following exception:<br />

In BRC branching instructions, a 4-bit branching mask with a value between 0<br />

and 15 inclusive replaces the register designation.<br />

Symbols used to represent registers (such as REG1 in the example) are assumed<br />

to be equated to absolute values between 0 and 15. The 16-bit immediate operand<br />

has two different interpretations, depending on whether the instruction is a<br />

branching instruction or not.<br />

There are two types of non-branching RI-format instructions.<br />

Chapter 4. Machine Instruction Statements 91

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