HLASM Language Reference

Operand Entries
– For double shift and fullword multiply and divide instructions, the
odd-numbered register, whose number is one greater than the
even-numbered register specified as the first operand.
– For Move Long and Compare Logical Long instructions, the odd-numbered
registers, whose number is one greater than even-numbered registers
specified in the two operands.
– For Branch on Index High (BXH) and the Branch on Index Low or Equal
(BXLE) instructions, if the register specified for the second operand is an
even-numbered register, the next higher odd-numbered register is used to
contain the value to be used for comparison.
– For Load Multiple (LM, LAM) and Store Multiple (STM, STAM) instructions,
the registers that lie between the registers specified in the first two
operands.
– For extended-precision floating point instructions, the second register of the
register pair.
– For Compare and Form Codeword (CFC) instruction, registers 1, 2 and 3
are used.
– For Translate and Test (TRT) instruction, registers 1 and 2 are used.
– For Update Tree (UPT) instruction, registers 0-5 are used.
– For Edit and Mark (EDMK) instruction, register 1 is used.
– For certain control instructions, one or more of registers 0-4 and register 14
are used. See “Control Instructions” in the applicable Principles of
Operation manual.
– For certain input/output instructions, either or both registers 1 and 2 are
used. See “Input/Output Instructions” in the applicable Principles of
Operation manual.
– On a processor with a vector facility:
1. For instructions that manipulate long floating-point data in vector
registers, the odd-numbered vector registers, whose number is one
greater than the even-numbered vector registers specified in each
operand.
2. For instructions that manipulate 64-bit signed binary data in vector
registers, the odd-numbered vector registers, whose number is one
greater than the even-numbered vector registers specified in each
operand.
Register Usage by System
The programming interface of the system control programs uses registers 0, 1, 13,
14, and 15.
Addresses
You can code a symbol in the name field of a machine instruction statement to
represent the address of that instruction. You can then refer to the symbol in the
operands of other machine instruction statements. The object code requires that
addresses be assembled in a numeric relative-offset or base-displacement format.
This format lets you specify addresses that are relocatable or absolute. Chapter 3,
Chapter 4. Machine Instruction Statements 87