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HLASM Language Reference

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Alternative Mnemonics for some Branch Relative Instructions<br />

| Jump on Condition Long<br />

JLU label Unconditional Jump Long RIL BRCL 15,label<br />

JLNOP label No operation RIL BRCL ,label<br />

JLH label Jump Long on High RIL BRCL 2,label<br />

JLL label Jump Long on Low RIL BRCL 4,label<br />

JLE label Jump Long on Equal RIL BRCL 8,label<br />

JLNH label Jump Long on Not High RIL BRCL 13,label<br />

JLNL label Jump Long on Not Low RIL BRCL 11,label<br />

JLNE label Jump Long on Not Equal RIL BRCL 7,label<br />

JLP label Jump Long on Plus RIL BRCL 2,label<br />

JLM label Jump Long on Minus RIL BRCL 4,label<br />

JLZ label Jump Long on Zero RIL BRCL 8,label<br />

JLO label Jump Long on Overflow RIL BRCL 1,label<br />

JLNP label Jump Long on Not Plus RIL BRCL 13,label<br />

JLNM label Jump Long on Not Minus RIL BRCL 11,label<br />

JLNZ label Jump Long on Not Zero RIL BRCL 7,label<br />

JLNO label Jump Long on Not Overflow RIL BRCL 14,label<br />

Notes:<br />

1. D=displacement, X=index register, B=base register, R=register containing branch address<br />

2. The addresses represented are explicit address (see ▌4▐). However, implicit addresses can also be used in this type of<br />

instruction.<br />

3. Avoid using BM, BNM, JM, and JNM after the TMH or TML instruction.<br />

Figure 22 (Part 3 of 3). Extended Mnemonic Codes<br />

| Alternative Mnemonics for some Branch Relative Instructions<br />

| For some branch relative statements, there are alternative mnemonics. These are:<br />

| Instruction Alternative Description<br />

| --------------------------------------------------------------<br />

| BRAS JAS Branch Relative and Save<br />

| BRASL JASL Branch Relative and Save Long<br />

| BRCT JCT Branch Relative on Count<br />

| BRCTG JCTG Branch Relative on Count<br />

| BRXH JXH Branch Relative on Index High<br />

| BRXHG JXHG Branch Relative on Index High<br />

| BRXLE JXLE Branch Rel. on Index Low or Equal<br />

| BRXLG JXLEG Branch Rel. on Index Low or Equal<br />

Statement Formats<br />

Machine instructions are assembled into 2, 4, or 6 bytes of object code according<br />

to the format of each instruction. Machine instruction formats include the following<br />

(ordered by length attribute):<br />

Length Attribute Basic Formats<br />

2 RR<br />

4 RI, RS, RSI, RX, SI<br />

6 SS<br />

See the applicable Principles of Operation manual for complete details about<br />

machine instruction formats. See also “Examples of Coded Machine Instructions”<br />

on page 91.<br />

When you code machine instructions, you use symbolic formats that correspond to<br />

the actual machine language formats. Within each basic format, you can also code<br />

Chapter 4. Machine Instruction Statements 83

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