What are the steps to use the Axoclamp-2B for whole-cell patch ...
What are the steps to use the Axoclamp-2B for whole-cell patch ...
What are the steps to use the Axoclamp-2B for whole-cell patch ...
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<strong>What</strong> <strong>are</strong> <strong>the</strong> <strong>steps</strong> <strong>to</strong> <strong>use</strong> <strong>the</strong> <strong>Axoclamp</strong>-<strong>2B</strong> <strong>for</strong> <strong>whole</strong>-<strong>cell</strong> <strong>patch</strong> clamp in continuous<br />
single-electrode voltage clamp (cSEVC) mode<br />
The <strong>Axoclamp</strong>-<strong>2B</strong> only per<strong>for</strong>ms cSEVC with ME1. The best overall headstage <strong>for</strong> this<br />
purpose is <strong>the</strong> HS-2A x0.1LU. For more in<strong>for</strong>mation regarding <strong>the</strong> choice of headstages,<br />
see <strong>the</strong> <strong>Axoclamp</strong>-<strong>2B</strong> manual Reference section.<br />
Initial Amplifier Settings<br />
• All controls refer <strong>to</strong> <strong>the</strong> ME1 controls, or <strong>to</strong> <strong>the</strong> controls in <strong>the</strong> VOLTAGE CLAMP<br />
section on <strong>the</strong> front panel of <strong>the</strong> AxoClamp.<br />
• To begin, put <strong>the</strong> <strong>Axoclamp</strong> in BRIDGE mode.<br />
• Turn <strong>the</strong> following settings on <strong>the</strong> amplifier <strong>to</strong> minimum (fully counter-clockwise):<br />
GAIN, PHASE LAG, PHASE LAG MULTIPLIER, CAPACITANCE<br />
NEUTRALIZATION, ANTI-ALIAS FILTER, and BRIDGE BALANCE.<br />
• STEP COMMAND: +10.0; DESTINATION: ME1; Switch: EXT.<br />
• Ensure that <strong>the</strong> H1 switch beneath <strong>the</strong> I(nA) meter is correctly positioned<br />
depending on <strong>the</strong> gain of <strong>the</strong> headstage. For an HS-2A x0.1 LU, <strong>the</strong> switch<br />
should be in <strong>the</strong> x0.1 position.<br />
• Select Im on <strong>the</strong> I DISPLAY SELECT switch.<br />
• Immediately <strong>to</strong> <strong>the</strong> left of <strong>the</strong> BRIDGE but<strong>to</strong>n is a switch <strong>for</strong> CONT. SEVC and<br />
DISCONT. SEVC mode. Put this switch <strong>to</strong> CONT. SEVC.<br />
• The DC CURRENT COMMAND +/OFF/- switch should be OFF.<br />
• Set <strong>the</strong> amplifier OUTPUT BANDWIDTH <strong>to</strong> 10 kHz (also called <strong>the</strong> FILTER in <strong>the</strong><br />
following sections).<br />
BNC Connections <strong>to</strong> <strong>the</strong> amplifier (assuming a Digidata digitizer)<br />
• Amplifier Outputs:<br />
o Im <strong>to</strong> Analog In 0<br />
o 10 Vm <strong>to</strong> Analog In 1<br />
• Amplifier Inputs:<br />
o EXT VC COMMAND (rear panel) <strong>to</strong> Analog Out 0<br />
o STEP ACTIVATE (rear panel) <strong>to</strong> Digital Out 0
Model Cell<br />
Although <strong>the</strong> <strong>Axoclamp</strong>-<strong>2B</strong> was originally supplied with a choice of model <strong>cell</strong>s,<br />
<strong>the</strong> PATCH-1U model <strong>cell</strong> is <strong>use</strong>d <strong>for</strong> <strong>the</strong> following tests. This is <strong>the</strong> most appropriate<br />
model <strong>for</strong> <strong>whole</strong>-<strong>cell</strong> <strong>patch</strong>-clamp experiments. PATCH-1U models <strong>are</strong> available <strong>for</strong><br />
purchase, and a description can be found in KB article #868. O<strong>the</strong>r model <strong>cell</strong>s may be<br />
<strong>use</strong>d <strong>for</strong> this tu<strong>to</strong>rial, but <strong>the</strong> details of <strong>the</strong> response may vary depending on <strong>the</strong> model<br />
<strong>cell</strong> parameters.<br />
Whole-<strong>cell</strong> voltage clamp procedure<br />
1. Zero <strong>the</strong> Pipette Offset. Connect <strong>the</strong> PATCH-1U model <strong>cell</strong> BATH input <strong>to</strong> <strong>the</strong><br />
headstage. Ground <strong>the</strong> model <strong>cell</strong> <strong>to</strong> <strong>the</strong> yellow socket on <strong>the</strong> headstage. Turn <strong>the</strong><br />
INPUT OFFSET potentiometer on <strong>the</strong> front panel of <strong>the</strong> AxoClamp until <strong>the</strong> Vm meter on<br />
<strong>the</strong> amplifier reads 0 mV.<br />
2. Measure <strong>the</strong> Pipette Resistance. When a TTL (5 V) pulse is applied <strong>to</strong> <strong>the</strong> STEP<br />
ACTIVATE input, a step pulse is delivered <strong>to</strong> <strong>the</strong> electrode as determined by <strong>the</strong> settings<br />
of <strong>the</strong> STEP COMMAND. Initially <strong>the</strong> amplifier is in BRIDGE mode, so that with <strong>the</strong><br />
above settings, 1 nA is applied <strong>to</strong> <strong>the</strong> pipette on ME1 <strong>for</strong> <strong>the</strong> duration of <strong>the</strong> TTL pulse.<br />
There<strong>for</strong>e, <strong>use</strong> Clampex, a similar program, or a step-function genera<strong>to</strong>r <strong>to</strong> apply<br />
a short TTL pulse <strong>to</strong> STEP ACTIVATE.<br />
The resulting wave<strong>for</strong>m should be a step in both current and voltage:
From this recording <strong>the</strong> pipette resistance can be calculated. Here, <strong>the</strong> model <strong>cell</strong><br />
in <strong>the</strong> BATH position has a resistance of 10 mV / 1000 pA = 10 MΩ.<br />
2. Set <strong>the</strong> Holding Position <strong>to</strong> Zero mV. Turn <strong>the</strong> HOLDING POSITION until <strong>the</strong> two<br />
RMP BALANCE lights <strong>are</strong> equally dim. The value on <strong>the</strong> HOLDING POSITION dial<br />
should be close <strong>to</strong> 5. This will set <strong>the</strong> holding command of <strong>the</strong> amplifier <strong>to</strong> 0 mV when<br />
<strong>the</strong> amplifier is switched <strong>to</strong> cSEVC mode.<br />
3. Switch <strong>to</strong> cSEVC Mode. Press SEVC <strong>to</strong> put <strong>the</strong> amplifier in<strong>to</strong> cSEVC mode. Turn <strong>the</strong><br />
DESTINATION switch <strong>to</strong> VC(mV). Set <strong>the</strong> TTL pulse <strong>to</strong> STEP ACTIVATE <strong>to</strong> run<br />
repetitively, <strong>for</strong> example, at 10 Hz. Turn <strong>the</strong> pulses back on.<br />
The resulting output now resembles <strong>the</strong> pulses below.
(Sampling rate in Clampex = 20 kHz, FILTER = 10 kHz)<br />
Note that even though <strong>the</strong> STEP COMMAND is set <strong>to</strong> 10 mV, <strong>the</strong> resulting step<br />
is only ~7 mV. This is beca<strong>use</strong> <strong>the</strong> voltage clamp GAIN setting is set <strong>to</strong> its lowest value.<br />
The voltage clamp is unable <strong>to</strong> change <strong>the</strong> pipette potential <strong>to</strong> <strong>the</strong> desired command<br />
potential beca<strong>use</strong> <strong>the</strong> feedback loop gain is <strong>to</strong>o low.<br />
4. Neutralize <strong>the</strong> Pipette Capacitance. Increase <strong>the</strong> CAPACITANCE NEUTRALIZATION<br />
until <strong>the</strong> small overshoot on <strong>the</strong> current trace is removed, leaving a slightly rounded<br />
corner at <strong>the</strong> <strong>to</strong>p of <strong>the</strong> current step.<br />
5. Increase <strong>the</strong> Feedback GAIN. While repeatedly applying <strong>the</strong> test pulse, first increase<br />
<strong>the</strong> MULTIPLIER switch <strong>to</strong> 10. Now increase <strong>the</strong> GAIN slowly. The voltage step will<br />
increase, approaching 10 mV, while <strong>the</strong> current response also grows. Eventually <strong>the</strong><br />
current becomes noisy, and <strong>the</strong>n oscillates out of control.<br />
In order <strong>to</strong> achieve <strong>the</strong> optimal setting of GAIN, adjust <strong>the</strong> PHASE LAG and<br />
CAPACITANCE NEUTRALIZATION in turn, while increasing <strong>the</strong> GAIN and observing<br />
<strong>the</strong> trace. In general, as <strong>the</strong> trace becomes noisy and begins <strong>to</strong> show oscillation,
increase <strong>the</strong> PHASE LAG slowly until <strong>the</strong> trace begins <strong>to</strong> overshoot; <strong>the</strong>n increase<br />
CAPACITANCE NEUTRALIZATION <strong>to</strong> reduce <strong>the</strong> overshoot.<br />
After adjustment of GAIN, PHASE LAG, and CAPACITANCE<br />
NEUTRALIZATION:<br />
(GAIN = 3, PHASE LAG = 0.3 x 10, CAP. NEUTRALIZATION adjusted;<br />
FILTER = 10 kHz, Sampling = 20 kHz)<br />
GAIN must be set high enough so that <strong>the</strong> amplifier can maintain <strong>the</strong> command<br />
potential. There<strong>for</strong>e, <strong>the</strong> optimal settings of GAIN, PHASE LAG, and CAPACITANCE<br />
NEUTRALIZATION <strong>for</strong> a specific experiment must be chosen based upon <strong>the</strong><br />
parameters of <strong>the</strong> pipette. Larger currents (lower pipette resistance) will require higher<br />
GAIN.<br />
6. Form a Seal. In a real experiment, at this point <strong>the</strong> pipette would be advanced on <strong>the</strong><br />
<strong>cell</strong>, a holding potential applied <strong>to</strong> <strong>the</strong> pipette, and a GΩ seal <strong>for</strong>med. As <strong>the</strong> seal <strong>for</strong>ms,<br />
a test pulse is delivered <strong>to</strong> measure <strong>the</strong> seal resistance; with Clampex, this is easily<br />
done in <strong>the</strong> Membrane Test (or Seal Test in pCLAMP 8 and 9).<br />
The increasing resistance during seal <strong>for</strong>mation can destabilize <strong>the</strong> voltage<br />
clamp. To avoid this problem, reduce <strong>the</strong> GAIN <strong>to</strong> 0.7 be<strong>for</strong>e beginning seal <strong>for</strong>mation,<br />
and set MULTIPLIER <strong>to</strong> OFF (<strong>the</strong>reby turning off PHASE LAG). The voltage clamp may<br />
temporarily fail at this low GAIN, but as <strong>the</strong> seal <strong>for</strong>ms, <strong>the</strong> current decreases and <strong>the</strong><br />
clamp will return <strong>to</strong> <strong>the</strong> command potential.<br />
For example, <strong>the</strong> PATCH setting on <strong>the</strong> PATCH-1U model <strong>cell</strong> models a 10GΩ<br />
seal. The figure below shows its response <strong>to</strong> a 10 mV test pulse.
(GAIN = 0.7; MULTIPLIER = OFF; CAPACITANCE NEUTRALIZATION adjusted;<br />
FILTER = 10 kHz; Sampling = 20 kHz; HOLDING POSITION = -50 mV)<br />
The seal resistance is <strong>to</strong>o high <strong>to</strong> accurately measure beca<strong>use</strong> of <strong>the</strong> noise in <strong>the</strong><br />
current trace.<br />
7. Break in<strong>to</strong> <strong>the</strong> Cell. At this point <strong>the</strong> portion of <strong>cell</strong> membrane sealed <strong>to</strong> <strong>the</strong> pipette is<br />
ruptured, typically by fur<strong>the</strong>r application of suction. This establishes <strong>the</strong> <strong>whole</strong>-<strong>cell</strong><br />
voltage clamp.<br />
Be<strong>for</strong>e breaking in<strong>to</strong> <strong>the</strong> <strong>cell</strong>, make sure that <strong>the</strong> GAIN setting is 0.7 or lower, <strong>to</strong><br />
avoid oscillations which could damage <strong>the</strong> <strong>cell</strong>.<br />
For <strong>the</strong> purposes of this tu<strong>to</strong>rial, switch <strong>the</strong> PATCH-1U model <strong>cell</strong> <strong>to</strong> CELL<br />
position. With <strong>the</strong> test pulse off, turn HOLDING POSITION until Vm is –50 mV.<br />
Alternatively, Clampex may be <strong>use</strong>d <strong>to</strong> set <strong>the</strong> holding potential. The response <strong>to</strong> a 10<br />
mV step is shown below.
(GAIN = 0.3; MULTIPLIER = OFF; HOLDING POSITION = -50 mV; FILTER = 10 kHz,<br />
Sampling rate = 20 kHz)<br />
Once again, since <strong>the</strong> GAIN is low, <strong>the</strong> amplifier is unable <strong>to</strong> keep <strong>the</strong> holding<br />
potential at –50mV, or apply a squ<strong>are</strong> voltage command. Set <strong>the</strong> MULTIPLIER <strong>to</strong> 10.<br />
Now increase <strong>the</strong> GAIN slowly, while observing <strong>the</strong> step response. As you see<br />
overshoots in <strong>the</strong> voltage response, increase <strong>the</strong> PHASE LAG. It may also be necessary<br />
<strong>to</strong> adjust <strong>the</strong> CAPACITANCE NEUTRALIZATION <strong>to</strong> achieve <strong>the</strong> best response, similar<br />
<strong>to</strong> that shown below.
(GAIN = 50; PHASE LAG = 0.95x10; CAP. NEUT. Adjusted; FILTER = 10 kHz; Sampling<br />
= 20 kHz)<br />
The appropriate final GAIN setting depends on <strong>the</strong> currents <strong>to</strong> be measured.<br />
Larger currents require higher GAIN so that <strong>the</strong> membrane potential will remain<br />
clamped. For this reason, it is recommended that Vm be recorded <strong>to</strong>ge<strong>the</strong>r with Im, in<br />
order <strong>to</strong> verify <strong>the</strong> validity of <strong>the</strong> voltage clamp.<br />
8. Apply Series Resistance Correction. The current response is somewhat slow beca<strong>use</strong><br />
<strong>the</strong> series resistance of <strong>the</strong> pipette is not corrected. In cSEVC mode, <strong>the</strong> BRIDGE<br />
BALANCE control acts <strong>to</strong> correct series resistance. While applying a repetitive test<br />
pulse, increase <strong>the</strong> BRIDGE BALANCE until <strong>the</strong> current response becomes sharper and<br />
<strong>the</strong> voltage step shows a slight overshoot. Increasing <strong>the</strong> series resistance correction <strong>to</strong>o<br />
far, however, will result in severe oscillations that can damage a <strong>cell</strong>.<br />
Only increase <strong>the</strong> series resistance correction (BRIDGE BALANCE) until ringing<br />
is observed following <strong>the</strong> step on <strong>the</strong> voltage trace; <strong>the</strong>n, reduce series resistance<br />
slightly <strong>to</strong> give a margin of safety.
With <strong>the</strong> model <strong>cell</strong>, <strong>the</strong> following traces show <strong>the</strong> response be<strong>for</strong>e (black) and<br />
after (red) series resistance correction was applied.<br />
(Filter = 10 kHz, Sampling = 20 kHz)<br />
In this case, BRIDGE BALANCE was advanced <strong>to</strong> 0.7. In cSEVC mode, with H = x0.1,<br />
this indicates that 0.7/0.1 = 7 MΩ of series resistance is corrected. Looking back at <strong>the</strong><br />
measurement of <strong>the</strong> pipette in <strong>the</strong> bath, 7 MΩ / 10 MΩ = 70% of <strong>the</strong> series resistance<br />
was corrected in this case. This is <strong>the</strong> typical maximum series resistance compensation<br />
possible with <strong>the</strong> <strong>Axoclamp</strong>-<strong>2B</strong>.<br />
With a real <strong>cell</strong>, determining <strong>the</strong> percentage compensation is more complex,<br />
beca<strong>use</strong> <strong>the</strong> series resistance is not identical <strong>to</strong> <strong>the</strong> pipette resistance measured in <strong>the</strong><br />
bath. Instead, <strong>the</strong> true series resistance must be measured in BRIDGE mode after<br />
breaking in<strong>to</strong> <strong>the</strong> <strong>cell</strong>, and <strong>the</strong>n comp<strong>are</strong>d <strong>to</strong> <strong>the</strong> corrected series resistance value. For<br />
details, see KB article #153.<br />
9. Choose a FILTER Setting. At this point, <strong>the</strong> <strong>cell</strong> is voltage clamped. Depending on <strong>the</strong><br />
experiment, <strong>the</strong> FILTER can be set <strong>to</strong> a lower corner frequency in order <strong>to</strong> remove some
high frequency noise. The appropriate FILTER setting depends on <strong>the</strong> type of current<br />
being measured.