DDR3 Thermals - Micron
DDR3 Thermals - Micron
DDR3 Thermals - Micron
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4/12/2007<br />
<strong>DDR3</strong> <strong>Thermals</strong><br />
Thermal Limits, Operating Temperatures,<br />
Tools, and System Development<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved. Products are warranted only to meet <strong>Micron</strong>’s production data sheet specifications.<br />
Information, products and/or specifications are subject to change without notice. All information is provided on an “AS IS” basis without<br />
warranties of any kind. Dates are estimates only. Drawings not to scale. <strong>Micron</strong> and the <strong>Micron</strong> logo are trademarks of <strong>Micron</strong> Technology, Inc.<br />
All other trademarks are the property of their respective owners.
• <strong>DDR3</strong> Thermal Limits<br />
4/12/2007 2<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Agenda<br />
• Estimated <strong>DDR3</strong> DRAM Operating Temperatures<br />
• Possible Thermal Solutions<br />
• <strong>Micron</strong> Thermal Tools and System Development
4/12/2007<br />
<strong>DDR3</strong> <strong>Thermals</strong><br />
Thermal Limits
4/12/2007 4<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
<strong>DDR3</strong> Thermal Limits<br />
• <strong>DDR3</strong> is specified to operate at the standard 85°C case or<br />
an extended temperature range of 95°C with 2X the<br />
refresh rate<br />
� 1X (standard) refresh rate = 64ms<br />
� 2X (high temp) refresh rate = 32ms
• Running at the higher temperature also requires the<br />
Extended Mode register to be set<br />
• This ensures the DRAM will perform a 2X (32ms) refresh<br />
while the part is in Self-Refresh mode<br />
4/12/2007 5<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
<strong>DDR3</strong> Thermal Limits
• <strong>DDR3</strong> Thermal Limits<br />
4/12/2007 6<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Agenda<br />
• Estimated <strong>DDR3</strong> DRAM Operating Temperatures<br />
• Possible Thermal Solutions<br />
• <strong>Micron</strong> Thermal Tools and System Development
4/12/2007 7<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
DRAM Temperatures<br />
• Simulation was performed to evaluate the thermal<br />
performance of several <strong>DDR3</strong> RDIMMs<br />
� SR x4, DR x8, DR x4 (planar) and DR x4 (stacked)<br />
• The simulation was done for two worst case operating<br />
conditions<br />
� 100% DRAM bandwidth from a single Rank<br />
� ~65% DRAM utilization equally split between all Ranks<br />
• Each condition was repeated for the three key <strong>DDR3</strong><br />
speed grades<br />
� <strong>DDR3</strong>-800, <strong>DDR3</strong>-1067, <strong>DDR3</strong>-1333
• General System Module<br />
4/12/2007 8<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
DRAM Temperatures<br />
• Duct width is set to<br />
maintain the same air<br />
speed between 1 DIMM/ch<br />
and 2 DIMMs/ch<br />
• With FMHS the duct area<br />
and inlet air speed are the<br />
same, so the air speed and<br />
pressure differential<br />
through the DIMMs<br />
increase due to reduced<br />
area cross-section
• Raw Cards Simulated<br />
4/12/2007 9<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
DRAM Temperatures<br />
R/C B (DR x8) R/C C (SR x4)<br />
R/C D (DR x4) - Stacked<br />
R/C J (DR x4) - Planar
Inlet Air (C)<br />
Requirements to Keep DRAM At/Below 85°C<br />
10<br />
0<br />
10<br />
20<br />
30<br />
40<br />
50<br />
60<br />
70<br />
0.00 0.50 1.00 1.50 2.00 2.50 3.00<br />
4/12/2007 10<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Air Speed at mid DIMM (m/s)<br />
65% Bandwidth (closed page)<br />
DR x8 (2GB) - Max DRAM temp = 85C with 0.4" pitch<br />
SingleSlot, <strong>DDR3</strong>-1067, 65% BW<br />
How to read the chart...<br />
For a single DR x8 (2GB) RDIMM running at <strong>DDR3</strong>-<br />
1066 speeds with a 65% DRAM utilization, closed<br />
page policy... the hottest DRAM case temperature<br />
is 85C when the inlet air is about 42C and there is<br />
a constant 1m/s of air flow<br />
�100% Bandwidth is from a single Rank, open page with continuous READs<br />
� 65% Bandwidth reflects a sustained channel bandwidth of 65% of the maximum DRAM BW, 2x READs to<br />
WRITEs distributed evenly through all available ranks, closed page, PLL/Register package included
Inlet Temp (C)<br />
Requirements to Keep DRAM At/Below 85°C<br />
10<br />
Air Speed at mid DIMM (m/s)<br />
0.00 0.50 1.00 1.50 2.00 2.50 3.00<br />
0<br />
10<br />
20<br />
30<br />
40<br />
50<br />
60<br />
70<br />
4/12/2007 11<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
100% Bandwidth (open page)<br />
Single Slot, <strong>DDR3</strong>-1067, 65% BW<br />
SingleSlot, <strong>DDR3</strong>-1067, 100% BW<br />
65% Bandwidth (closed page)<br />
DR x8 (2GB) - Max DRAM temp = 85C with 0.4" pitch<br />
What does this show?<br />
With high DRAM utilization, the (DR x8) runs<br />
cooler with open pages as compared to running<br />
with closed pages – about 6C cooler<br />
�100% Bandwidth is from a single Rank, open page with continuous READs<br />
� 65% Bandwidth reflects a sustained channel bandwidth of 65% of the maximum DRAM BW, 2x READs to<br />
WRITEs distributed evenly through all available ranks, closed page, PLL/Register package included
Inlet Temp (C)<br />
-10<br />
0<br />
10<br />
20<br />
30<br />
40<br />
50<br />
60<br />
70<br />
Requirements to Keep DRAM At/Below 85°C<br />
0.00 0.50 1.00 1.50 2.00 2.50 3.00<br />
�100% Bandwidth is from a single Rank, open page with continuous READs<br />
� 65% Bandwidth reflects a sustained channel bandwidth of 65% of the maximum DRAM BW, 2x READs to<br />
WRITEs distributed evenly through all available ranks, closed page, PLL/Register package included<br />
4/12/2007 12<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Air speed at mid DIMM (m/s)<br />
DRx8 (2GB) - Max DRAM temp = 85C with 0.4" pitch<br />
Two Slots Populated, 1333MHz, 65% BW<br />
Two Slots Populated, 1067MHz, 65% BW<br />
Two Slots Populated, 800MHz, 65% BW<br />
Single Slot, 1333MHz, 65% BW<br />
Single Slot, 1067MHz, 65% BW<br />
Single Slot, 1067MHz, 100% BW<br />
Single Slot, 800MHz, 65% BW<br />
Single Slot, 800MHz, 100% BW
Inlet temp (C)<br />
-10<br />
0<br />
10<br />
20<br />
30<br />
40<br />
50<br />
60<br />
70<br />
Requirements to Keep DRAM At/Below 85°C<br />
0.00 0.50 1.00 1.50 2.00 2.50 3.00<br />
�100% Bandwidth is from a single Rank, open page with continuous READs<br />
� 65% Bandwidth reflects a sustained channel bandwidth of 65% of the maximum DRAM BW, 2x READs to<br />
WRITEs distributed evenly through all available ranks, closed page, PLL/Register package included<br />
4/12/2007 13<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Air Speed at mid DIMM (m/s)<br />
SRx4 (2GB) Max DRAM temp = 85C with 0.4" pitch<br />
Single Slot, 1333MHz, 65% BW<br />
Single Slot, 1067MHz, 65% BW<br />
Single Slot, 1333MHz, 100% BW<br />
Single Slot, 1067MHz, 100% BW<br />
Two Slots Populated, 1333MHz, 65% BW<br />
Two Slots Populated, 1067MHz, 65% BW<br />
Two Slots Populated, 800MHz, 65% BW<br />
Single Slot, 800MHz, 100% BW<br />
Single Slot, 800MHz, 65% BW
Inlet temp (C)<br />
-10<br />
0<br />
10<br />
20<br />
30<br />
40<br />
50<br />
60<br />
70<br />
Requirements to Keep DRAM At/Below 85°C<br />
0.00 0.50 1.00 1.50 2.00 2.50 3.00<br />
�100% Bandwidth is from a single Rank, open page with continuous READs<br />
� 65% Bandwidth reflects a sustained channel bandwidth of 65% of the maximum DRAM BW, 2x READs to<br />
WRITEs distributed evenly through all available ranks, closed page, PLL/Register package included<br />
4/12/2007 14<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Air Sped at mid DIMM (m/s)<br />
DR x4 (4GB) Stacked - Max DRAM temp = 85C with 0.4" pitch<br />
Single Slot, 1333MHz, 65% BW<br />
Single Slot, 1067MHz, 65% BW<br />
Single Slot, 1333MHz, 100% BW<br />
Two Slots Populated, 1333MHz, 65% BW<br />
Single Slot, 1067MHz, 100% BW<br />
Single Slot, 800MHz, 100% BW<br />
Two Slots Populated, 800MHz, 65% BW<br />
Two Slots Populated, 1067MHz, 65% BW<br />
Single Slot, 800MHz, 65% BW
Inlet temp (C)<br />
-10<br />
0<br />
10<br />
20<br />
30<br />
40<br />
50<br />
60<br />
70<br />
Requirements to Keep DRAM At/Below 85°C<br />
0.00 0.50 1.00 1.50 2.00 2.50 3.00<br />
�100% Bandwidth is from a single Rank, open page with continuous READs<br />
� 65% Bandwidth reflects a sustained channel bandwidth of 65% of the maximum DRAM BW, 2x READs to<br />
WRITEs distributed evenly through all available ranks, closed page, PLL/Register package included<br />
4/12/2007 15<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Air Speed at mid DIMM (m/s)<br />
DRx4 (4GB) Planar - Max DRAM temp = 85c with 0.4" pitch<br />
Single Slot, <strong>DDR3</strong>-1333, 65% BW<br />
Single Slot, <strong>DDR3</strong>-1333, 100% BW<br />
Single Slot, <strong>DDR3</strong>-1067, 65% BW<br />
Two Slots Populated, <strong>DDR3</strong>-1333, 65% BW<br />
Single Slot, <strong>DDR3</strong>-1067, 100% BW<br />
Two Slots Populated, <strong>DDR3</strong>-1067, 65% BW<br />
Single Slot, <strong>DDR3</strong>-800, 65% BW<br />
Single Slot, <strong>DDR3</strong>-800, 100% BW<br />
Two Slots Populated, <strong>DDR3</strong>-800, 65% BW
Requirements to Keep DRAM At/Below 85°C<br />
• The simulations were then repeated with a full module<br />
heat spreader (FMHS) attached to each module<br />
• The FMHS used was:<br />
� A clamshell style heat spreader similar to FBDIMM<br />
� Anodized 1mm 1050 aluminum alloy<br />
� 15mil to 20mil gap pad TIM (1W/mK)<br />
� Used two (2) clips to fasten to the module<br />
4/12/2007 16<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.
<strong>DDR3</strong> RDIMM <strong>Thermals</strong> - Including Heat Sink<br />
Junction temp (C)<br />
140<br />
130<br />
120<br />
110<br />
100<br />
90<br />
80<br />
70<br />
60<br />
4/12/2007 17<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
DRx4 (4G) Planar Max DRAM Temperatures with 40C inlet<br />
Pitch = 0.4 inch<br />
Without Heat Sink<br />
0.50 1.00 1.50 2.00 2.50 3.00 3.50<br />
Mid air speed (m/s)<br />
Single Slot, <strong>DDR3</strong>-1333, 65% BW<br />
Single Slot - With Heat Sink, <strong>DDR3</strong>-1333, 65% BW<br />
Two Slots Poulated, <strong>DDR3</strong>-1333, 65% BW<br />
Two Slots Populated - With Heat Sink, <strong>DDR3</strong>-1333,<br />
65% BW<br />
With heat Sink<br />
�100% Bandwidth is from a single Rank, open page with continuous READs<br />
� 65% Bandwidth reflects a sustained channel bandwidth of 65% of the maximum DRAM BW, 2x READs to<br />
WRITEs distributed evenly through all available ranks, closed page, PLL/Register package included
<strong>DDR3</strong> RDIMM <strong>Thermals</strong> - Including Heat Sink<br />
Junction temp (C)<br />
140<br />
130<br />
120<br />
110<br />
100<br />
90<br />
80<br />
70<br />
60<br />
4/12/2007 18<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
DRx4 (4GB) - Stacked, Max DRAM Temperatures with 40(C) Inlet<br />
Without Heat Sink<br />
Pitch = 0.4 inch<br />
Delta is about 3C<br />
0.50 1.00 1.50 2.00 2.50 3.00 3.50<br />
Mid air speed (m/s)<br />
Single Slot, <strong>DDR3</strong>-1333, 65% BW<br />
Single Slot - With Heat Sink, <strong>DDR3</strong>-1333, 65% BW<br />
Two Slots Populated, <strong>DDR3</strong>-1333, 65% BW<br />
Two Slots Populated - With Heat Sink, <strong>DDR3</strong>-1333, 65% BW<br />
Delta is about 6C<br />
With heat Sink<br />
�100% Bandwidth is from a single Rank, open page with continuous READs<br />
� 65% Bandwidth reflects a sustained channel bandwidth of 65% of the maximum DRAM BW, 2x READs to<br />
WRITEs distributed evenly through all available ranks, closed page, PLL/Register package included
4/12/2007 19<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Conclusion of Simulations<br />
• At the slower speeds, <strong>DDR3</strong> RDIMMs run cooler than<br />
comparable DDR2 RDIMM modules<br />
• At the higher <strong>DDR3</strong> clock rates and with minimal air flow,<br />
DRAM will approach or exceed the 85°C level<br />
• A module heat sink provides cooling benefits and may be<br />
required for high speed, high density modules
• <strong>DDR3</strong> Thermal Limits<br />
4/12/2007 20<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Agenda<br />
• Estimated <strong>DDR3</strong> DRAM Operating Temperatures<br />
• Possible Thermal Solutions<br />
• <strong>Micron</strong> Thermal Tools and System Development
• System designs that utilize <strong>DDR3</strong> must be proactive and<br />
consider the thermal aspects<br />
� Will modules need heat sinks?<br />
� Will there need to be an increased air flow?<br />
� Will the inlet air temperature need to be cooler?<br />
� Will socket spacing need to be increased?<br />
� Will the controller need to consider throttling?<br />
4/12/2007 21<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions
• Cooling the <strong>DDR3</strong> RDIMM is different than cooling the<br />
FBDIMM<br />
� On the FBDIMM, it is the AMB that needs cooling and the<br />
heat sink actually dissipates heat from the AMB into the<br />
DRAM<br />
� The <strong>DDR3</strong> RDIMM may need a heat sink to cool the DRAM<br />
4/12/2007 22<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions<br />
FBDIMM <strong>DDR3</strong> RDIMM
• A full module heat spreader decreases the DRAM and register<br />
temperatures; but to get the full benefits of the heat sink, increased air<br />
flows are required<br />
4/12/2007 23<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions<br />
Comparing the RDIMM (with) and<br />
(without) a heat sink shows even a<br />
greater difference between the DRAM<br />
temperature at higher airflow<br />
•3C delta at 1m/s<br />
•6C delta at +2.5m/s
• We may want to have the <strong>DDR3</strong> modules updated to<br />
accept industry standard heat spreaders?<br />
� The PCBs may need to have notches added to accommodate<br />
the heat sink and mounting hardware (like on the FBDIMM)<br />
4/12/2007 24<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions
• When adding heat sinks, system designers will need to account<br />
for the increased pressure drop through the DIMMs with fan<br />
selection and DIMM layout<br />
4/12/2007 25<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions<br />
•May need a higher pressure fan<br />
•May need a greater DIMM pitch
• An example of 0.4” DIMM pitch, without heat sinks<br />
4/12/2007 26<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions<br />
About a 50% reduction
• An example of 0.4” DIMM pitch, with heat sinks<br />
4/12/2007 27<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions<br />
About a 70-80% reduction
• The affects of increasing the socket pitch to 0.45”<br />
Max DRAM Temp (C)<br />
98<br />
96<br />
94<br />
92<br />
90<br />
88<br />
86<br />
84<br />
82<br />
80<br />
A decrease of about 5-6C is realized just by increasing the socket pitch to 0.45 inch<br />
4/12/2007 28<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions<br />
2GB (SR x4) - Single Slot Populated, Inlet Air = 50C<br />
<strong>DDR3</strong>-1066 <strong>DDR3</strong>-1333<br />
0.40 inch pitch wo/HS<br />
0.40 inch pitch w/HS<br />
0.45 inch pitch w/HS<br />
Air speed at DIMM mid-point ranges 0.98m/s to 1.42m/s
• The <strong>DDR3</strong> RDIMMs are designed to include an “optional”<br />
thermal sensor<br />
� Thermal sensor datasheets are available for one at least the<br />
vendor<br />
� The sensor may be a discrete near the PLL/Register device,<br />
or included within the SPD on the back side<br />
4/12/2007 29<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions
4/12/2007 30<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Possible Thermal Solutions<br />
• The thermal sensor provides real time feedback through<br />
the module event pin, and/or the SMbus<br />
• This allows the memory controller to monitor the<br />
temperature of the module and “throttle” back if critical<br />
thermal limits are approaching<br />
• This is much like the thermal sensor on the AMB for the<br />
FBDIMM
• <strong>DDR3</strong> Thermal Limits<br />
4/12/2007 31<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.<br />
Agenda<br />
• Estimated <strong>DDR3</strong> DRAM Operating Temperatures<br />
• Possible Solutions<br />
• <strong>Micron</strong> Thermal Tools and System Development
<strong>Micron</strong> Thermal Tools and System Development<br />
• <strong>Micron</strong> has many resources to help make your design a<br />
success<br />
� For example, one of our wind tunnels<br />
4/12/2007 32<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.
<strong>Micron</strong> Thermal Tools and System Development<br />
• We offer thermal models of our components and some<br />
modules<br />
• We do custom heat sink designs for many high bandwidth<br />
applications<br />
• We can help to estimate your memory power budget using<br />
the <strong>Micron</strong> <strong>DDR3</strong> Power Calculator<br />
4/12/2007 33<br />
©2007 <strong>Micron</strong> Technology, Inc. All rights reserved.