DSP Selection Guide
DSP Selection Guide
DSP Selection Guide
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64<br />
➔<br />
TMS320C6000 <strong>DSP</strong> Platform<br />
Power Management Products<br />
Power Management Products for the C6000 <strong>DSP</strong> Platform<br />
Get samples, datasheets, Evaluation Modules (EVMs) and app reports at: power.ti.com<br />
Suggested Power Management Solutions for the TMS320C62x/TMS320C64x/TMS320C67x <strong>DSP</strong> Generations<br />
Core and I/O Voltages<br />
Synchronous Non-Synchronous Synchronous Non-Synchronous Non-Isolated Isolated PMU Multiple-<br />
Input Output Controller Controller Integrated FET Integrated FET Power Power Output<br />
Voltage Current LDO (External FETs) (External FET and Diode) Converter Converter Module Module Controller<br />
3.3 V 3 A TPS74401 TPS40009 TPS64200 TPS54317 PTH04T260 TPS75003<br />
6 A TPS75901 TPS40009 TPS54610 PTH04T230<br />
5 V 3 A TPS74401 TPS40009 TPS40200 TPS54317 TPS54350 PTH04T260 TPS75003<br />
6 A TPS75901 TPS40009 TPS54610 TPS54550 PTH04T230<br />
12 V 3 A TPS40190 TPS40200 TPS54350 TPS54350 PTH08T260 TPS5124<br />
6 A TPS40190 TPS54550 TPS54550 PTH08T230 TPS5124<br />
24 V 3 A TPS40057 TPS40200 TPS5430* PTN78020* PTB78560*<br />
6 A TPS40057 PTB78560*<br />
48 V 3 A TPS40061 TPS40200* PTMA403033*<br />
6 A TPS40061 PTB48560*<br />
*Due to Vout/Vin ratio core voltage may have to be stepped down from 3.3-V I/O.<br />
Example C6000 <strong>DSP</strong> Power Supply Design<br />
V CC<br />
C9<br />
R6<br />
R7 R5 R17<br />
Open<br />
ENA<br />
U1<br />
1 VIN BOOT<br />
TPS54350PWP<br />
16<br />
2 VIN PH 15<br />
3 UVLO PH 14<br />
4 PWRGD LSG 13<br />
5 RT VBIAS 12<br />
6 SYNC PGND 11<br />
7 ENA AGND 10<br />
8 COMP VSENSE 9<br />
PwrPd<br />
17<br />
C3<br />
C4<br />
1 2 3 6 7<br />
4<br />
8 5<br />
R1<br />
Q1<br />
FDR6674A<br />
TP7<br />
L1<br />
R18<br />
C13<br />
R9<br />
+<br />
C2<br />
DV DD<br />
C6<br />
R3<br />
R5<br />
C8<br />
C7<br />
R2<br />
DVDD<br />
VCC<br />
DV DD<br />
C10<br />
U2<br />
TPS3808G01<br />
6<br />
1<br />
5<br />
VDD RST<br />
2<br />
4<br />
SNS/NC GND<br />
3<br />
CT MR<br />
R5<br />
<strong>DSP</strong>_RESET<br />
C10<br />
V CC<br />
C15<br />
R11<br />
R8 R14 R19<br />
Open<br />
ENA<br />
U3<br />
1 VIN BOOT<br />
TPS54350PWP<br />
16<br />
2 VIN PH 15<br />
3 UVLO PH 14<br />
4 PWRGD LSG 13<br />
5 RT VBIAS 12<br />
6 SYNC PGND 11<br />
7 ENA AGND 10<br />
8 COMP VSENSE 9<br />
PwrPd<br />
17<br />
C14<br />
1 2 3 6 7<br />
4<br />
C16<br />
8 5<br />
R13<br />
Q2<br />
FDR6674A<br />
TP8<br />
L2<br />
R21<br />
C17<br />
R20<br />
+<br />
C18<br />
CVDD<br />
C10<br />
R15<br />
R16<br />
C11<br />
C12<br />
R12<br />
VCC<br />
ON<br />
S1<br />
OFF<br />
For additional power supply designs for TI <strong>DSP</strong>s, please visit www.ti.com/dsppower.<br />
Note: The TI power devices recommended here are based on standard operating conditions. System designers should use device power estimation tools in conjunction<br />
with overall application level power requirements to ensure an adequate power supply design is used.<br />
Texas Instruments 1Q 2007<br />
<strong>DSP</strong> <strong>Selection</strong> <strong>Guide</strong>
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