Lai - Keck Institute for Space Studies

Recent NGST HEMT Device & MMIC
Development
MMIC Array Receivers and Spectrographs
Workshop
Richard Lai and Xiao-Bing (Gerry) Mei
Northrop Grumman Corporation, Redondo Beach CA, 90278
July 21, 2008

HEMT Technology Development Applicable
towards Radiometric Applications at NGST
• NGST Internal R&D
– Yearly budget > $2M for last 10 years
– First LNAs at various frequencies including 90, 140, 150, 180, 240 GHz
– First 30 dB gain 160-190 GHz amplifier block and full radiometer
• DARPA
– MIMIC Phase II W-band GaAs HEMT LNA
– TRP W-band MMW Camera
– MAFET MMW InP HEMT MMIC production
– SWIFT – 340 GHz Transceiver
– Hi-Five – 220 GHz Driver
• JPL CHOP – focused development of InP HEMT croyogenic LNAs
– FCRAO 94 GHz LNA UMass Amherst
– European Space Agency – ground telescopes MMW LNAs, PINs
– GEOSTAR, 183 GHz SAR
– Deep Space Network, Paul Allen Telescope, Hawaii MMW LNAs
• Projects
– Jason (TOPEX/Poseidon) Ka-band LNAs
– ODIN, IMAS, MLS (120 GHz flight)
– Cloudsat (W-band)
– PLANCK and Herschel (MMW, W-band power)
– ALMA (NRAO, X-band LNAs, W-band power)
– CSIRO (Austrailia): Narrabri telescopes, VLA (MMW to 200 GHz)
– NOAA (ATMS, CMIS) development (MMW to 200 GHz)
– LRR (Goddard – X-band)
– NRL G-band MMIICs
MLS
Herschel
Planck
Odin Module
W-band MMW Camera
2

InP HEMT
Source
Cap
Donor
Channel
Buffer
Substrate
Gate
In 0.53 Ga 0.47 As
In 0.52 Al 0.48 As
In x Ga 1-x As
Drain
Semi-Insulating InP
Silicon
doping
Cutoff Frequency fT (GHz)
400
300
200
100
0
100 nm gate
GaAs
InP
0.0 0.2 0.4 0.6 0.8 1.0
X {In x Ga (1-x) As}
Features
• Pseudomorphic growth of InP HEMT layers with MBE
• Mobility, fT improve with higher Indium composition
• Single recess, semi-selective etch process
• SiNx passivation
• 2-level interconnect metal process with airbridges, TFR and MIMCAP
• 50 um thick chips with through via process
High Indium
Composition

InP HEMT Device Structure
INDUCTOR
AIRBRIDGE
TFR
MIM
Epitaxial Material
Isolated Material
Ohmic
source Ω
T-gate
BACKSIDE VIA
drain Ω
Gate
Silicon Nitride
n+ InGaAs
Thin Film Resistor
Si Plane
AlInAs
InGaAs
Buffer
InP HEMT
DEVICE
1st level interconnect (FIC)
2nd level interconnect (Top Metal)
InP Substrate
Back metal
Substrate
Process commonality between different InP HEMT technologies
shortens development cycle
4

Cryogenic InP HEMT
Cryo-4 300K
Gm (mS/mm)
1600
1400
1200
1000
800
600
400
200
0
0.00E+00 1.00E-02 2.00E-02 3.00E-02 4.00E-02
Id (A)
0.075
0.15
0.225
0.3
0.375
0.45
0.525
0.6
0.675
0.75
0.825
0.9
0.975
Ref. T. Gaier et. al. 2005
Cryo-4 60K
•Key to achieving best
cryogenic LNA NFmin is
highest Gm for lowest Id
Gm (mS/mm)
1600
1400
1200
1000
800
600
400
200
0
0.00E+00 1.00E-02 2.00E-02 3.00E-02 4.00E-02
Id (A)
0.075
0.15
0.225
0.3
0.375
0.45
0.525
0.6
0.675
0.75
0.825
0.9
0.975
5

Cryogenic InP HEMT
• Shot noise due to forward Ig can impact overall NFmin
Cryo7 4139-043 Cryo 9 4260-31
Igs vs Vgs @15K
Ref. M. Pospieszalski et. al. 2005
6

InP HEMT: Ohmic contact improvement
80
0.14
70
60
0.12
0.10
0.08
0.06
0.04
0.02
0.00
WLNA4/A-J3, 4355-071
WLNA4/A-J3, 4355-078
WLNA5/A-J3, 4365-062
WLNA5/A-J3, 4365-063
WLNA5/A-J3, 4365-064
WLNA5/A-J3, 4365-067
WLNA5/A-J3, 4365-068
WLNA5/A-J4, 4365-044
WLNA4/A-J4, 4365-047
WLNA4/A-J4, 4365-048
WLNA4/A-J4, 4365-049
PSF61/A-J1, 4386-070
PSF61/A-J1, 4386-071
PSF61/A-J2, 4386-083
PSF61/A-J2, 4386-084
2008
ICC1/A-J46, 4365-050
ICC1/A-J46, 4365-051
ICC1/A-J46, 4365-052
ICC1/A-J46, 4365-053
N3017/A-J5, 4356-072
N3017/A-J5, 4356-073
N3017/A-J5, 4356-078
N3017/A-J5, 4386-079
N3017/A-J5, 4386-082
WLNA5/A-J8, 4369-033
WLNA5/A-J8, 4369-034
WLNA5/A-J8, 4369-035
WLNA5/A-J8, 4369-079
ICC1/A-J50, 4395-007
ICC1/A-J50, 4395-008
ICC1/A-J50, 4397-009
ICC1/A-J50, 4397-010
ICC1/A-J51, 4395-017
ICC1/A-J51, 4395-018
ICC1/A-J51, 4395-019
ICC1/A-J51, 4395-020
ICC1/A-J51, 4395-021
ICC1/A-J51, 4397-011
ICC1/A-J51, 4397-012
ICC1/A-J51, 4397-013
ICC1/A-J51, 4397-014
ICC1/A-J51, 4397-015
N3017/A/J6, 4365-060
N3017/A/J6, 4365-061
N3017/A/J6, 4365-069
N3017/A/J6, 4386-078
IIPVP1/A-J1, 4369-080
IIPVP1/A-J1, 4369-081
IIPVP1/A-J1, 4397-018
IIPVP1/A-J1, 4395-014
Rc (ohms-mm)
50
40
30
20
10
0
Improved process
Baseline
Lot, wafer
Rc_pg
Rc_f ic
Rc_pre
Rc_pst
Rc_po
0
12
24
36
48
60
72
84
96
108
120
132
144
Contact Resistance (mΩ●mm)
Typical Rc for baseline
Device count
Improved process
• Ohmic contact process has been optimized
– Composite n+ cap
– Non-alloyed Ohmic metal
• Improved Ohmic contact resistance by over 60%
• Good on-wafer uniformity.
• Good lot-to-lot repeatability
Northrop Grumman Space Technology
GaAs MANTECH, Miami, May 2004
7
IPRM 2008

DC characteristics of 0.1um InP HEMT with improved
Ohmic process
Ids (m A/m m )/ gm (m S/m m )
1600
1400
1200
1000
800
600
400
200
0
-0.6 -0.4 -0.2 0.0 0.2 0.4 0.6
Vgs (V)
Rc (Ω-mm)
BVgd
Gmp, Vds=1V
fT, Vds=1V
MSG @ 26GHz, Vds=1V
0.04 (Ω-mm)
3.5V
1400 (mS/mm)
230 GHz
17 dB
Ids (mA/mm)
Ft, 800 Mag, baseline, Gm ID, DC IV, gate photo, chip photo
700
600
500
400
300
200
100
Vgs=0.4V
Vgs=0V
• 20% improvement in Gmp
• Low V-knee: good for low power performance
• Well controled output conductance
• Good pinch-off characteristics
0
0.0 0.2 0.4 0.6 0.8 1.0 1.2
Vds (V)
Northrop Grumman Space Technology
8
GaAs MANTECH, Miami, May 2004
IPRM 2008

Low DC Power InP HEMT
Gm (mS/mm)
1600
Vds=1.0 V
1400
1200
1000
800
600
Vds=0.1V
400
200
0
-0.4 -0.2 0 0.2 0.4
Vgs (V)
Vds=1V
Vds=0.9V
Vds=0.8V
Vds=0.7V
Vds=0.6V
Vds=0.5V
Vds=0.4V
Vds=0.3V
Vds=0.2V
Vds=0.1V
MGG/MSG @ 10GHz (dB)
20
18
16
14
12
10
8
6
4
2
0
WLNA5/a-J4, wafer 048, HCD4200ABP
0 20 40 60 80 100 120
DC power density (mW/mm)
Vds=0.2V
Vds=0.3V
Vds=0.4V
Vds=0.5V
WLNA5/A-J4 wafer 048, HCD4200ABP
250
Ft extrapolated at 10GHz
(GHz)
200
150
100
50
0
Vds=0.2V
Vds=0.3V
Vds=0.4V
Vds=0.5V
• Peak Gm>900mS/mm at Vds=0.2V
• Ft >140 GHz at a DC power of 20mW/mm
• Good choice for low DC power applications
0 50 100
DC power density (mW/mm)
9

InP HEMT Production W-band MMIC
Performance
– 100 mm InP HEMT
– 60 wafers/20 sites per wafer
– On-wafer testing
– Fixture testing NF is better
than on-wafer data by 0.5 dB
Noise figure (dB)
5
4
3
2
1
0
90 92 94 96 98
Frequency
(GHz)
10

Noise figure of a 3-stage W-band LNA MMIC
25
8
Associated_Gain (dB)
20
15
10
5
7
6
5
4
3
2
Noise figure (dB)
0
1
86 88 90 92 94 96 98
Frequency (GHz)
• Vds=1V, Ids=18mA
• 2.5 dB noise figure at 94GHz
• 19.4dB associate gain
Northrop Grumman Space Technology
11
GaAs MANTECH, Miami, May 2004
IPRM 2008

Gate
Bypass
(Large C)
RF_IN
W-Band (94 GHz) ABCS HEMT LNA
VG1 VD1 VG2 VD2 VG3 VD3
Drain Bypass
(Small C, 25-Ω R)
RF_OUT
Substrate Mode Suppression
Vias
2-Finger, 40-µm
Devices
• Broadband Three-Stage Amplifier
– Grounded Coplanar Waveguide (GCPW), with
100-µm substrate
• Low Power, Low-Noise Results
– 5.4 dB Noise Figure with 11.1 dB
Assosciated Gain at 94 GHz
– Total DC Power only 1.8 mW
– 0.6 mW per stage
Associated Gain [dB]
12.000
11.000
10.000
9.000
Associated Gain (Left Axis)
Noise Figure (Right Axis)
6.000
5.750
5.500
5.250
Noise Figure [dB
Northrop Grumman Space Technology
12
8.000
5.000
92 93 94 95 96 97 98
Frequency [GHz] GaAs MANTECH, Miami, May 2004
IPRM 2005

InAs channel Design
electron current
Source
N+ Cap
Gate
N+ cap
Drain
InAlAs barrier
InAlAs barrier
Si doping plane
InGaAs
InAs channel
InGaAs
InAlAs buffer
SI InP substrate
• Composite channel with InAs/InGaAs
• Hall mobility of 16,000 cm 2 /V-sec and 3.5 x 10 12 /cm 2 sheet charge
• Highly doped cap layer for low ohmic contact/access resistance
• Layer structure scaled for 35 nm gate length

Sub 50 nm T-gate
• >5:1 ratio gate top to gate length for low Rg
• Single recess, 100 nm length typical
• 20 KeV exposure, two layer resist scheme

THz InP HEMT
• 2 and 4 finger devices
• Typical d.c. Gmp > 2 S/mm @1V Vds
• Low on-resistance and knee voltage
• Good pinchoff & output resistance
Vd = 1V
Vg from -0.1V to +0.4V

THz Fmax
• 2f 20 um InP HEMT
•SOLT calibration
• Vd = 1V, Id = 6 mA
• U@100 GHz ~ 22 dB
• MSG@100 GHz ~ 14 dB
• Model predicts even higher
performance
20-dB/decade

Small Signal Model
InP HEMT Small-Signal Model
Param.
Unit
100 nm
70 nm*
35 nm
Comments
RF G m
mS/mm
1125
1500
2600
Epitaxy; threshold voltage
C gs
C ds
C dg
R ds
R g
pF/mm
pF/mm
pF/mm
Ω-mm
Ω-mm
0.90
0.63
0.16
10.4
120
0.83
0.60
0.18
7.2
150
0.80
0.30
0.13
6.0
250
Lg reduction; higher Cgs due to
shorter gate to channel design
Improved Cdg
Epitaxy; threshold voltage
• Sub 50 nm InP HEMT
• Vd = 1V, Id = 300 mA/mm
• Derived from measurements
on 2f10 um, 2f20 um, 2f30
um devices for 340 GHz s-
MMIC amplifiers
f T
THz
0.2
0.35
0.45
Simulated from model
f max
THz
0.4
0.7
1.4
Simulated from model
MSG@340 GHz
dB
1
4
10
Simulated from model
*reported IEDM 2000

ABCS compared with 35 nm InP HEMT (SWIFT)
2500 2500
2000 2000
SWIFT
Gmp Gmp (mS/mm) (mS/mm)
1500 1500
1000 1000
500 500
ABCS
0
0 0.1 0.1 0.2 0.2 0.3 0.3 0.4 0.4 0.5 0.5 0.6 0.6 0.7 0.7 0.8 0.8
Vds Vds (V) (V)
19

Bias dependance
fT
Fmax
fT (GHz)
600
550
500
450
400
350
300
250
200
150
100
Id=400mA/mm
Id=300mA/mm
Id=200mA/mm
Id=200 mA/mm
Id=300 mA/mm
Id=400 mA/mm
0 0.2 0.4 0.6 0.8 1 1.2
Vds (V)
Fmax (GHz)
1200
1000
800
600
400
200
0
0.035 um x 40 um (2f) InP HEMT
200 mA/mm
300 mA/mm
400 mA/mm
0 0.2 0.4 0.6 0.8 1 1.2
Vds (V)
– 2-finger 40um InP HEMT.
– Peak Fmax = 1.1 THz; fT = 550 GHz

Challenging Interconnects and Passives
for Sub MMW Integrated Circuits (S-MMICs)
• TFR, MIMCAP, 2 interconnect metal layers with airbridges
• Interconnections scaled down by factor of 5
• Slot via development to 50 um thick InP substrate
• Overall S-MMIC size is ~10x smaller than MMW MMICs

Highest Frequency Circuits
Solid – simulated with
THz InP HEMT model
Dotted - measured
Features
• 35 nm InP HEMT
• 50 um InP with vias
• 3-stage s-MMIC LNA
- 2f 20 um per stage; 1V, 300 mA/mm
- 21 dB gain @280 GHz (7 dB/stage)
- 15 dB gain @340 GHz (5 dB/stage)
- Best LNAs 18 dB gain@340 GHz
- NF ~ 7 dB@330 GHz
• Highest frequency s-MMIC amplifier ever demonstrated
• Excellent match to simulation validates model
• Validates THz fmax Transistor

G-band LNA performance
• Legacy 3-stage 70 nm InP HEMT G-band LNA
MMIC achieved 12 dB gain from 175-210 GHz
• Singled ended MMIC LNA
• 2f20 um devices on each of 3 stages
• Same MMIC fabricated on the new sub 50 nm
InP HEMT process
• 21 dB gain has been achieved from 175-210
GHz at Vds = 1V and Id = 9 mA
Gain vs. Frequency Measurement
sub 50 nm InP HEMT
• 18 dB gain was achieved at 220 GHz
• The gain shape with new device is preserved
• 9 dB higher total gain achieved
• 3 dB higher gain per stage achieved
70 nm InP HEMT
Northrop Grumman Space Technology
23
GaAs MANTECH, Miami, May 2004
IPRM 2007

Going Forward – HEMT Technology For
Radiometers
Understand fundamentals towards cryogenic NF performance
- device stability
- role and reduction of shot noise in cooled devices
- continue to study next generation materials including ABCS HEMT, InAs channels
- apply and continue to push HEMT improvements towards cryogenic performance
- optimization of device technologies for specific frequency bands
- X-band cryogenic device needs to be different than than W, G-band device
Continue to push the frequency envelope for amplifier technology
- shorter gates, reduced parasitics, InAs channels
- 140 GHz, 220 GHz window for MMW cameras
- 180 GHz for atmospheric sensing
- push 220, 260, 340 GHz and beyond – 1 THz one day
- advanced packaging concepts
Next generation insertions – larger arrays, cameras, high frequency sensors
- 35, 94 GHz imaging solutions being introduced in commercial market
- 140, 220 GHz active radiometers for next generation cameras
- 180 GHz SAR concepts are being explored
- size, weight, power reduction with wider bandwidth and lower noise figure desired
24

Going Forward – Proposed Topics of Research for
Keck program in next 2-3 years
Characterize, analysis, optimize InP HEMT device for cryogenic applications
- No systematic study has been conducted on InP HEMT devices to date
- At NGST, InP HEMTs are optimized for room temperature operation and have
generally proven to translate to good cryogenic performance
- Several questions have been identified
- measure and analyze devices to develop correlations to MMIC amplifier results
- cryogenic leakage current shot noise is significant at lower frequencies
- device stability with high Indium content channels
- what gate length and device size is ideal at lower frequencies
- 35 nm device improvements at higher frequencies translate to lower freq
- do ohmic improvements at room temperature translate to cryogenic advantages
- how do recent isolation, gate metal, gate recess and passivation improvements
impact cryogenic performance
- is there a more ideal device design/process target for cryogenic devices
– threshold voltage
– gate length
– recess process
– epitaxial design
– device topologies
25

Going Forward – Proposed Topics of Research for
Keck program in next 2-3 years
Characterize, analysis, optimize InP HEMT device for cryogenic applications
(cont.)
- Systematic cryogenic study of existing samples and device/process splits both
through MIC amplifiers and cryogenic on-wafer probing measurements
- Study next generation materials including ABCS, InAs channels, new metals
and passivation layers
- Update models to set goals and metrics to meet 3x quantum limit noise
performance
- develop correlations to current device and MMIC amplifier results
- evaluate proposed improvements to these goals
Apply improvements to update latest SOA InP HEMT designs
- develop and adapt new device models towards updated cryogenic LNA
designs based on device improvements
- develop new designs to take advantage of performance improvements
–example–lower Vds, Ids at equivalent gain
- consider splitting device technologies used for specific frequency ranges
- new designs to push higher frequency, wider bandwidth
26